OpenLogicFPGA

Open Logic aims to be for HDL projects what what stdlib is for C/C++ projects.

Open Logic implements commonly used components in a reusable and vendor/tool-independent way and provide them under a permissive open source license (LGPL modified for FPGA usage, see License.txt), so the code can be used in commercial projects.

Open Logic is written in VHDL but can also be used from System Verilog easily.