 We start with the new module, module 3 of the non-classical MOSFET series and this will be on the metal semiconductor contacts and metal source drain junction MOSFETs. That is instead of P N junction, we have metal semiconductor junctions as the source and drain. Now, here we will discuss the properties of Schwarzky junctions in silicon, germanium as well as in compound semiconductors. How they are different? All of them are similar, but there are slight differences are there. Then, Fermi level pinning effect on this Schwarzky barrier on the working of these metal semiconductor contacts. Then, of course, MOSFETs using these metal source drain junctions. So, the first question comes to anybody's mind is why do we need this type of change from the conventional P N junction to metal source drain junctions. Particularly, when you go for small scale or nano scale MOSFETs. For this purpose, I have put here the pinning effect which we discussed last time. In fact, the idea is this is the diagram which I showed last time. Now, a simplified version of the three dimensional picture of the looking from the other side, you can see it is like this. Now, you can see you have got the source drain and this is the pin which connects the source and in fact, the channel is found there. If I have the gate only in this portion, this is the oxide and the polysilicon or metal gate that is in this. I am not showing multiple fins, only one pin. If I want to have multiple fins that will come parallel to these fins and the gate will be formed around that. So, the inversion layer is formed just below this gate. That means, the channel length is from here to here. That is the channel length. Wherever, gate is there below that there is a channel. The width will be that portion which is surrounding that channel like that. So, that is the width. It is not all round. Sometimes, they call it also all round gate. It is there from all the three sides and here as I have already pointed out the thickness. See, this is the back gate. This is the front gate you can think of. Usually, you have it like this, top gate and back gate. Now, you have it like this. You can call this as back gate, this as front gate. In addition, you have got on the top, but that is very thin. So, that means, you have got the soil layer. This whole thing is a soil layer. You have prepared the whole thing by etching the soil layer here. See, this is a buried oxide on which you had a soil layer. You have etched this portion and you have realized the transitter like this. One device has hole. So, the width is whatever is surrounding that channel is a width of that. That is h twice height plus the thickness of the width of the fin. So, whatever analysis that you do for double gate MOSFET holds good front gate and back gate you can use it. And the thickness of that soil layer in that formula will be the width of this layer. So, that is the thing. Now, what I have brought this out is this fin portion is very narrow and between the, the channel actually starts from here. This is not inverted or anything. This is, this will be endless looped up to that point, but because this is very thin, you will have lot of resistance coming into here. Rho L by A, area of cross section to the current flow is less. You have to make it thin because you want this, that layer to be very thin when the gate comes in on that. So, you cannot make it wider. So, that is where the series resistance comes into picture. That is where the problem is there when you go to smaller and smaller scale MOSFETs for which this pin fit is relevant. Now, if you take a look at the conventional MOSFET, there also you have the problem. There you have this implanted region at an angle of implant to change the doping concentration there and this thickness of the source region is less here. Even here, you would like to use shallower and shallower junctions because if you are scaling down in the lateral direction, vertical direction also you must scale down. Otherwise, there will be lateral junction formation will be there. So, you, that is a, it will spread laterally also. If you diffuse deeper, it will diffuse laterally also. If you implant, afterwards you are annealing, that will move down, it will move also laterally. So, you are making it shallower and shallower junctions. So, you make it shallower and shallower. Again, you see current flows in this direction. I will just show that here. See, this particular portion again I have put here, there is a metal contact. From the metal contact, which is may be silicide, this n plus region flows into this channel here. Channel is here. This is a gate. This is the special layer, that layer. I have expanded it and so on. This small region, I have put it like this. To magnify the impact of this resistance, I have put it there. So, this diagram is same as what we have taken here. Junctions are made shallower, especially at the gate edge here to reduce their encroachment into a channel. That introduces a lot of series resistance in this portion. Now, how can you reduce the series resistance? You can reduce the series resistance by reducing the sheet resistance. Sheet resistance is defined as resistivity of the layer divided by thickness of the layer. What is resistivity rho? 1 by sigma. 1 by sigma is resistivity and sigma is q mu n into n d and x j is the depth of which is going. So, if I want to reduce that r, that is this resistance that comes in here, I can reduce the rho or I can increase x j. But, increasing x j is not allowed because while scaling down the devices, you want to scale down in the vertically also. So, x j you cannot increase to reduce the thing. You want to keep it low. The only parameter that you can manipulate is rho. Rho depends upon 1 by n d doping. So, you can increase the doping. Already you are at 10 to power 20 doping concentration, the source chain regions. So, you cannot go beyond that point because the upper limit on this doping concentration is decided by the solid solubility limit. Means, there is a limit up to which the material for example, silicon can absorb the dopants without losing the crystallinity. That is the solid solubility limit. For example, if you put phosphorus, you may get something like 5 times 10 to power 20 per centimeter cube. If I am using phosphorus, boron or p type, you will get something like 10 to power 20 solid solubility. So, there is upper limit on that. So, the only way you can reduce that resistance is go to a different material. Changeover from the semiconductor there, changeover to metal. Metal will have lot of carrier concentration, 20 to power 22 or even more of that order. So, you can increase the carrier concentration very much. You can reduce the resistivity. You can reduce the series resistance. That is the goal. So, shallow junctions increase the external resistance and also in the case of this type of junctions, because the profile goes something like that gradually, it is not abrupt. If it is abrupt, you have got entire layer has same doping right through. So, you have got a region where the doping is getting down to lower level. So, that is why if you put a metal, the whole thing can be thin. At the same time, it will be just one sheet there. You can put thicker metal if you like. So, that is the idea. Now, further metal source drain contours have further benefits. One is parasitic resistance of source drain regions of conventional scaled down MOSFET. Whatever I have told, I have written here. It is primarily responsible for reduction in the drive current. How does this happen? This equation. Whatever gate voltage you apply, part of it goes to the resistance in the source. What is available for creating the channel is less for a given voltage. So, drive current gets reduced. So, speed of the device gets hurt. If you cannot drive a capacitor fast, the speed will be slowed down. All these MOSFETs are required to drive the capacitors and charge them. So, they must have higher transconductance g m. g m is delta i d by delta v. For a small change in the input signal, the current should change quite a bit. That is the indication of g m. Now, I do not know whether you remember this. If not, I will just put that. See how this you. g m due to the presence of i r, r s, series resistance, turns out to be g m 0. That is, transconductance without the series resistance and r s. It is related like this. Let us quickly, maybe I can just go through that. See, for example, if I take the MOSFET, I have a resistance there r s. That is the source resistance. Now, I have the v g s applied. Now, I will say what we are trying to find out is v d d is there v d s. What we are trying to find out is, if I have delta v g s here, how much is the delta v g s here? How much is the delta v g s here? This is actually delta v g s 0. If r s is 0, delta v g s equal to delta v g s 0. This drop is delta i d into r s. So, you have got delta v g s equals delta v g s 0 plus delta i d times r s. Now, divide right through by delta i d. See, what I want is delta i d by delta v g s. So, delta v g s by delta i d is equal to delta v g s and writing is divided by delta. Oh my God, that is really bad. So, that is delta i d plus r s. So, this quantity first term is 1 by g m that you get. And the second quantity is 1 by g m 0. g m you would have got if these were equal and plus r s. Now, you can see, you can now go back and see that the g m. So, this is actually equal to g m 0 1 plus g m 0 times r s. So, now you can see g m is equal to g m 0 by 1 of that. So, this is what we have said there. So, what happens is now your g m becomes like that, but it comes up by that. So, you can see if r s is large, g m is correspondingly reduced. Now, r s becomes larger because of these shallow junctions and fin fat, all those things. So, the need, there is a need for reducing that r s to increase the i d and also to increase the transconductance, to increase the driving capability. So, replacing source chain regions of the transistor with the metal can reduce the series resistance effect. Now, we should see what it is going to be. Now, there are other benefits. One is series resistance gets reduced, other one is in a conventional transistor you have got N P N. That is a bipolar transistor coming into picture. Particularly, if you in the soy device, if you do not have the ground contact, that is very much dominant. So, if I replace the junction with the metal semiconductor contact, you do not have the trans attraction, bipolar trans attraction is not there. So, that we will understand better when we, after we discuss the how that eliminates that, when we discuss the metal semiconductor contact. So, and also because there is no P N junction, there is no minority carrier injection there, which to the substrate. All those effects which you do not like are eliminated by putting a metal semiconductor contact. Still, you have got to see how whether it works like a transistor in a MOSFET. So, you can use abrupt, atomically abrupt junction by using a metal on the surface. So, all those limitations of shallow junctions etcetera goes off with this. Further, if I am replacing this junction with a metal semiconductor contact, your processing temperature goes down because you are just evaporating metal. At the most, you may do some sort of annealing at about 400 degree centigrade. So, that way your thermal budget on the wafer is reduced. That is one of the very important things people worry about. Try to process at as low temperature as possible to keep for a bigger wafer, wafer bar page etcetera is reduced if you process at low temperatures. You have to work worry more and more about this. If you go to 8 inch, 12 inch, all that effects you try to minimize. So, lower temperature, do not be carried by a low temperature. Usually, when you have to go to a physics person specialist, low temperature, he will immediately think ravagenic temperature. But we are talking of low temperature, if it is 500, 600 degree centigrade, it is low for processing. So, this is actually just to show that really that type of devices have been fabricated. You can take a look at one of the papers which has come, which gives a very good review even as 5 years back. Even now, that is a classic paper which people refer. So, that is why I put it here. In IEEE Transactions Alternative Devices, it is a long paper which gives some sort of review of the devices. This is the cross-section, TM cross-section of a 20 to the nanometer short key barrier source T metal contact. This is the gate and you have the, you can see this, I do not know, you can see the dark portion there. This is shown here by this portion. This is a platinum silicide, which acts as a metal simulator to contact. There is no junction. In the previous case, you put some silciding etcetera, you do, how do you do? You have that there, N plus is there. Junction is different, but now use that as the, use platinum silicide as the metal semiconductor to contact. There you can get a junction like this, which goes underneath that. You can get self aligned structures. We will come back to this when we go to transit traction. Right now, what we want to take a look at is the schematic of the short key barrier. These are all the depletion layer bits. Let us not worry about it at this moment. We will have occasion to discuss details of this when we come to transistor. So, main thing that focus is, you can get the metal semiconductor of this shape. You can get abrupt junctions here and you can get this gate, which is polysilicon and you have got the spacer layer on both sides that I am sure it has been elucidated in the previous lectures. So, you have got the spacer layer. So, there is no shorting effect when you put this platinum. You can just lift off that from there and you have the platinum only here. Till side, it will spread laterally under these into that, but it will not be like spreading with the junction. It will just, small spreading. Now, what are the requirements here? This metal semiconductor contact should form a very low barrier here. If it is a N channel device to the N type region, it should form a very low barrier. Why it should form a very low barrier? It should be able to inject electrons to that barrier, to the barrier. Also, if it is a P type substrate, it should form a rectifying contact. So, there is requirements. It should make a good omicontact on to N type material. It should make a good rectifying contact on to P type material. So, when we have an inverted channel here, that will form an omicontact there. So, these are the requirements which I have put here. They are summed up in all whatever I have said, they are summed up here. CMOS, you have got N channel and P channel both. When you put a metal, you will have N channel there. So, you must have an omicontact on to the N channel. If it is P channel, you will have N type substrate, P channel here. That should make omicontact to that. So, there are conflicting requirements here which can be met by how we will see. The idea may not be very clear right now, but when we talk about the metal semiconductor contact, it will become clearer. In fact, few years back, people were not talking much about metal semiconductor contact. It was only a part of syllabus where somewhere they put one 10 minutes discussion on that and proceed, but today it has become a matter of research, lot of discussion going on that. Now, let us get on to quickly on to, these are very simple concepts. You can go through that rather easily by discussing. First, when you say you need to have a low barrier height means it should be omicontact. So, on to channel, you would prefer a metal making omicontact. On to substrate, you would have a rectifying contact. What are they? Omicontact, low barrier height. Rectifying contact forms high barrier height. In MOSFET, metal semiconductor contact at the source should form an omicontact to the channel. Short key barrier junction leads to fundamentally different mechanism. That is what I am just alerting right away. Now, omicontact, high characteristic like that, whoever knows. Ideally, it should be vertical, 0 voltage drop, but you can never get to 0. There will be finite resistance. Rectifying should have block current flow in this direction and it should have current flow easily. Ideally, it should be vertical here, 0 there. You never get there. So, now, let us get down to discussion on the, all of you are familiar about the energy band diagram. So, it becomes easy to analyze this metal semiconductor contact with the metal semiconductor with the energy band diagram. This is a metal block. This is an anti semiconductor. They are two are separated. They are not connected. They are neither physically in contact nor electrically in contact. So, metal has got the permeable there and that is the vacuum level. So, what you do is, you have the term called the work function difference, which actually is the energy difference between the vacuum level and the permeable. Virtually, it gives an idea how much energy you must supply to the electrons to take it away from the metal. See, for example, if you take a metal, if you heat up red hot, it emits electrons. That is, you are giving energy much more than that 4, 4.5 electron volts energy by heating with red hot. If you see the old vacuum tubes, you will see that there is a filament, which is heated, which is the source of electrons. So, that is the work function. Now, semiconductor if you take, the vacuum level is same here. Conduction band, balance band, n-type. So, permeable is closer to conduction band. That is the term called the electron affinity that is chi. That is the energy difference between the vacuum level and the conduction bandage. And the work function of semiconductor phi s is the gap between the vacuum level and the permeable. Now, next what we do is, so we are taking a case where phi m is greater than chi s phi f like this. So, you can immediately say that if you join these two metals, need not join, keep them close by, connect these by external wire. It becomes a complete system. These are the definitions. So, when I connect them together, there is a gap. That may be a small gap. This is a complete system. So, what happens is, because the here, because the permeable is above this and there are lot of electrons at a higher level here, occupied, because it is n-type. There is lot of states available here. The electrons, like the p-n junction, electrons will get transferred from the n-type region to this metal. So, leaving back a depletion layer, plus charges behind here like that. The plus charge is the depletion layer, a finite width here and the electrons have gone transferred on to this. I have put these negative charges here. One negative charge I have put here. If there are 10 charges here, there will be 10 charges here. So, many electrons have transferred. Now, this is what happens to the energy band diagram. This layer is depleted. Metal, the number of electrons are very high. There will not be a layer. There will be a charge sheet of large concentration of electrons on the very surface itself. That is why you do not have a depletion layer or accumulation layer. There is a charge sheet there. Now, if you take the energy band diagram, this is n-type. This is depleted and plus charges are there. Through this gap, the electric field will terminate on to the minus charge, because plus charges will look for negative charges. They are here, because they have been transferred from here. So, you have got an electric field from the semiconductor to the metal surface. Here it is distributed charge. Here, on the metal, it is a charge sheet completely. So, because there is electric field from this side to this side, the energy band diagram will be moving in this fashion, because this is negative, this is positive. So, if I have to take an electron from this side to this side further, it is more difficult, because plus minus. Electric field is from right to left. Therefore, it becomes difficult to take the electron from the right to left. That means, the energy band diagram will be moving up. This is getting back again to the basics. Similarly, the electric field will be maximum here, but it will be varying here. It will be linearly varying. Potential will be parabolic, like all the discussions that we have been doing. So, you have got the n-type material here. As you move from here to here, more and more depletion, it becomes less and less n-type. So, you can see the conduction band moves away from this formulable. So, conduction band moves away from the formulable, telling that this is depleted. And this energy band diagram is bent up here, telling that the electric field is in the direction. So, and delta is a gap. Now, what I do is, these are standard textbooks everywhere. You see these types of diagrams, including the book, which we had written at Chotham but that also all the diagrams are there. So, I reduce this gap. The charge transferred to me is the same thing, because this has happened till the formulable has equalized. You do not draw the formulable here in this insulating portion. You do not, that is not happening. Meaning, you stop it there. They are equalized. So, if I reduce the gap, the charge here and charge here is not changed, but the gap is reduced. So, what will happen if the voltage is reduced? Field lines are same. Number of charges here, number of charges are same thing, because that has helped me to transfer and bring the formulable equal. So, because the charges are same, the gap is reduced, the voltage drop is reduced. See the chi, this is the vacuum level. Whatever potential change is there in the energy band diagram here is reflected on the vacuum level also. Further reduced, I reduce it further. The voltage drop is reduced further. There is a small voltage drop in that layer. If there is this layer could be a small monolayer of oxide even present there, which usually is present. So, that is the thing. We have got electric field here. Electric field here, there is a drop B i across this layer. Now, psi m is that per function difference here to the vacuum and there is a drop here or voltage rise here. This is the conduction bandage in the semiconductor. Chi is here. So, the vacuum level is slightly dipping here, because there is a voltage drop. All the energy band diagrams bend. Only this, which does not bend is the formulable thermal equilibrium situation. So, phi m and this particular height, energy difference, this is I pointed it, written it as phi B n, which is in electron volts. I call this as a barrier height for electrons. I call this as barrier height, because if the electrons have energy greater than phi B m, after all in the metal at room temperature, there will be electrons beyond this point. They will be above the formulable. They will not only be here. At 0 degrees, of course, there will not be electrons above that, but at room temperature, there will be electrons from here up to certain height. Now, all those electrons, which are having energy is above this phi B n, find a very thin layer. They can cross this by tunneling. If it is 1 nanometer or of that order, those electrons, which have energy greater than that can tunnel. So, phi B n is the electrons, which are having energy less than this. That is phi B n. They cannot cross, because there is a, this region, there are no states. There is an energy gap. There is a band gap here. So, but here, immediately it sees the available states in the conduction band of this. So, they can tunnel. Similarly, electron present here can tunnel from here to here. So, we can discuss this. Ideally, when you talk of the Schottky barrier or metal semiconductor contact, you do not show this layer, because that is not really coming into picture, because carriers can tunnel from here to here and here to here. So, phi B n is phi m minus chi. If that drop is negligible, it is phi m minus chi. So, normally do not show this gap. So, that is what is shown. So, wherever you see the energy band diagram for metal semiconductor contact, you will see only for n type like this. So, formula level of metal aligned with respect to formula level of silicon and there is depletion layer here. Depleted n type material has got plus charge and the minus charges are present here on the surface, which will terminate on this. So, entire voltage drop is across the depletion layer here. So, here to here, that is what we talk. So, phi B n is that barrier height, whichever what we have discussed, that is phi m minus chi. Phi m minus chi is the phi B n. That is 0 level. Now, wherever there is a depletion layer here under thermal equilibrium conditions, you have got what is known as the built-in potential. Just like in the p n junction. In the p n junction, that is shared between the p-type region and n-type region. Here, it is entirely on the n-side. There is no voltage drop in the metal. So, this is a built-in voltage. So, built-in voltage is actually the voltage rise from here to here like this. If I know phi m, work functional metal and if I know chi, chi, electron affinity, it is known for a given semiconductor. For example, for silicon, it is 4.0 for electron volts. For gold, it may be close to about phi electron volts, phi m. So, phi m minus chi is known because of materials there. You can even measure it from the characteristics of the device. So, otherwise you can say once you know phi m and chi, you know what is phi b n is. Now, once you know the doping in a semiconductor, you know what is the energy difference between the conduction band and the permeable. So, phi m phi b n minus c c minus c f gives you that q into v b i. So, built-in potential is related to the barrier height and the doping. If the doping is higher and higher, this will not change, but the e c minus c f will decrease. Therefore, your built-in potential will become closer and closer to phi b n. This is the idea. Now, let us just go further into things. This is the, we will see that a structure like this, a metal semiconductor contact, n type material with phi m larger than chi will act as rectifying contact because there is large barrier for electrons from either side. How does it work out? Let us see. Thermal equilibrium situation, I do not know whether you understand this type of diagram. I have redrawn whatever I have drawn here, I have redrawn here. Instead of putting this plus minus, I just put depleted here and there is negative charge here. On the left hand side, I have shown the distribution of electrons because there will be in a metal energy levels will be there continuously, but the probability of occupation goes down as you go from the Fermi level up. Let me just see whether I can and put that diagram. See, what is happening in a metal is, in a metal. You have got the Fermi direct distribution. How is the Fermi direct distribution? Energy versus probability of occupation, if you take, that is 1, the E F. Now, if you draw the Fermi direct distribution like that, it is half there at room temperature. At 0 degree, how is it? At 0 degree is like this. I just redraw that. At 0 degree, it is F p is 1 here. It is like this. Below Fermi level, all the levels are occupied. Above that, they are not occupied. Now, let me just go back to this and see where you can remove that. So, just to make it, everything on. Let me just clear out everything. Just redraw that once again F e and energy. That is 0, Q E F. So, above room temperature, it is, this is 1. So, you will have it going like that. Probability of occupation is half there. That means, there are, if there are levels there, the implication is the Fermi function. You write it as 1 by 1 plus e to the power E F minus E minus E F by k T. That is the plot there. That is the Fermi function, probability function. So, when you write like this, meaning is, if there are levels present above that, that will be occupied. So, in a metal, what I have drawn is, that is like that. In fact, it will not be precisely like that. It will be something like this. That is, it will be going down something like this. Below that, I am not showing. That means, these electrons are, they have got energy above the Fermi level. So, if there is a barrier, if there is a barrier like this, like this, if there is a barrier in this fashion, that is a barrier 5 B n, these electrons above that can cross. There is nothing which brings it from going from there to there. And if there are electrons on this side, they can cross on that side. Now, how is it in the conduction band? Semiconductor, you have the Fermi level here. You have the Fermi level here. Your Fermi direct distribution may be, how will that be? I will put it like that. E f is here. Your Fermi direct distribution may be something like this. The problem of not drawing it beforehand. So, if this is one there, I am taking a bit time. I hope you do not mind this. So, I have this. Just one minute. Take it once again. See, what I am trying to draw is the Fermi direct distribution on this graph, where that is the Fermi level. And now, you will have the line there, energy. This will be half here, like that, probability of occupation. That is the f e. What about density of states? In the conduction band, it is continuous. But the density of states is something like this. 0 there and goes like that. So, the n at any e is equal to, if I call this as g times e, density of states, g times e into f e. So, if I draw the, that is, this is a probability. This is the density of, that is, at the conduction band, this probability of density of states is 0. It keeps on increasing, but probability keeps on increasing. So, your net distribution comes like this, something like that. See, this is 0. Probability is there, but so the, the, if I go from here to here, if I draw the product, these two things together, that will be 0 here. It will increase and go down like that. It is, even though you find out effective density of states with respect to conduction band, the actual distribution will be like this. The 0 here, number of atoms, as you go away from the conduction band, it will slightly increase, then fall down to 0. See, product of probability, because the probability increases, I am sorry, probability decreases, density of states increases. Product actually goes through a peak somewhere here. So, now, let us go back to this diagram. Now, I have drawn that here. This is the electron distribution here. When you integrate the whole thing, you get that N c. You find out effective density of electron. When you find out, you integrate the whole thing there. So, here you can see now, under thermo-equilibrium conditions. You have got the distribution like this, which is above that here. So, all those electrons here can move that side. All those electrons from the metal here, under thermo-equilibrium, when the Fermi level has equalized, definitely number of electrons which are able to cross from here to here, must be equal to number of electrons crossing from this side to this side. I can write, say that the current density due to the electrons moving from the semiconductor to the metal, because they have got energy above the barrier. This is the barrier. I can write it as Q for the charge of electrons N. Density of electrons here, whatever electrons are available here, will have thermal energy or thermal velocity v x in that direction, because we are taking one-dimensional case. So, across that barrier, how many electrons per second are crossing? That will give rise to current density. So, I can find out this current I naught. If I know how many electrons are present here, because all of them can move here. If you plot the electron density from this end to that end, we put it as a depleted layer. When we say it is a depleted layer, the implication is there are no electrons. But from here to here, if you go, there is a potential variation. If there is a potential variation like this plus minus, that means electron concentration is decreasing exponentially with respect to that. So, if the drop from here to here is V B I, from that point to that point, if it is V B I, the electron concentration just at the edge of this junction, metal semiconductor junction, will be whatever electron concentration there in the semiconductor bulk multiplied by the bulk is N N electron concentration N region multiplied by e to the power of minus V B I is the potential drop built in potential N N into e to the power of minus V B I by V T. V T is K d by q. This is the Boltzmann's law. When there is no current flow, I can say that carrier concentration is that. Now, all those electrons are having thermal energy there. Because of that, they are above this barrier. So, those electrons can cross from here. If they are, if you have a directed field, they will move in that direction or it will be moving up and down. So, we are considering that the electrons are moving here with the velocity V f x. So, the current is q N into V. That I think that is a basic equation which we use even by deriving the MOSFET equation charge into charge density into velocity. That is the current density. I multiply by area, I get the current. So, from the semiconductor to the metal, there will be current I naught. What is the current flowing from here to here? You do not have to calculate, because you know the current net current is 0. So, from here, all these electrons which have high energy should give exactly opposite current. So, what we are saying is when the energy band diagram is like this under thermo equilibrium conditions, there is exchange of electrons, free exchange from this side to that side. And since the net current is 0, whatever is injected from metal to semiconductor is balanced by whatever injected is from semiconductor to the metal. So, this is the energy band diagram under thermal equilibrium conditions. Now, let us see what happens when I have bias condition. How does it work out as rectifying junction? So, I hope the diagram is all clear. Electron distribution of function of energy here and here. Now, what we have shown is whatever I have discussed there, put it in terms of equation. We are considering only this now. That is, N of x is like this. J naught from metal to semiconductor to the metal is this, Q N into V of x and N s is equal to N N into V to the power minus V V of V t, K t. We are trying to make it compact. So, what is N N? In an entire material, the electron concentration is equal to effective density of states into E c minus E f by K t minus. This is the standard formula. So, that is the standard formula, which is substituted for N N, this term, into V to the power minus V by K t. I have restated what I have written there by substituting for N N. Now, what is this quantity? E to the power minus E c minus E f into E to the power minus Q V V b i by V t. What is that quantity? E c minus E f is this, Q V b i is this and E c minus E f plus Q V b i is this quantity. That quantity is nothing but phi b n. So, what we are telling is this whole thing can be put as N c into E to the power of minus phi b n by K t because sum of these two is that. That is phi b n. So, that makes it simple. That means, electron concentration there here is equal to N c e to the power of minus phi b n by K t. Now, the J naught. What was J naught? We said Q N s into V of x. N s is this one. Q is there, Q is there, I substitute for N s from here. The 1 and 2 N s is given by this. So, that is Q N c into E to the power minus phi b n by K t by V s. Same thing I have read it up. So, this quantity inside here is decided by the density of states and the thermal velocity of atoms in that direction. So, J naught. Now, you can see usually what you refer to in the diode J naught. You will see that this also for the diode also that is the reverse saturation current. We will see how it is. That depends upon barrier height phi b n and phi b n depends upon phi m minus chi, phi m minus chi. So, J naught will be low. So, it depends upon phi m minus lower if phi b n is larger. J naught will be higher if phi b n is reduced. Low barrier height J naught will be higher. Now, you can see that if you have a diode which is J naught is very large. It looks like a very leaky diode. It will look like a omicontact. So, you can straight away say that if I make a device where the phi b n is low, it will look closer to a omicontact. If I make a device with the phi b n large, J naught will be low. It will look it will be closer to a rectifying contact. We will see how it is. So, now I just rewriting this again. J naught is equal to that quantity. Now, we have to recall some of the formulae that are available already in the basic device physics that you have studied earlier. N c is related to the effective mass of electrons k t and Planck's constant and this 2 3 by 2. So, N c is that quantity. I am just substituting now for this and V of x for the electron gas, the thermal energy is root k t by 2 pi m n star. Multiply these two together and simplify. You get some constant a star. All these things will have to be constant. Here, t to the power 3 by 2 is there. Here, t to the power half, you get t square. Other things are constant that I pulled it out as a star. A star is this quantity. What is m n star? Effective mass. Effective mass is mass of electrons in the semiconductor which will be different from the mass of electron in free space because of the presence of built in electric fields when the atom moves, when the electron moves from one location to another location. So, to make life easy for us, so that you can still use Newton force, loss of force. You make use of force is equal to mass in the acceleration. Talk of effective mass. So, that is effective mass. So, it is a star that is constant. t squared comes from here into the same thing. What I have written there is here. J naught will be a star t square e to the power minus 5 P n by k t. And a star when you substitute for all these quantities q, k, pi, etcetera, you will get 120 m n star by m naught ampere per centimeter square per degree kelvin square. Why I put it in the form is the m n star by m n m naught depends upon the semiconductor. If you take silicon, it will be almost close to 1. Slightly different. If you take gallium arsenide, it will be 0.067. That is very, very small. So, this a star in the case of silicon will be close to 120, slightly smaller. But in the case of gallium arsenide, it will be 120 into 0.067. It will be about 8 or so. So, that a star will be 8 amperes per centimeter square per k square for gallium arsenide. So, that is why I put this. Because you do not have to remember every time all the whole thing, 120 m n star by m n ampere. So, you know the effective mass in terms of mass usually. You can get that constant. Calculation becomes ready for you, this square into this, pi b n pi minus chi. So, that is what we get for we have calculated. This is the value that current that will be transferred from here to here and here to here. That is J naught, net current is 0, thermal equilibrium. Now, reverse bias. I will at least be able to finish this. In the reverse bias, what happens? If you see here, the permeable was here. In the reverse bias, what happens to that? How do you reverse bias? Like in the p n junction p and n, if you have, here you have metal and n. I make this n side plus. I apply voltage V r into that. The applied voltage will not appear across the metal, where the huge current will flow through the thing. So, because it is like a metal and as insulating layer here, depletion layer. So, the entire voltage adds on to the built-in potential across this. Depletion layer widens. The voltage drop across this layer increases, becomes equal to V B i. V B i, what was the polarity? Plus here, minus here, plus minus. You can see that. Plus here, minus here. Band is like that. It adds on to that depletion layer widens. That is the reverse bias situation. So, this portion I am keeping it as it is. With respect to that, the voltage has increased here. That means, the band bending has taken much more. So, this earlier, the Fermi level was coinciding with that, but now it has moved down by an amount equal to V B i, V r. So, entire energy band diagram, originally whatever was coming up here in this portion has come down by equal to V B i. So, if you go beyond the depletion layer, the charge distribution remains the same thing. I do not know where you can go quickly back. See, whatever was here, this portion has been pulled down. This in the neutral region, this equilibrium diagram, whatever I have drawn holds good. But beyond that point, I do not draw the Fermi level. That has no meaning really. You call it as passive Fermi level. So, I just draw it here. And here, in this portion, the band moved down because the voltage has increased. That is moved down. Now, what has happened to the charge distribution now? On the left-hand side, the barrier has not changed. That is a key thing. The P N junction, the barrier will change on the P side as well as on the N side. Here, the barrier does not change because there is no voltage drop in the metal. So, the barrier remains the same thing. So, all these electrons which are able to give rise to J naught or I naught from due to transfer of electrons from here to here, they will be there. So, I have put a current here in this direction, implying electrons are flowing in that direction. See, if the electrons are crossing from metal to semiconductor, current is from the semiconductor to the metal. So, there is that I naught component is still present to transfer of electrons from the metal to the semiconductor. But what has happened to the electrons here? The electron distribution from the bulk is the same thing. Number of electrons available in the semiconductor in the neutral region that has not changed. That distribution remains the same thing. Since you have pulled the potential energy down, this actually is the energy distribution from here up to this point only. So, the maximum number of the electrons are available only up to certain height in the energy. Beyond this, there are no electrons. So, when we apply sufficient reverse bias, they are not able to cross from right to left. So, whatever J naught was there from the right to left or whatever electrons were there from right to left is brought down to 0. But whatever electrons transporting from metal to semiconductor are still there. That means there is a net transfer of electrons from the metal to semiconductor. There is no transfer of electrons from the semiconductor to the metal. So, whatever was transferred from the metal to semiconductor was I naught. But I have put the I naught as the physical direction. Physical direction is the opposite to the transfer of electrons. So, you will have a current in the direction for this supply voltage to the metal giving rise to that same J naught whatever you have calculated. So, with that I think we have just gone through the basic principles involved in the reverse bias operation or the thermal equilibrium situation of the metal semiconductor contact. More details we will discuss in our forward base, how it works, the great fair we will discuss in another discussion.