 In this video, we're going to watch a series of instructions as they progress through this five-stage architecture. Specifically, we're going to be looking at what happens to all of these interstage registers as our instruction progresses. What do each of these get set to? And what does that mean for our computation? In this case, I've got five different instructions here. And I'm going to be keeping track of all of those interstage registers that we've got. We have different sets of registers between each of our pipeline stages. So we have a different number of registers between those stages as well. To get us started, I have some data in our registers and a little bit in our memory. I've already started by filling in what the instruction register will have at the end of the first cycle for each of our instructions. So the first thing I'm going to be interested in is the program counter plus four register. This one takes the program counter, adds four to it, and just stores it into this interstage register. So I should take my current program counter, add four to it, and then store it into this register. Since that's all we do in the first stage, we're done. We've got both of the values for those two interstage registers. In the second stage, we need to calculate a whole bunch of things. We'll have a number of control signals, as well as some of the data coming out of our registers, our sign extended immediate, and some of the fields from our instruction as well. So the function code for our add instruction is 20. We will get the data from stack pointer and register zero. Stack pointer currently has this data in it. Register zero, of course, has zero in it. So I can copy that data in there. For the immediate, I would take the least significant 16 bits from the instruction and sign extend them. So in that case, the least significant 16 bits are the 1020 and hexadecimal. And that would mean I would just add a whole bunch of zeros in front of that. My destination register is v0. My RS register is stack pointer. And the RT register is register zero. I'll need to know what the ALU source is in the next cycle. So that will have to be stored in this register. And since I want to add the contents of data one and data two, the ALU source would be zero. This isn't a memory read instruction or a memory write instruction, so both of those will be zero. And since I'm not going to read anything from memory, the mem to write multiplexer will also be zero. I will want to write something back to the registers eventually, so that control signal will be one. So you can notice that a number of these control signals won't be used anytime soon. Many of them are passed on to the fourth or even the fifth stage of the pipeline, but we'll need to store them in a register for the meantime. The second cycle, though, our second instruction comes in. So now we'll want to increment our program counter again. And as before, I've already converted the instruction into machine language format. In cycle three, our first instruction gets to stage three. It's going to do some operation. It's doing some addition. And the results are not going to be zero. So that register will be zero. The result, though, is the stack pointer plus zero. So that will really just be whatever the stack pointer is already. We're not going to use data two, but that would be zero because it would just be passed from the data two register. Our destination register is still v zero. Our memory signal is still zero. Our memory write signal is still zero. M to register is still zero. The register write will still be one. Now we've got our Out of Mediate instruction. So the Out of Mediate instruction doesn't actually have a function code, but we've still got stuff in those six bits. So we're going to take those and use those to fill in the function code field. Data one will come from t zero. So t zero has the value of seven in it currently. Data two will come from s zero. S zero has 15 in it. So even though I'm not actually going to use source two and data two, I'm still going to get some data out on that line. And it's still going to be used to fill in that register. The Mediate, again, is the sign extended lower 16 bits. Even if they're not immediately useful, which in this case they are, they correspond to negative four. Destination register will be s zero. RS field is t zero. The RT field is s zero. For ALU source, we will want to get sign extended immediate. So we'll set that multiplexer to one. We're not doing a memory read instruction or a memory write instruction. So all three of those control signals will be zero. But I will want to write the results back to the registers in the end. For our third instruction, we just need to increment the program counter. We've already gotten the machine language instruction out of memory. Now we can move on to cycle four. Cycle four will get something out for our read data. But since we're not actually doing a read instruction, we're not going to get anything meaningful out. We should just get a bunch of zeros. We're not actually going to go access memory. We will get a result from our ALU. It's really just whatever we had for our result before. And our destination register is still the same. Fee zero. And the reg is still zero. And register write is still one. We're just continuing to pass those control signals down until we can actually use them. For our add immediate instruction, that's in stage three now. And we'd like to know if the results of our computation will be zero. So in this case we're adding seven to negative four. And we will get three out. Three is not zero. So the zero line will be zero. Data two is still 15. Destination register is still S zero. Memory is still zero. Memorite is still zero. And reg write is one. Our third instruction reaches the instruction decode stage. Our function code will be the least significant six bits, even though they're not actually useful for this instruction. Data one will come from the stack pointer, which we had up here. Data two will come from S two, which is 17. Sign extended immediate is just four. Our destination register is S two. RS is the stack pointer. RT is S two. For our ALU source, we will want to use the sign extended immediate. So that means we'll set that control signal to one. Again, we're not going to read from memory, but this time we are going to write to memory. Since we're not going to write anything back to the registers, we don't really care what our mem to reg multiplexer does, but we don't want to write anything back to the registers as a result. For our fourth instruction, we just get the instruction out of the instruction memory and increment the program counter. We can now move on to cycle five. Our first instruction is just going to write all of its results back. So you can notice there are no more interstage registers here. We don't have any more of the purple rectangles that we might want to store data in. We're just storing data back to the registers in this cycle, so there's nothing more for us to keep track of at this point. We could, however, update our actual registers over here. We're storing this data into V zero, but we won't be using the interstage registers for this instruction anymore. Our intermediate instruction is not a memory read instruction, so again, we're not going to get anything meaningful out of the data memory. Our ALU result is just the same as what we had before, so that's three. Our destination register is still S zero, mem to register is still zero, read write is still one. For our store word instruction, we're going to add the stack pointer to four, which will give us that address. That's not zero, so our zero line will be zero. Data two is still 17. Destination register is still S two. Mem read is still zero. Mem write is one. Mem to reg, we don't care about, and we don't want to write anything back to the registers. For instruction three, we're doing a load word instruction, and the least significant six bits from our instruction are zero, so the function code will be zero, even though we're going to ignore that data. Data one is whatever the stack pointer is. Data two is whatever's in V zero. Sign extended immediate is just zero. Our destination register is V zero. Our RS field contains the stack pointer. RT field contains V zero. We want to add our sign extended immediate to something from a register, so we'll set the ALU source multiplexer to one. We are doing a memory read instruction, so we'll set memory to one. Mem write to zero. Now we want to be able to write the results from our memory read instruction back to the registers, so we'll set the mem to read multiplexer to one, and we will want to write that back to the registers. Fifth instruction is now making its way into the pipeline, and we've pulled the instruction out of the instruction memory. Now we just need to increment the program counter. In Cycle six, our first two instructions are basically done, and we're just left with our last three instructions. So our store word instruction didn't read any data out of memory, so we'll have zero for our read data. ALU result we'll just copy over from the previous stage, along with the destination register, the mem to read signal, and the register write signal. Our load word instruction adds the stack pointer to the immediate and comes up with something that is not zero. We will copy data two over. Destination register is v zero again. Mem read is one. Mem write is zero. Mem to read is one, and read write is one. Our fifth instruction is an R-type instruction, so this time the function code actually matters, and we can just read that from our instruction as being 22. Data one is the data in a zero, which is the value three, and then our second data is t two, which is nine. Sine extended immediate will give us one thousand twenty two. Our destination register is v zero. RS is a zero. RT is t two. The ALU source multiplexer will be set to zero because we want to take our second data from the registers and pass that to the ALU. We're not doing a memory read or write instruction, but we do want to store our results back to the registers. One other thing we can do is we can update our registers with the results of our out-of-mediate instruction. So we did an out-of-mediate instruction, and we set S zero to the value of three. In cycle seven, we're just left with two instructions. Three data coming out of the address indicated by our stack pointer gives us the value of 28, and then in previous stage we should have stored value of 17 into the address calculated by our store word instruction. Our ALU result just carries over from the previous cycle along with our destination register, the mem to reg, and reg write signals. Our subtract instruction is calculating three minus nine, which will give us negative six. Since that's not zero, the zero line will also be zero. Data two is nine again. Destination register is v zero. Mem read is zero. Mem write is zero. Mem to reg is zero. And register write is one. In cycle eight, we would store the value of 28 into the destination register of v zero. Now we're just left with our subtract instruction. It's not going to access memory, so it's not actually reading anything out of data memory. ALU result is still negative six. Destination register is still v zero. Mem to reg multiplexer is still zero. Register write is still one. The last cycle, cycle nine, the results of our subtract instruction would be committed back to the registers, and we would update the value of v zero with negative six. So this is what we would get for watching these five instructions as they moved through our pipeline. They're going to update all of the interstage registers as they go with their temporary results. This allows us to keep track of what we need to do in the next cycle without having to maintain the entire pipeline for every instruction.