 Rhaid i chi'n bod nhw'n gweithio. Rhaid i chi i ni. Rhaid i chi i chi i ni. Rhaid i chi i chi, rhaid i chi'n gweithio'r cyfnod ar gyfer. Rydw i'n gweithio'r cyd-fyrddau gyda'r sylwyr i Lleinoxyn ar y rhaid y 90-rhyw. Rydw i'n gweithio'r cyd-fyrddau, rydw i'n gweithio'r cyd-fyrddau ac yn y cwrdd cyflaperiaid. Ac yna ym 7 ym 7 y gallwch chi'n gweithio'r cyd-fyrddau. A rydym yn gweithio'r cyfrachau, People would say, how is anyone going to build a business help open source? Why do we don't want to use that, why do we don't want to move from windows, dispar, heads more required, etc, etc. I'm laughing now. So ranked earlier this year, I decided to start getting a little bit bored with Open y gwleidio ymwneud fel y byddai'n ddifo i gyd yn ymwneud. A dyma y gallwn y bydd yma ymlaen, efallai ymdweud ym mwynhau, dyma efallai ymdweud ymdweud. Felly, dyma'r cyfnod. Felly, gallwn i'n gwybod, wedi gweld i chi, ond yw'r cyffredigau, dyma'r cyfnod yma wedi ymdweud ymdweud sicr gan eu cyfnod. Almost every piece of infrastructure in the world is now running on Linux, including Microsoft. So you know, it can totally transform the software supply chain. In the early days you remember that, you know, software used to come in boxes. Now, that seems like complete enough madness. So, you know, open source clearly a good way to go and I don't need to tell you guys you're ready to do open source. ar gyfnodd gwahanol. Rwy'r cyffredin gyda'r gweithio, mae'n debyg, yn zeithio i felch i ddweud ffabwchol. Mae'n ddweud, mae'n ddweud i'r ffabwchol ar gyfer, yn ei ddweud. Gweithio'r cyfnodd eu ddweud y gallu'r cilio'r cyfnod i'r cyfnod y 28nm? Rwy'n ddweud o'r cyfnod y cyfnod. Ynw'r cyfnod yn 50,000,000. Yn y 28nm. Rydw i'r cyfnod, 50,000,000,000 i 100,000. Rydw i'n ddweud... Oh, I actually drive my spine. So in a recent article in the Times, Dave Paterson from the Spirelab in Berkeley, asked the Times readership the same question. And this was the response. So the reader average was the smallest die you could get. Twenty people assume the average is about 2.3mm. Get minimum die run of about 190. Average cost per intestine die. So, y total of costs, reader average, came out as $100,000. With a standard deviation of half a quarter of a million. And, so this is, the actual value, this is from the Aspire lab that do a lot of having of chips. Is the smallest AI you can get on, I think this is actually TSMC. Is this going to be TSMC? It's probably tears me in, see. So, well, I'm quoting Dave Passon on this one. So, well actually no, because you can go and actually, you can go and actually read the numbers. So you can go and, we have a nicest thing in Europe called, Europe Practice. And you can go there and you actually, I believe that this is an academic prize. Felly, add another 50% for commercial price, okay? So commercially we can assume there's a bit of variation in this. I may be misquoting this might be 45 as well from the article. But it's wise to say that it's... So the article that this comes from was arguing that for actual manufacturing of silicon, it's now possible to do, A, an agile type process because your individual cost runs are low enough that that's a fraction of an engineer per year. Even if the prices you've probably been quoted, it's still within a year of an engineer's time. So the benefits, cost benefits are quite a different place than the 50 million that is what people assume. Yes, a lot of these are you waiting a quarter before you can run a thing. So is everyone still hearing me okay? It does sound like the sound's gone off. It sounds like it's cut out to me. Yeah, that's because the light's gone off. No, I think it's just run out of battery. Okay, right. Fingers crossed it helps. Okay, so, so yeah, so, and as part of this, a spiral I've in Berkeley's been pumping out a large number of open source processor designs. So we're now got open source processor designs, which have actually been fabbed, which I think is one of the, is something new in the last couple of years because I don't think OpenRisk ever really got fabbed out and Parallela isn't actually an open source processor design. It's gone again. I'll just talk loudly. Oh, you got another battery? Okay, cool. Yeah, and combined with this, we can act, you know, we've got things like the z board now, which you can actually put a number of cause on and actually do a bit of open source processor design. So. So I've already mentioned the spiral up. So the back five years ago now they defined an open source instruction set is called risk five. And they did a good patent troll and made sure that this is something that no one can claim to have patents on. And it's a nice small instruction set, which makes implementations of it quite a bit easier. Keep going, keep going, keep going. And so, so Berkeley have a number of calls that they've implemented with this instruction set, which are open source. IIT Madras. IIT Madras have a call, an out of order call that they've implemented. Berkeley have a tiny call, a kind of flexible parameterised call and an out of order call. Um, there's been, you know, some individuals have done their own course, implementing the instruction set, so Clifford Wolfe's done one and Tommy Thorne's done one. Um, and I think I believe there's a commercial one done by blue spec guys. And I came across these guys because of the out of order call from to one of the things that people asked me is how capable are these? Of course, are they, you know, are they, are they something you can use a serious work? So this is the in simulation, the Berkeley boom, which is the out of risk call. So it's a 64 bit risk, risk call. Two, why three issue out of order six stage in simulation, they're hitting about just under four call marks for megahertz, which is, you know, it's, it's less, it's sub a knife, it's an eye fives around five, or what's to make it hurts, it's better than an encodex A9, it's probably about the same as an A57. And if you were to put it out on a 40g plus, yes MC, it'd be about a millimetre square. So you can quite fit quite a lot of these on a design. So that's, that's, that's pretty capable and I came across these guys because I was talking with the low risk guys who I think if anyone's here last year, Alex came along, gave a talk about this. So this is Rob Mullins, Gavin Ferris and Alex Bradbury founded a foundation to build an open source system on a chip. Kind of spurred on by, by these open source, by the fact that we now have open source processors that have been fabbed out. So that gives you a bit of, a bit of confidence that you can, we can actually fab something in a realistic time frame. So, so this kick this off about a year and a bit, a year and a half ago. There's been, it's been a GSOC project this summer. It's quite a lot of good stuff happened, including a bridged wishbone for those who are interested in the open, so we can use some of the stuff from open cores. And there's a few interesting ideas that are going to be executed in this as sort of partially research ideas like tagged memory. And using tiny little cores as your IO drivers, rather than doing custom, custom, custom circuitry. So, yeah, so, so my background before in the last few years, but I was involved a lot with the answer of projects that were going on around. And one of the problems you have is if you're trying to do, I'd have people coming to me who had very specific application domain problems and then trying to find hardware which was sufficient, the right shape for their application domain problem. And if you're trying to build something out of either, if you've got enough money going, buying stuff out, building stuff out of standard IP blocks you can buy it, or you're building stuff out of available silicon, you end up with a problem that you're just not building something in high enough volume for people to care about what you're doing. So either you can't, so most of the time you just can't even buy it, or if you get to a point where you can buy it, they mess you around because you're just not important enough to, you're not volume enough. And volume really matters to these guys because the cost of building a system on a chip is getting more and more expensive, because the commodity level's higher and higher, and, you know, so the margins are going down, so they care a lot more about volume than they ever have done. So my point of view, that sounds like a perfect storm where open source silicon design can start, we can start going after that system on a chip market as an open source community with a bit of commercial backing. So that's what I'm trying to do with Nerebus is help create, to help join up the aspects of this community, actually get us the, along with the low-risk guys, so it gets to the point where we're actually having some stuff. So on the application of this specific design, the sort of problems I had coming to me, one of the big parts of the problem domain is fast interconnect between cores and between sockets, between actual chips. And I was really happy to find out there was a project at Lawrence Berkeley Lab, which is, say, you know, across the road from nearby guys, to do a open source fabric, so it's called open-sock fabric. And this is basically, if you know anything about fabric, there's a guy called Bill Daly, who wrote the book, literally. And if you go and do what is pretty much best practice, sort of thing you'd find in a cray, these guys have kind of written it up already as really available open source chisel code. And there are a nice friendly bunch of guys who are happy to, who are nice to work with. So this is just kind of a top-level architecture for anyone who really cares. Does anyone know enough about fabrics and web-hole routing or VC routing to want me to talk about it? Maybe we'll do it separately. But yeah, so basically it supports lock-free routing, DOF, it supports wormhole and VC, and has a number of topologies, flexible topologies you can use with it, you can use it with. And also can look out AXI for, so you can start talking to IP blocks meant for plugging into ARM cores. I probably won't talk through that. I don't know, I'll literally picture the words. So where am I at with this? At the moment really I'm going around talking to people and trying to, because one of the things in this area, there are actually quite a lot of individuals, academic groups and a few companies actually doing some open source digital design, open source silicon. But it's very fragmentary at the moment. It's kind of a lot of not invented here going on, a lot of kind of individual people just doing stuff for a bit of fun. And so I'm trying to join the bits of the ecosystem together, get people talking and see if we can start having a bit more of a cohesive approach. So hence why I'm giving this talk today, and I've been giving this talk at universities. I mean at Edinburgh, I've been at Cambridge, I've been to Southampton, and I'll be giving this talk at Orconf in a couple of weeks' time. So if anyone is really interested, definitely come over to Orconf, that's where the excitement starts going to be happening at the moment. So that's the Open Risk Conf in Geneva, so it's at CERN on the 10th and 11th, I think, I think that's about it really. Excuse it for being a little on the fragmentary side, I've been up and down the country and slightly fried. So if you're interested in coming and talking about it, IRC, Low Risk of TC, Sashneribus, which currently just has me in, close created it today. Risk V on Free Nodes, riskv.ogs, a good place to go and read up about the ISA and the cause, they've got a couple of good mailing lists. Which bit you're interested in, opensockfabric.org for the fabric, Nervus at Consulate, a commercial place on the site, and at Concute Futures on my Twitter. OK, my email, you can go to nervus.com, it's on there. Any questions?