 Hello and welcome to this presentation of the STM32 Interconnect Matrix. It covers the main features of this matrix, which is widely used to connect various internal peripherals between each other. The Interconnect Matrix, integrated inside STM32 products, provides direct connections between peripherals. Applications benefit from these interconnections to ensure time predictable operations to decrease power consumption by avoiding complex management of peripheral communications through reading and writing registers using CPU instructions and in some cases reducing the need to loop the signal from a source to a destination through a dedicated GPIO. The Interconnect Matrix offers two main features. First, it ensures direct and autonomous connections between peripherals allowing the removal of latencies regarding software handling, thus saving GPIO and CPU resources. Second, the interconnection between certain peripherals can even operate during low power modes. The main peripherals having direct, autonomous interconnections are timers, analog IPs, clocks, GPIO, EXTIMUX, and system error for the connection sources. Peripherals may be interconnected using the Interconnect Matrix even when the circuit is in a low power mode. The operating modes that can be used are run, low power run, sleep, and low power sleep modes and timers, analog, and digital IPs for the connection destinations. The Interconnect Matrix is mostly used for synchronizing or chaining timers, for example, allowing a master timer to reset or trigger a second slave timer, triggering an ADC, DAC, or comparator through a timer event or an external interrupt, triggering a timer through an ADC when a predefined threshold value is crossed by the analog input. Timers can also be triggered based on a comparator output value. Calibrating HSI-16, MSI, LSI clocks, for example, measuring the external LSE frequency by a timer clocked by the calibrated internal oscillator, monitoring the temperature of a connected internal temperature sensor or the VBAT to ADC voltage, protecting timer-driven power switches through the direct connection of system error signals to the timer break input, and infrared pulse modulation signal waveform generation using two timers, transferring data on sub-gigahertz SPI using the DMA MUX and LP-TIM-3. This slide shows a simple example of timer synchronization. The Timer-1 is used as the master timer and can reset, start, stop, or clock the Timer-2 configured in slave mode. In this example, Timer-1 is clocking the Timer-2 so that it acts as a pre-scaler for Timer-2. For more details about the interconnect matrix, refer to the reference manual for STM32-WL5 microcontrollers.