 chaos simulation and machine learning there you go so first we need to go through the artificial intelligence that the current to the computer does not have so far the artificial intelligence it is self-learning it assumes and it adapts it predicts while our current computer can't do it that's what we trying to do okay so first I need to introduce the your morphic engineering why it comes from to use the transistors to emulate the ion channels Kavmeet from Caltech calling this term neuromorphic engineering because he found that similarities you guys can see this the transistor and ion channels they will have the same behavior that's why this neuromorphic come neuromorphic engineering comes from okay so there is some examples that the neuromorphic engineering has down one at the top left now one is the cochlear and downside that the silicon retina and on the left on the right side the the silicon neurons that can reproduce the biological behaviors of the biological neurons so far most of research has I mean in the previously most research has focusing on this sensors because we know how it works but now we move to the brain and move to the cortex and the more complicated things okay there's something has been commercialized the mouse from logic is designed by my supervisor Andre van Schijk and it has been sold about 15 million worldwide and the left is on the right side that the company are doing a commercialized one cochlear model and this one is I guess it's DVS which that only extract the dynamic changes of the silicon retina rather than the conventional camera okay your morphic engine on your morphic chip has achieved 10 one of the tense breakthrough technologies for last year I think one major reason is the IBM's true north chip which make very good advertisement for the whole field now people are knowing what we are doing yeah there's some neuromorphic processes developed world around the one is the brain scales from HBP project some people are thinking no better than me here and the spinnaker which is developed by the inventor of the ARM processor Steve Ferber's from University Manchester the idea is to put a bunch of ARM processors to simulate large-scale neural networks and also the right is the IBM true north switch to the start the last year they put one million silicon neurons on one chip very exciting and the other one is the Quangkong zeros chip which is a trying to put into production this year I guess and the HP the synapse memory this is the okay so this is one trend of the conventional CPU which we can see for the last 20 years the transistor size of the CPU have been doubled follow the Morse rule and also the energy consumption goes up quickly while the performance does not increase with the size of the transistors so okay so here is some work we have down to address the largest scale simulation it's called deep cell system which has been developed for two years it was developed for simulating large-scale spiking neural networks and we are focusing on the scalability and the reconfigurability and to make it easier for the users like the previous speak talk about to save the time of the scientists we make a pine comfortable interface and also it's open source design and it's a collection of FPGA design and the hardware at an analog VSI design here I'm gonna introduce the FPG design so we will we will make the whole design open source so people can download the very log for the hardware HDL code and the dumping to their own FPGA and around the largest scale simulation and because we have the pine comfortable interface it'll be very easy for people to use you don't need to have any idea about hardware design okay there's some comparison that we use the next which most people here are familiar with so all the models in the next which means you define one your model you create 1010 cells whatever they are identical and the network is flat and small and the speed is size-dependent your grade is a simulator developed by Kubena from University of Stanford University with 1 million analog neurons so in that system because it's analog circuit the models are heterogeneous when they're not identical and the system is hierarchy and large and it can run in real-time because it's analog system and in our system we can either make the neurons to be identical or they could be heterogeneous also in our system is population-based like the system designed in the NIST and Brian and they could could be super large in the system we have developed it can go to up to 5 billion neurons running in real-time are leaking to great and the speed is flexible because some people does not really want it to be running in real-time you can't see anything if you're running real-time okay so this is the compiler which is the user interface so people define the neural models in the populations you can define the connections like what you have done in the NIST you have the very large freedom and then the compiler will compile the neural netlist into the neural engine which is running in hardware so each engine have 512k neuron cores each core has 256 neurons and so one your engine can simulate up to 128 million leak integrating firing neurons depends on the final rate and the 1.7 trillion synaptic connections so each core can has up to 54 target cores to connect so this is the hardware structure of the FPGA platform so the structure is pretty straightforward we build a neural array with a bunch of neural engines and then the router will do the routing for the spikes generated by the neural engine it read the netlist from the lockup table and then the PCI interface will transfer the data from the PC and to the neural engine and so one thing when we develop the system we realize that we can make the system to run in real-time however if you need to change the design you need to run the whole FPGA design flow that might take a day to synthesize the design that would be totally a waste of time so rather than doing that we want the system to be very flexible so all the things are stored in the lockup table so you can easily change the network structure and the neural parameters without changing the hardware design just simply reroll the memory okay so this is the system we have to put the several FPGA boards into one system into one PC oh this is one example code I think it's pretty much like the Brian code but it's comfortable with pines so you introduce the library from deep cells and then you define the neural parameters and then use the population to so this one is counted in 256 neurons so this example is the exactly the same example the previous speak just talk about we have the excite train neural and the connected inhibitory neurons are already connected and then after in that it's just the wrong the simulation that's it you don't know you don't need to know in there hardware knowledge you can run it in real-time so this example contains 205 64k neurons 64k excite train neural and 8k inhibitory neurons so this is the roster plot of 1000 neurons because we do not have the expert visualization tool like this morning they show so this is just show you that we can do the real-time simulation why this one only plus 1000 neurons but we can plot all of them if we want okay now we come to some real world application so this is the computation problem yeah first is use the stochastic electronics which means we use the noise between the like our human brain the human brain is supposed to be a noisy environment but it can do amazing computation tasks and here we follow the same idea we use the noise between electronics and the build a system that can do the computation I will address the more details in the next but this is the ERM model extreme learning machine model so in the first layer is your input layer and the middle is the hidden layer and all the input values are randomly projected to the high dimension input to the hidden layers while the hidden layers had the non-linear function which were responsible non-linear into the input and the output is the linear output neurons we use the pseudo-inverse to rather to linear and solve the weights maybe next one's more clear yeah here is the equations so why is our input and this w is the rather than a projected weights and we need to solve this w which is our decoding weights so we use the pseudo-inverse to calculate this yeah then we apply to the standard benchmark the m-list which I think most people here are familiar with it the m-list and this one shows the size the effect of the size of the hidden layer we can see that the side with the increasement of the side the hidden layer size the arrow goes down but not that linear okay this is one way we use the stochastic electronics so as you see this in this rather than a projection in the hardware we use the noise between analog circuits to generate we use the difference between the analog circuits the device mismatch and the process variation that will make the transistor behave differently and then we use that to gen to project the input value into the hidden layer so this you can see we here the red one is the target function the sync function and the dashed one is our output function by doing the decode using the pseudo-inverse we can get the output output to match the target value and this is the online learnings we because you pseudo-inverse you need a lot of computation power and we develop an online learning algorithm that can use iteration to get the result without using 100 gigabyte memory yeah this is the analog implementation next page is more clear so this is TSMC 65 nanometer technology it has more than 400 silicon neurons and this is the silicon you this is the transistors used to store the decoding weight and this is the online learning over as an implementation okay so this is our digital approach which based on the deep south hardware so it has 64 neurons and they use the time multipaxing approach so you just need the one physical neuron and this is the pseudo code to tell you how to get the hidden layer response this is the tuning curve yeah this is some output result we can see the RMS is pretty small compared to the one that used using analog and also as a proof of concept we develop a system based on this idea for the MNIST recognition the input layer 784 pixels they use the binary values and they are all rather than a projected to the hidden layer hidden layer has 8k neurons and we use the pseudo-inverse to decoding the output weight and this one achieved a 3% error rate and the next one we are talking about the spatial temporal recognition because the previous system they are all just vectors with very conventional artificial neural network and next we address more complicated stuff the spatial temporal pattern recognition because in our human brain most informations are processed by the spatial temporal pattern rather than the vectors okay yeah we previously we used the rate code and here we're going to use this spatial temporal pattern so this was developed by my course you provided John Tepson so the basic idea is still three layer neural network but the hidden layer here then we rather than using the neurons we use the synapse so they will have the temporal information see the spikes comes into from into the hidden into the input layer and they will get the radon weights and the projected into the hidden synapse and this synapse we'll have the alpha function or exponential decay depends on how you use it and then this one will encode your temporal information again we use the pseudo-inverse to do the decoding then find out the weight this one can be used for the spatial temporal pattern classification tasks okay there's another application we have used for the we have developed for the system it's a called a sped array this one used the photon this one was developed for the photon detection which means when you generate a photon to the target you get the top photon back and the time the inter spike interval times represents the distance from you and your target so we use the scheme which previous developed to do the as the back end to recognize the pattern so that we can detect the distance between our and the target this is more clear figure yeah the sped array generate a spatial temporal pattern and we use the scheme hardware and generate the spatial temporal pattern recognition and then back to the EOM supervised learning this is one of my colleague developed say developed the scan neural network it is capable of doing the feature extraction without supervising so it can do the unsupervised the learning okay thank you thank you for the nice talk I was just wondering just to make clear in your spatial temporal pattern recognition did you say that the synaptic or the hidden layers in the synapse and is that a linear summation or a sublinear summation of what the inputs are or is it still a non-linear one sorry so which one you're talking about with the spatial temporal spatial pattern so the output is the you mean the input to the hidden layer yeah to the hidden layer it's rather than a projection which means you have a rather than weight matrix and it do the dot product and then it's the sum of all this red rather than a weighted okay input value does this make sense to you maybe I can show you something like a more of a deterministic probabilities of what would activate at that particular moment because you take time into account again when the input is projected to the hidden layers there's no temporary information the hidden layer the alpha function creates this temporary information okay so this is like an implicit of the hidden layer but not of the input itself yes okay I can show you more details maybe offline yeah thanks other questions okay then thank you again