 Hello and welcome to the series of video lectures on the subject microprocessor for secondary IT students. I am Dr. Srisail Sarakajbar and in this video lecture we are going to study registers and memory organization of 80286 microprocessor. At the end of this session you will be able to describe register organization of 80286 microprocessor. You will also be able to describe memory organization of 80286 microprocessor. 80286 contains almost the same set of registers as in the 80286 microprocessor case. There are 8 16 bit general purpose registers. There are 4 16 bit segment registers. There is one flag register which is also called as status and control register. And there is one 16 bit instruction pointer register. The figure shows the register organization of 80286 microprocessor. As you can see here in this diagram the available registers are divided into 3 groups. General purpose registers, segment registers and status and control registers. As shown in the figure there are 8 general purpose registers namely AX, BX, CX and EX. There is base pointer register, source index register, destination index register and stack pointer register. All these registers are 16 bit. Out of these 8 registers the upper 4 registers are special in the sense that they are byte addressable. The meaning is that you can use AL and AH as a separate 8 bit registers. So AL is nothing but the lower byte, AH is nothing but the higher byte of this 16 bit AX register. So similar is the case with DX, CX and BX register. So this 8 register serves the general purpose in case of 80286 case along with that they also serve some special functions. For example, AX and DX register are used for multiplication, divide and IO related instructions. The CX register is used to store the count for loop, shift and repeat instructions. BX and base pointer are used as base register to store the base address whereas source index and destination index registers are used to store the offset value. Stack pointer register is used for stack related operations. So along with that there are also 4 segment registers namely code segment register, data segment register, stack segment register and extra segment register. So the purpose of these segment registers is to store the base addresses of their corresponding memory segments. The instruction pointer is a register which is used to store the address of the next instruction which is to be executed. The flag register in case of 80286 is slightly a modified version of 80286 case. Only the lower word of the flag register is shown here. So let us see the flag register in detail. The flag register of 80286 is a modified version of 80286 flag to accommodate various status and control operations that are involved in 80286 case due to multitasking and multi-user environment. The flag register consists of two words, upper word and lower word. The lower word is similar to 80286 case with some additional flags. The upper word of the flag register is called as the machine status word. Now let us see the lower word of the 80286 flag register. So one can see here that the lower word of flag register of 80286 is similar to the flag register which is available in 80286 case. There are some additional flags, there are six status flags, there are three control flags and there are three special field flags which are not available in 8086 flag register. The upper word of the flag register of 80286 is called as the machine status word. There are only four flags which are active. The four flags are protection enable, monitor processor extension, emulate processor extension and task switch. Now let us see in brief about status flags and control flags. The contents of the flags carry flag, parity flag, auxiliary carry flag, zero flag, sign flag or overflow flag are affected or modified after execution of the logical and arithmetic instructions. There are three control flags namely trap flag, interpenable flag and direction flag and these flags are used to control certain operations of the processor and one can see that all the above flags are also available in 8086 microprocessor and they serve the same purpose in case of 80286 also. Along with the status and control flags there are three special field flags. The bits 12 and 13 indicate the IO privilege level and the bit 14 indicates the nested task. The special field flags are only relevant in protected mode. Real address mode program should treat these bits as don't care making no assumption about their status. The IO privilege level is a two bit value. It specifies one of the four different privilege levels necessary to perform IO operations. These two bits generally contain 00 when operating in real mode. The nested task flag controls the operation of an interrupt return instruction and is normally zero for real mode. Now pause the video for two minutes and write down the answer of the following question. I hope you have written the answer. The correct answer is 12 flags. There are six status flags, there are three control flags and there are three special field flags. Now let us see the upper world of 80286 microprocessors flag register which is called as the machine status world. The D16 bit of machine status world is the PE bit which is called as the protection enable bit. If this bit is zero it means the processor will work in real mode otherwise it will be in the protected mode. When the processor is powered this bit is always zero that is when the processor is powered it always start in the real mode. The D17 bit of the machine status world is the MPB which is the abbreviation for monitor processor extension. If this bit is one this flag allows weight instruction to generate a processor extension not present exception that is exception number seven. The next flag is the EM flag which is the abbreviation for emulate processor extension. If this bit is one or set it causes processor extension absent exception and permits emulation of processor extension by the microprocessor unit. The D19 bit of the machine status world is TS bit which is which stands for task reach. If this bit is one or set it indicates the next instruction using extension will generate an exception seven. Using CPU to test whether current processor extension is for current task. The remaining bits D20 to D31 are called as hatched bits and are reserved by the Intel. Now let us see the memory organization and segmentation of the physical memory of 80286 microprocessor. The physical memory of 80286 is set up as an odd bank and an even bank. Just as it is for the 8086 case. The even bank is enabled when A0 is low and odd bank is enabled when BHE bar is low. The 8086 offered only one memory operating mode known as the real memory mode but the 80286 incorporated two operating modes namely the real mode and the protected mode. The real mode is backward compatible with 8086 whereas the protected mode is a advanced mode and in the protected mode it can address one gigabyte of virtual memory space. As you can see here this is the address latches. This is the address latch enable, bus high enable, A0, 2823 are the address lines. This is the upper bank or odd address bytes. This is the lower bank or even address bytes. See a stand for the cheap select which is an active low signal. D8 to D15 are the higher 8 bits and D0 to D7 are the lower 8 bits of the data. This is the reference. Thank you very much.