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Memory Simulation in a FinFET World - Overcoming Challenges of FinFET Memory IP using FineSim

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Published on Aug 14, 2013

George Lattimore, Director of Engineering, and Ron Moore, Director, Strategic Accounts in ARM's Physical IP Division, discuss the challenges of modeling embedded memories in FinFET process technologies and how ARM and Synopsys collaborated to address these challenges using Synopsys FineSim.

To hear George and Ron talk more in depth about this topic watch the recording of them presenting at the DAC 2013: AMS Luncheon: http://www.synopsys.com/Tools/Verific...

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