 In this video, we're going to explain three more addressing modes of the AVR architecture. Let's just remember that addressing modes are those techniques that the microprocessor uses to access the operands that are specified by different fields of the instruction. And let's also remind that we're going to use the following notation. We are going to use the effective address of the operand, and we're going to represent it by ads of E. We're going to be talking about instruction fields, which are going to represent inst f sub 1 or f sub 2. We're going to refer to registers, and typically these are registers that are specified by these fields, so we're going to refer to them as the R sub f1, meaning the register specified by the field f1 in the instruction. And then we're going to refer to program memory like this, like if it were an array with an address in square brackets, same thing for the data memory with an address in square brackets. And finally, when there is an operation over a register, we're going to denote it with this arrow like this. So with this notation, let's now describe three more addressing modes. The first one is called data indirect with post increment. Now what happens when an instruction has this addressing mode is the following. This is the instruction. The instruction has one field in it that encodes, let's call it f1. This instruction, which by the way has typically 16 bits, this field encodes one of the registers in the register file. So this is the register file. We go to one of these registers, and in one of these registers what we access is the address that we use to go to the data memory, and there is the operand. Now so far what we have said, this is exactly the addressing mode that is known as data indirect. Now what is the difference data indirect with post increment, this is precisely the difference. There is a post increment meaning that once the address has been obtained from the register, this address is then given to an adder, and this adder is going to increment by one this value, and most importantly, this new address is loaded into the register. So we follow the notation described here to capture what happens here. We're going to say that the effective address of the operand is going to be the content of the register specified by the field f1. The operand is actually in the data memory, and the address is specified by rf1, but and this is the most important difference, now rf1, we use the notation we introduced here, takes the value of rf1 plus one, or in other words, gets incremented. An example of the syntax typically used in assembly program would be this one, the instruction LD, R12 comma. Now this plus over here is the one denoting that this instruction should use the data indirect with post increment. Now careful because the fact that this register contains an address, it means that it has to have 16 bits, therefore the restriction is that only registers x, y, and z can be used with this addressing mode. Okay, once we describe this addressing mode, there is another addressing mode which is very similar, not identical but is very similar or analogous, which is the data indirect, but this time with pre decrement. Now with the name we can pretty much deduct exactly what is happening here. Again we have an instruction, typically 16 bits, we have one fill on this instruction, let's call it f1. This fill in the instruction points again to a register in the register file. Now what happens here is different, the value that gets accessed from this register now is connected to a subtraction which decrements in one unit that value and then that unit, the result is what is used to access data memory and obtain the operand. And again similar to what happens here, this operation that decreases, now the big difference is that this is decreased before the access to memory is done, but still this new value is reloaded as the new value of this register here. So following our notation, the effective address right now is our f1 minus 1 which is the result, this would be the effective address, the result of subtracting one unit from the value obtained from the register, the operand of course is in data memory in the address we wrote before and the most important thing now is that our f1 gets modified with its own value minus 1. Now an example of an instruction using this addressing mode would be LD R12 minus X. So this minus here used as a prefix for X is the one that is telling us that it's going to be pre decremented. Now it's interesting because this syntax is already telling us the order of the modification of the register. Here we put the plus sign after the X because it's a post increment whereas in here we put the minus sign before the X because the register is pre decremented. And the next addressing mode that we're going to describe is called data indirect with displacement. And this is a very interesting one. In this case the instruction has again 16 bits, but now we have two fields. Let's call it f1 and f2. The first field is going to still point to one of the registers in the register file. From that register we're going to obtain a value, but now this value gets added to the value obtained from field 2 of the instruction. This is what we call the displacement. And the resulting number is what we use to access data memory. And right here we have the operand. Now we follow the notation that we've been using so far. The effective address of this operand is rf1 plus the value of this field. In this case it would be inst f2. And of course the operand it's going to be in the data memory in the position captured by this expression rf1 plus inst f2. Remember inst f2 refers to the instruction field f2. Now three very interesting things about this instruction. First no register is modified as opposed to the other two addressing modes we discussed before. In here there is no feedback of the value back to the register. The register is left intact. The other interesting restriction is that only registers y and z can be used. This is important because it's a little bit of an anomaly. And this operation and this one which I forgot to write it, only x, y and z can be used. So in these two addressing modes any of these three registers can be used. However, in the data indirect with displacement only y and z, this is a restriction derived from the architecture. And the final restriction is that the displacement as you can imagine, this is only 16 bits, can only be represented with certain amount of bits, in this case is 6 bits. Which means the value has to be between 0 and 63. And an example of an instruction using this addressing mode would be ldd r12, z plus 24 for example. So this constant over here is the displacement. And this is also the one that must satisfy being in the range from 0 to 63.