 Welcome to the session on 8086, Assembler Instruction Format. Learning outcome at the end of this session, students will be able to describe different instruction formats. Let us see what is instruction format. For every instruction that is executed in the 8086 microprocessor, an instruction format is available that is the binary representation of that instruction. A machine language instruction format has more than one number of fields. The 8086 instruction format vary from 1 to 6 bytes in length that is instruction format can be coded from 1 to 6 bytes depending upon the addressing modes used for instructions. And first field is called operational code field that indicates the type of operation to be performed by the CPU and the second field is called operand field. So instructions have different components that specify the operation to execute and how to treat the associated data. A machine language instruction format has one or more number of fields associated with it and the first field is awkward field which indicates the type of the operation to be performed by the CPU. And the instruction format also contains other field known as operand field that is also called as data field. Now instruction format 1 byte length, this format is only 1 byte long and may have the implied data or register operands. The least significant 6 bits of the opcode are used to specify the register operand if any otherwise all the 8 bits form an opcode and the operands are implied. So in figure 1 the opcode may be of 8 bit or may occupy 6 bits of the first byte and it defines the operation to be carried out by the instruction and the remaining 2 bits are of d and w bit. So as we discussed the first byte always consists of the opcode, the opcode may be of 8 bit or may occupy MSB 6 bits of the first byte and it defines the operation to be carried out by the instruction and the remaining 2 bits, the first bit is d bit that is nothing but direction bit which defines without the register operand in byte 2 is the source or destination operand. If d equals to 1, specifies that the register operand is the destination operand and if d equals to 0 indicates that the register is a source operand and the w bit is nothing but data size bit which defines whether the operation to be performed is an 8 bit or 16 bit data. If w equals to 0 it indicates the 8 bit operation and if w equals to 1 it indicates 16 bit operation. Now we are moving for instruction format of 2 byte length. This format is 2 byte long, the first byte of the code specifies the operational code and width of the operand specified by w bit. And the second byte of the code shows the mod field register operands and rm field. So here in figure 2 first byte of code consists of operational code of instruction and the width of the operand specified by d and w bit. And the second byte of code consists of mod reg and r oblique m field. So here in this mod indicates the displacement is present or not. If present then it is 8 bit or 16 bit. And the register reg indicates the name of the register that is source or destination and r oblique m indicates whether source or destination operand is located in register. So in following table in the second byte of the MSB 2 bits are defined as mod field. The mod field defines whether the r oblique m field is for register or memory. And if it is memory then there is no displacement or an 8 bit displacement or a 16 bit displacement. These 2 bits are encoded as if mod equals to 0 0 rm for memory with no displacement. If mod equals to 0 1 rm for memory with 8 bit displacement. If mod equals to 1 0 rm for memory with 16 bit displacement. And mod equals to 11 rm for register. Now we are coming to the point the register field which occupies 3 bits these field identifies a register that is one of the instruction operand and depends upon W bit. In the table shows the selection of register code depending upon W bit. When W equals to 0 all 8 bit registers are selected whereas W equals to 1 all 16 bit registers are selected. Thus in a number of instruction and mainly in immediate to memory variety register is used as an extension of the opcode to identify the type of operation that is 8 bit or 16 bit. So the next fields are rm field which occupies LSB 3 bits. In the rm field along with the mod field defines the second operand as shown here in this particular table and for mod equals to 11. In this operation data movement is within the register either 8 bit or 16 bit as mentioned in this operation and the register field identifies one of the instruction operands. Now if the second operand is memory then the mod field will be either 0 0 or 0 1 or 1 0. In our previous field we checked about if mod field equals to 11. Now we are moving if mod field equals to 0 0 or 0 1 or 1 0. Now depending upon how the memory is addressed. So following table shows the encoding of the rm field along with the mod field for mod equals to 0 0 comma 0 1 and 1 0. When mod selects memory mode then data transfer is register to or from memory. In that case rm field indicates how the effective address of the memory operand is to be calculated. So instruction format 3 or 4 byte long this type of instruction format contains 1 or 2 additional bytes for displacement along with 2 bytes the format of the register to or from memory without displacement. So in figure 3 instruction requires 3 or 4 bytes for coding. The first 2 bytes contain the information regarding opcode mod and rm field and the remaining 2 bytes contain 1 or 2 additional bytes for displacement along with 2 byte format of register to from memory without displacement. If w bit in instruction format value is 1 then the operand is of you have the 4 options please choose the correct answer. So your answer is see that is if w bit is 1 then the operand is of 16 bits and if it is 0 then the operand is of 8 bits. Now we are moving for the instruction format of 5 or 6 byte long this type of instruction format requires 5 or 6 bytes for coding and in this particular the first 2 bytes contain the information regarding opcode mod register and rm field and the remaining 4 bytes contain 2 bytes of displacement and 2 bytes of data. So in this particular figure instruction requires 5 or 6 bytes for coding the first 2 byte contains the information regarding opcode mod and register and rm field and the remaining 4 bytes contain 2 bytes of displacement and 2 bytes of data. So instruction template are used for each basic instruction to generate the opcode by filling the bits in the template corresponding to those instruction. In other words the opcode are generated on a bit by bit basis. So these are the references which I used thank you.