 forward from where we left last time and since there is a mid-same break, so I will not be taking up anything new, we will be just finishing analysis when T select is 0 and we will just understand that. So, basically today we will be devoting our time for identifying transition matrices, rest all methods actually remain the same and you will now also basically appreciate the difference between the two mechanisms and of course, it is possible to analyze the mid-way mechanisms for example, when T select is 50 percent and T, T pass is also 50 percent of T delay, that kind of analysis is also possible. So, I think again we require those 14 sets, so can I should I write it maybe for the people who are recording, we will be actually viewing the later on, so this need to be done, so these are those 14 states. So, now when T select, I have already given an example whereby if you do a cascading for example of a switch, earlier case if all of them for example, have this packet and this is the last stage or whatever it is, they will just be deciding in the whole T delay slot, which will be happening parallely for all the three that where the packet has to go, once that is done this packet will be read out almost instantaneously and within the same instant this packet will also be read out, this packet will also be read out, but once it has come here again it has to decide way on which port it has to go, that is why it cannot jump, but all three packets can jump together. So, usually that is why the T select there were actually three phases, one is the packet going out then packet jumping and then packet coming in were actually were kept separately for a one particular switch, because things were happening simultaneously when the packets are being transitioning continuously, so that you can do that computation. Now for our case now when T select is going to be 0 and T pass is finite, so remember packet can move even if the outgoing buffer is busy, it is occupied then also packet can move subject to condition that is also moving out, so that is why you are first of all finding out whether this will move out or not and based on that whether this will come here or not, if this comes here then some other packet commit higher or not, so there were three steps involved and those are being iterated in one time slot in the backward direction, so all three transactions can happen, but now the case which we are looking is if this is a situation they will immediately select where it has to go, now this packet cannot move here unless this buffer is empty, because this whole writing itself take T delay and this packet cannot go instantaneously out this also will require same amount of delay and unless this is free this cannot start, so first time slot this will move and you will get a packet not here after one time slot delay you will be having you will be in this situation next time slot only this packet will move here and this packet will be read out this will be happening parallely, so there is a gap hole which gets created between the two and this packet cannot read because this buffer is not empty, so after some time when this packet will be here this packet will be read out this packet, so in next time slot third time slot then this will be transferred here and this will be transferred here, so that is the difference which comes when T select is 0 and T passes nothing but T delay, so we expect the performance to be poorer in case when T select is 0, now important thing I do not require those three steps 1 2 3 and 3 will become 0 for the next time step that is not required I can only do with one single step, so that is what we are going to do actually here. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . in the same time slot in some other memory, then you switch over the memory. That option is not implemented here. If you can implement that option, then of course, scenario will be very different. That is technically what, when I am saying t is pass is 0, that is what we are indicating actually. We are having a dual buffer system technically. So, once we have decided, I have within t select period or t delay period where the packet has to go after that, it does not matter. So, writing out of the packet to the outgoing buffer will not interfere with the writing in of the packet and that can happen with dual buffer system. But, notionally there is only S 1 single buffer at par out input port with this condition. So, now the changes which will happen is you will have p j which will be defined as it is, p j tilde will be as it is, p j bar will be as it is. p j tilde was the packet will go out of your outgoing port, p j is the packet is present at a port and p j bar is packet is going to come into your incoming port, incoming buffer. So, these definitions remain intact. In fact, even those whatever we had the states, we had defined the state probabilities, those will also remain the same. Now, only thing which will happen is this will be the only thing which will be available. We will be only working with this because p 1 will not be there, there is no step 1. Step 1 actually technically gets merged. So, only problem which is there that p 1 calculation which you had sorry p j, there is no p 1. So, p j tilde p j bar and p j, these there are 3 calculations and they required probabilities after step 1. Probabilities after step 1 actually, remember p 1 we were always writing. So, what will be the state probability of either j minus first stage or j plus first stage or j th stage, there were 3 actually configurations. In that case all p 1's will be simply replaced by p 0 because there is no conflict. So, I am not actually having 3 steps. So, probability that after step after a time slot t, my packet will be going out will be decided by p j tilde where the probabilities here, those expressions will still remain exactly same, they would not change. They will come from there. So, if you wish I can reiterate or you can just simply replace both way actually it is fine. So, may be for p j tilde we can do this. So, p j tilde that probability that packet will go out n time slot tau k which starts from t k to t k plus 1. So, at t k this is a probability that conditional probability that packet will go out. So, denominator you have to put all those states where you will have packet at the input. So, there will not be one anymore it is p is 0 which will be coming. So, when the packet is there at the input port or the outgoing port sorry. So, it is half of p 0 that is the only change which will happen p 2 j that is the variation which will come. I think earlier case it was no I think everything will remain is still the same except I have to look at j plus first stage. I have to look at all the states where the packet is there at the input j plus first and then I have that those all those states will put in denominator. In the numerator I will put all those states where the packet will actually move out from here to here. So, that will give the conditional probability of packet going out from here. Only thing it will become p 0 instead of p 1 which was there earlier not 2 it will be actually 4 first. So, I am just putting a bracket for all halves I will just add here 5 this will be 6, 7 and then remaining ones actually will come p 0 8 j plus 1 p 0 9. So, this is what will be the denominator. Now, this identifies the probability that a packet will go out. So, I think because time slots have to be clearly specified this is at this particular time step just before this is you are in probability of in this state just before this particular step starts this particular time slot starts this after step 0 in k minus 1 I think that is the only variation which will come. And then you find out all the states where the packet will be moving out in this time slot where the packet will be moving out in this time slot. So, at this is nothing but p j tilde is a probability that at the end of this time slot packet will go out conditioned on if the packet is present at this point. So, I think this is the only thing which we have to define clearly because earlier case this was not the issue because all packets all 3 packets can jump together here they cannot. So, there is a minor variation in the definition here this is not explicitly stated. So, this will basically depend on this is the probability that packet will be going out of your outgoing port or outgoing output buffer conditioned on the packet was available at the beginning of the time slot. And packet will be going out after the time slot or it will be actually moved out by the time it will not be there. So, this p j tilde is that probability. So, this is a conditioned on that packet is present here and packet will be moving moved out by this time. So, what is the probability that packet would have moved out by the end of the slot conditional packet was there in the beginning of the slot. So, this gives the probability that packet was there in the beginning of the time slot and I am now choosing the numerator only those states for which in this time slot packet will actually move out look at only those conditions. So, those will correspond to for example, 4 yes packet will actually move out surely. So, you can put p 0 4 j plus 1 k 5 it will not be moving out 6 it will be moving out 8 will be moving out similarly. Moving out from the which port sir moving out from input port. Output port of j th stage and input port of j plus first stage I am talking about j plus first stage here. This corresponds to input port of j plus. See because your probability your probability that the packet from your output is going out will depend on the. Yes sir this is the input port of j plus 1. Input port of j plus 1 right. So, this is the j and I am trying to estimate p j tilde. This will be exactly same expression I think because in principle we had followed the same thing then p 12 will be coming that is it. And for 11 I think I have missed out something 11 also right. Both will go in 9. So, I am writing 9, but this is only a which is which is with half actually the full ones now we will write is the same expression. So, full only happens for 9 I think nothing else rest all over half it must be same expression. So, in principle it is also true for p j bar and p j same way p j will give you the probability that packet is there at your outgoing port. So, look at j th stage find out in j th stage the switch will be in which particular state and sum up all those probabilities these are absolute probabilities I am coming to that. You have to understand p j p n minus 2 tilde is 1.0 in the earlier case. Now, p j n minus 2 tilde is not 1.0 it is going to be less than that and that will cause the impact because now doing backward propagation ultimately that probability what gives you the throughput throughput will be lower in this case intuitively. Now, the condition here is not this will be 1.0 it is not p n minus to its p n minus 1 tilde there at the output packet was instantaneously taken out n minus 1 stage. So, at n minus 2 output if there were 2 packets both of them will also be taken out immediately because there was an instantaneous readout, but here it is not instantaneous. So, reason for this will be now even if this is the last stage you have a packet here pushed out this will not be readout immediately takes one full slot to readout earlier it was instantaneous. So, only if the packet is there it will be readout. So, if there are 2 packets sitting here for example, in earlier case both of them will be even if they are going to the same port they will be taken out and read out instantaneously. We kept this thing as p of n minus 2 tilde as 1. Now, it is not possible when this will go out it will become empty only one of them will go other one will still be hooked up here earlier case the even this was going out. So, this has had an impact. So, intuitively yes the performance has to be lower than the earlier case. So, now coming to the state transition table we will not be having state transition table after step 1, step 2 or step 3 those are not there. We have only step 0 only one step every time slot. So, in that step only all transitions can happen. Now, only change which will have we will still have 3 transition tables one for the input stage input stage first stage of the switch one for the output stage because input stage p j bar is going to be a p 0 bar is always 1.0 the way it was there in the even the earlier switch and the output stage p n minus 2 p n minus 1 tilde was is going to be 1 in between your state transition depends on the incoming rate and outgoing rates both because then it is not broken into 3 steps. So, we have to use the compound formation basically transition will be simpler matrix will be simpler in this case not complicated. So, I think in same way we can build up for p j bar and p j. So, I need not probably do that and that can be done by you I can if you wish I can write down the expression directly or earlier expressions which we had just simply replace all p 1s by p 0 all 1s will be replaced by 0 that is it there is everything is same. So, first state transition matrix because so we had already 3 transition matrix done earlier. So, this will be identified as superscript 4, but this is for t select is equal to 0 is for this case. So, you now you have the states and then now we can build up with this and you have to remember that your p 0 bar is 1. So, look at your state 1 in a state 1 what will happen where you will go p 0 bar is 1 remember. So, packets have to arrive if both packets will arrive they will be going where you will either come to a state 8 or 9 there is no other possibility and no 8 or 9 not say I am looking at a transition from this time slot to this time slot what happens at after this time slot. I am not looking to 0 1 2 3 steps I am looking at after the complete step. So, at this point suppose you are in the state 0 state 1 both packet will arrive. So, both packet out of these t select is 0 immediately a decision will be made whether the where the packets have to go if both of them are directed to the one outgoing port. So, one will be at the input and one will be at the output. So, that state will be your 5 state if there is no conflict between them both of them will be on the outgoing port that state will be 3 they cannot move to the output of the next stage because it is not possible one time slot only one readout is possible again there is a buffer. So, next readout will take another time slot that will happen in the next one. So, this actually means you will have half here and half here. Now, look at the state 2 if your input switch is in state 2 both packets will come they will select immediately selection will be done where they have to go they both might would like to go to the same port where the packet is already there at the output they both may like to go to the free one or they can do a crisscross. So, based on that you will find that and you have to also look at what will happen in after this step 0 whether this packet will go out or not go out see outgoing packet also has to go out this particular packet which is there in this state important thing now even if it is being read out by the next one you cannot write any one of these 2 packets in this slot read and write cannot happen simultaneously. So, if these 2 packets cannot move here this is not possible this can be read out or may not be read out both are viable. So, with probability your p 0 tilde this will be going out and with q 0 tilde this will not be going out. Now, these 2 packets if you look they just come they can be directed with equal probability to any one of these ports. So, now I have to look at iterate on the cases actually. So, let me write all cases one by one enumerate them and then estimate the probability. So, first case is when the packet actually moves goes out. So, I have p is 0 tilde with this this will be happening. So, I will not be having any packet here. So, one possibility is both of them directs to the above side and they cannot move. So, I will end up in this state after time slot if both of them are directed to the bottom side I will end up in this state if both of them are going to be in parallel I will end up in this state if they are crisscross technically these 2 states are same they are not different if the packet does not go out I will still get the same scenario again these 2 states are same all of them are happening with equal probability this will be happening with 1 by 4 p 0 tilde this is happening 1 by 4 q 0 tilde for all 4 of them. So, let us identify this one is which particular state 8 this one is 5 this one will be 6 both of them. Sir, can you explain how the 6 state 6 when both packets come in the parallel. What. In case 1 when packet move out how do you reach the state 5 after it first case first case. First case this one after that packet move out from output port 2 packet arrives and then. 2 packet arrives they cannot be written into this buffer they both are directed to this. So, after that see this is the time which is starting you started at this point 2 packet arrives in the incoming port now at this point the packet is being read out from the outgoing port at the end of this time slot what will happen this packet is no more there in this buffer, but these 2 packets cannot be moved because they both were directed to that particular thing. So, this decision was done instantaneously it is selected 0. So, both of them have to remain here and they are still directed towards that direction. So, this scenario look from that table is stated. Next 5 this one. So, if the packet is again going out. So, next one is when both of them are directed towards downward actually when both of them are directed towards this case comes when both of them are directed towards downward state. So, this was the situation at t at this point by this time you reach here this one packet will be pushed here. See this is before at this time at this time what will happen this packet will go out and this packet will move from here to here you will end up in this situation. Maybe I can write it in a slide I will use a different color and show what is the situation at this time and this is the situation at this time actually. So, just before the start of slot I am drawing with the different color. So, just before the start of the slot this is the situation just before the start of the slot in this case. So, if the packet does not go out you will end up here packet goes out you will end up here output port packet. In this scenario this is at the beginning of the slot which is happening if the packet goes out packet is no more here one of these packets will be coming on this side one of these packets will be coming on this side actually because this output buffer is empty this readout can happen in this slot. So, if the packet is not going out you are otherwise you are here the initial thing in this scenario will be this or this with the packet moves out you come here this packet goes out this remains there this one will move on the outgoing side packet does not move out this still goes to the outgoing port comes here this will remain blocked and this will remain as it is intact there are two situations same here and then this clarifies. So, this is at t k and this situation as t k plus 1 and then of course, whatever are the stages which you arrive after in time slot talk a I just give them the numbers and based on that I will fill up the matrix. So, this one is 6 this one is 5 8 this is 10 7 this is also 7 and this is also 7. So, 7th I can write here 3 by 4 q 0 tilde 10 I can write 1 by 4 q 0 tilde 8 I can write 1 by 4 p 0 tilde 5 is also 1 by 4 p 0 tilde 6 I can write as half of p 0 tilde 7 comes 3 times 3 by 4 q 0 tilde this row happens with probability p 0 tilde packet goes out q 0 tilde packet does not go p 0 q 0 tilde as depend on the next states of the next state. So, only thing important is packets are coming immediately into the port the moment those are free. So, I am assuming there are infinite buffer here packet is always there present. So, it is not that when you read out this packet. So, no other packet can be written in the same time slot it will be instantaneously written in the input port well that is the only variation which you have to be careful about. Single buffer input. Why you will take infinite buffer not only single buffer. Where? Input port. We all switches have input single buffer single buffer per input port I am talking about the complete switch at the input of the zeroth stage. So, there I say if the packet goes out in the next time slot instantaneously another packet is available. See what happens is your you have a packet here it takes hold one slot for this to be read out what happens the next one you cannot write the packet instantaneously in this buffer you should remain vacant for the next one no that is not the case I am always assuming that p 0 bar is always 1. So, zeroth stage the packet will be always there in every stage. So, even if the packet is read out takes hold time next slot the packet will be immediately available. So, that is the maximum loading condition. Now, staggering of the packets or they are being stopped because you they cannot be read out is happening inside the switch I am not looking at the input. So, input technically if there is a large switch with multiple stages 0 1 2 2 sum whatever it is n minus 1 at this input I am assuming it is like a large number of packets are there. So, at least 2 3 buffers must be there at least always and they are always present while this does not happen inside. So, you that is the reason why you could not have when this packet was going out you cannot move a packet here because there was only one single buffer here, but at the input of the whole switch packet is always available which actually means there is not single buffer there is going to be more than one buffer present there that is a thing. Otherwise I cannot take this case and that is the condition for maximum loading and we are trying to compare. So, there has to be equal testing ground for the both kind of models. So, remaining once I am just writing it down by looking from the paper for this particular matrix we do not have much time. So, this p j tilde square p j tilde square maybe you can actually look into the paper and get the whole table I need not write it down important thing is that how to get the table now you can even drive on your own also. So, let me just quickly go through the middle stage what happens there is now arrival and departure probabilities both are there. This will become 0, j is equal to 0 they actually have given it in general form. Again you will have the equation I think this I can now remove this is for a state I how you will compute time step k plus 1 this will be nothing but your transition matrix which will be there m is equal to 1 to 14 p 0 m 0th stage whatever was in k. So, this will be happening for all i's. So, I goes from 1 to 14 in all k's. So, this will be transition matrix can be very similar thing what we did earlier. Now, let me define this thing as t 0 t j 5 we call it not t 0 and we have t n minus 1 6. So, this for j th stage in general not for 0 th stage 0 th stage case is different because the input a probability is this, but now there is a input probability p j bar and p j tilde both are have to take part. So, first one you take for example, you are in a state 1 I am only looking at this. So, what will happen only packets can arrive packets cannot go. So, packet will arrive with probability p j bar if both the packets will come it is a p j bar square which will happen and then you will end up in a state of 8 and 9 8 and 9 that is what will happen. So, you will have half p j bar square half p j bar square here if none of the packets come you end up in same state sorry upper line also need to be removed this should have been here q j bar square and of course, only if only one packet will come then you will be in a state 4 p j bar q j bar. Next one if you want to build similarly what will happen if you are in a step. So, now you have to look at the arrival as well as departure both probabilities together. So, you are in the beginning of time beginning of talk you are in a step this particular step no packets there is only one packet this is the state to begin with. Now, you can actually have your initial state basically what will happen after your you started at this time at this time what will happen packets can arrive, but they are not instantaneous arrival the way it was happening in the first stage first stage was or the zeroth stage here packets can come or packets be not come and this can go out independently only if packet is already available it will move here if that slot is available, but when packet is being pushed in this will take this much time and packet will be available only at this point at the input in the input buffer. So, they cannot be moved to the outgoing port. So, with this now the possibilities are this is remember with q j tilde you will have no packet here with p j tilde from a state 2. So, I have written those two and depending on the situation this will be now correspond to q j bar square you can have a packet p j bar q j bar directed to this half probability remember this only one packet coming in can happen with 2 p j bar q j bar actually half of it will be directed here half of the time it can be directed here these two are different cases. So, only one packet arriving and this can be directed to any one of them with equal probability. So, will remaining half will come here. So, I have to multiply this by this actually to write in the matrix and next possibility that 2 packets will come this is still remains the 2 packet will come this is p j bar square. Now, with they can be directed here. So, this probability is 1 by 4 they both are directed to the bottom side this is 1 by 4 and then of course, there is a case. So, this can be crisscross also it will be 1 by half actually p j square bar. So, equivalent things you have to write with p j tilde this with q j tilde. So, you can then identify the states and then build up the row. So, I can just quickly write what you will get is q j tilde no packet p j square bar part I will always write first no packet arrives q j square p j tilde. There are two different things which I am multiplying I will remain in the same state I will end up in this state no packet arriving. You can similarly build up only one arriving going to an free port p j bar q j bar p j tilde first state will be first state first state is p j square p j bar tilde square q j bar square sorry sorry this will be q j same thing will come sorry this same expressions will come here except the outgoing packet will not be there that is the only difference. So, you will be in state 2 with let me just identify those states which I am doing that is a state 4 this also I need to include these two are technically same states here they are not same states there they are same states actually when the packet is going out. So, I have to multiply it by 2. So, this is fourth state it will be 2 p j bar q j bar p j tilde. So, this is an example. So, I think you can build up in this fashion for this particular row. So, again you can look into the paper important thing that you appreciate the method that now both incoming probabilities and outgoing probabilities have to be considered while building up the transition matrix it is not like the earlier cases. So, I am actually stopping here the last one is for the outgoing port or the what is called n minus first stage outgoing ports based on that. So, remember the packet will certainly be going out your p n minus 1 tilde is always 1 only the arrival probabilities will be participating remember when I did for the input stage or the first zeroth stage there was only outgoing probabilities which are participating. In intermediate stages both of these will be participating on the outgoing on the last one n minus first stage only incoming probabilities will be participating outgoing will is 1.0 defined there. So, in the very same fashion actually we can do that and we will define that thing by 6 n stages n minus 1. So, same fashion actually you can build see for example, you take a state 2 because there is a packet on the outgoing side I am taking only that example this packet will certainly go out you cannot stop it it is 1.0. So, once it is 1.0 so only the packet which can come at the input that is important. So, no packet comes it is q j square q n minus 1 bar square. So, you will come here as q n minus 1 bar square you will remain in the same state outgoing port will go. If you are in a state 3 for example, both packets at the output port will certainly go out you will come to state 1 from 3 if no packet comes in same fashion. If for example, both packets will come then 2 will turn into either 10 or 9 for example, if both packets will come you will either become 10 or you will become 9 1 of the 2 depending on how the packets are being directed. So, you have to have half for p n minus 1 bar square both packets are arriving. So, this arrival happens with p n minus 1 bar square probability outgoing packets does not matter they will anyway will be removed that probability is 1. So, in that case if you go to 8 noses. So, if both of them are here they both can go to the same port or they both can be directed to separate ports. So, if they go to the separate ports is 9 sorry 8 and 9 8 and 9 you are right this has to be written at 9 that was not visible from here. In fact, if you are carefully observant enough you can just simply put in that E j is 5 case your outgoing probability equal to 1 and you will get the same matrix actually. So, the middle one or T is j 5 is what is important from that you can actually get the first one as well as the last one only thing you need to know the boundary conditions. So, if you just apply the boundary conditions you will get even this particular matrix. Now, remaining procedure remains the same 13, 14 these packets will go out that is it it will remain here. So, 13 to you will come to it there is no other option if you are in n minus first stage this both will be read out these packet cannot move here. So, you will come up with 8 if you are 14 you will come to 9. So, I think that gives more or less the idea of that how even this analysis is done when T select is 0. So, after the mid-sem break again we will continue with and I will start with some fresh topic. So, this buffer delta finishes off at this point.