 I am Ravish Pratapuri and I am M.T.C. student. I am doing my M.T.Planter for Professor Vadek Sir. Today I am going to demonstrate on embedded processor and operating systems. Coming to the outline, initially I am going to discuss the specifications of the Aukka Stablet and then what are the different possible architectures those are suitable for the embedded processors. That means initially my focus on first to one that is ARM and MIPs. I do not want to cover that X86 I will give just brief discussion about that thing. Coming to the point of operating systems I am going to cover those two operating systems and one is Android and second one is UC Linux. In my presentation I will give just overview about the processors and regarding these operating systems I will give why we need to search for another operating systems rather than Android. Now coming to the specifications of Aukka Stablet. It is condensed display of 7 inches and the RAM size is 256 MB and coming to the power it gives just 1 to 2 hours of life. That means the people who are using in educational society or in colleges they expect more than 2 hours because the college time or school time it should be not 2 hours it should be like 46 hours. So we should design our tablet in a such a model it should give the battery lifetime like 3 to 4 hours and coming to the operating system that first portion is using Android 2.2 but in Aukka studio they are planning to use Aukka and Android 4. But now coming to the processor they are using ARM processor that is Cortex-AH and coming to the storage area they are using flash memory rather than hard disks. In my presentation I will cover operating system and CPU and storage structures. Now coming to the embedded processors. Why is the difference between the original personal system computers and embedded processors? We know the limitations in embedded systems that means the CPU is very low and memory is very less and it should consume very less power. So based on these parameters we should design the processors in such a manner that there are different types of architecture available to support embedded processors. Those are ARM and MIPS and XIT6. Now coming to the point ARM. ARM stands for advanced disk machines. That means it is using this set of instruction or architecture. We will go through what is risk and how it performs in later slides and coming to the different types of processors I will be ARM. There are different series I will be from ARM 1 to ARM 7 and ARM Cortex-AH model. In our Aukka system is using that second model that is Cortex-AH model. Now coming to the third model that is ARM Cortex-AH. This processor does not contain embedded management in it. That means in some applications we don't need MMU. In these applications we are going to use this processor and there are different operating systems like in different applications like there are different operating systems like Newsy Linux. Those are mainly prepared to support MMU-less processors. This is the processor that is used inside the Aukka Stablet. This is ARM Cortex-AH 8 processors. It contains 4 stages pipeline. That means Peths, Decode, Exeggut and Lorentz 2. We are going to use it to support SMID. That means single instruction multiple data. We will cover this thing in later slides. I am coming to the pipeline stage. It is using load and store architecture. That means to fetch the data from memory it uses to operations on the load and store. So we will go through it later also. Finally, it contains 2 types of catches. One thing is L1catch and second thing is L2catch. L1catch is in the processor itself. L2catch is placed inside L2catch. They kept that instruction register and some registers to support DMA. We will go through this neon unit in later slides. Coming to the features that are supported by ARM. It supports RISC. RISC stands for Reduced Instructions at Computer. We will know what is the difference between RISC and SISC in later slides. It supports hardware memory architecture and SMAMD. These are the features that are supported by ARM processors. Coming to the RISC. In SISC there are lot of instructions are available. But in RISC there are optimization of SISC instructions. Because due to the optimization of the number of instructions supported by the processors, we are trying to avoid the hardware complexity. That means by avoiding the hardware complexity we reduce the cost of the processor. One more thing is, due to RISC we support that short execution time as done by RISC. It supports pipelining. It uses load and store architecture. Load and store architecture means if you want to perform any operation, then all the operations should be available in the registers itself. Load operation helps to fetch the data from memory into registers. Store operation helps to store the data in registers into memory. Now coming to the difference between RISC and SISC. Let us take an example to multiply two numbers 10 cross 5. We will do like this in SISC based processors. Initially we move 10 into some register and then we move 5 into another register. Now we apply multiplication operation on both these registers. Now coming to the point of how many cycles it takes place. One cycle for each move. That means two cycles and multiplication takes place. More cycles as compared with the iterations. So the total number of cycles takes place for this operation is 32. Now coming to the next slide. If we perform same operation in RISC based processors, how we perform? Here what the logic is, instead of doing multiplication, we are adding 5-10 times. Initially we send that 10 into another register and 5 to another register. Now we are doing addition operation to do that multiplication. Now coming to the point of how many cycles it takes. One cycle for each move and additional cycle takes one cycle. So the total number of cycles is 30 cycles. As compared with the SISC. Is it an implicit counter? The CX is an implicit counter. No, that is a register. No, that is a register. No, that is a register. No, how many times do you do that? How many times? How many times? CX is considered implicit. Okay. Are you not giving that increment? Okay. See the difference between SISC and RISC. During the number of cycles takes place, SISC is very high as compared with the RISC. That is why RISC is short execution time. Okay, next. Coming to the hardware memory architecture. That means the design of this hardware memory architecture is it possible should have two memories. One is for storing instructions and another for storing data. One advantage is that if two processors using same set of instructions, we don't need to fetch them from memory two times. This is one advantage. Now coming to the neon part that is placed in that processor. Neon helps to support SIMD. I hope all of you know SIMD. SIMD stands for single instruction multiple data. That means processor executes fetch on instruction from the instruction pool and it fetches the data from different units and it executes simultaneously with same instruction with multiple data. These type of applications useful in engineering applications like signal processing or image processing applications. Now coming to the security zone. In ARM processor it is itself providing some hardware security to that data. That means it is providing two other spaces. One is secured and non-secured. For which applications we want security? That means authentication or any access control. We use them in secured mode. Those applications don't need security. We will execute them in non-secured mode. This is advantage provided by ARM. Now coming to the MIPS. MIPS stands for microprocessor without interlocked pipeline stages. MIPS also uses the same risk-based architecture that we studied in previous slides. It is developed by MIPS computer in systems. There are different processes in MIPS architecture like IDET. We will compare this MIPS with ARM later slides. Meanwhile, we will stay. This is the original architecture of MIPS architecture. That means it contains five stages. ARM contains four stages pipeline. Now coming to the explanation part. Initially it fetches that program counter helps to find out which is the next instruction should be executed. After the next instruction should get from that memory IR. During the depotting stage we will fetch all the operands from the memory into register file. After getting all the operands into register file, we start execution. After the completion of execution, we start writing that data into memory. Another feature supported is that in every stage we provide operand fee forwarding. That means for the next one 15 sections, the second instruction depends on the result of the first instruction. It does not need to wait for the completion of that first instruction. After the execution of that first instruction, based upon the results it can execute because we are forwarding this feedback. Now coming to the features in MIPS. As like ARM, it is also using RISC and load and store memory access. Coming to the different instruction types, it has three types of instructions to support the operations. First one is for I type which performs load and store instructions. Second thing is R type instructions. Those are used for arithmetic and J type for jump instructions. These are the classification of the instruction set in MIPS. Now coming to the X86 processors. I hope all of you know these X86 processors because in all laptops and computers they are using this type of processors. But they are trying to design some processors based upon this X86 architecture to support the embedded systems. Two examples are Intel item N series model. They are trying to design some processors to support embedded systems. Now coming to X86 processors are using Cisco-based architectures. We studied all these things in previous slides. The main disadvantage of this architecture is X86 processors are very high cost as compared with ARM and MIPS. Another thing is they consume more power as compared with other architectures. For embedded systems many of the applications are not using this type of architectures. Coming to the registry memory architectures, all the previous ones are using load and store architectures. But this is using register memory architecture. That means if you want to perform any operation, we don't need all the operands to be available in registers itself. We can access the data from memory itself because it supports different types of data modes like direct, indirect and different types of addressing modes are available for these type of processors. Dropouts are these things. High cost and it consumes more power. Now coming to ARM versus MIPS. Some projects in ARM mean it does not have 64-bit processors still now but MIPS has 32-bit and 64-bit machines. ARM does not support multi-threading and MIPS supports multi-threading. Both have 4-coordinate designs. ARM mainly uses it for mobile devices and tablets and MIPS is mainly used for network-related devices like routers or switches or anything. These are the differences among ARM and MIPS. Now we are comparing our ARCOS processor along with Intel Atom processors. Intel Atom is based on one X86 processor architecture. So coming to the Cortex-8, it is used in ARCOS tablet. Out of all available ARM processors, this is the one which has the highest performance and more power efficient. And it is used in 32-bit resort nature and horror-driven desert too common. And coming to the frequency point of, the frequency is from 700 megahertz to 1 gigahertz. Now coming to the point of power consumption, it takes 300mW for a second. That means if you compare power consumption rate with the Intel Atom, this is very slow. Coming to the Intel Atom, it is using X86-based architecture. Even though X86 architecture is memory-resistor-based architecture, but to support embedded systems, they modeled this processor to support register-register architecture. That is load and store architecture. What they are doing, they are transforming their original operations into micro-operations to support that load and store operation capability. And to transfer components, you just now see the power consumption rate. It takes 8 watts for a second. As compared with the previous one, it consumes a lot of power. So this is the drawback. Now coming to the point of operating systems. In all the limitations of the embedded systems, that means their CPU is low and memory constraints. So our operating system should support these things. That should occupy the less space in RAM. And it should consume less power. Our entire representation is concentration on these two things only. That means there may be different modifications to the embedded operating system. Their main intent is it should occupy low footprint. Low footprint means it should occupy less space in RAM and it should consume more power. And there are different types of operating systems available for embedded processors like the Sabian and Windows CE. Android and UC Linux, we are going to cover in this presentation. Next slide. Now coming to the Android. Android is also an embedded operating system. That means it is internally using Linux kernel 2.6 with some modification. It is not using original Linux kernel 2.6. It is open source and operating system is supported by different architectures like ARM, MIPS and X86. Now coming to the point of kernel type. Android is a monolithic kernel. There are two types of kernels available. One is micro kernel and another one is monolithic. Monolithic is full-fledged kernel. That means it consumes a lot of power and it occupies a lot of space in RAM as compared to micro kernel. My father research on micro kernel. Whether you can replace monolithic kernel with micro kernel or not. I am doing an MDP on that topic. This is the Android start-based architecture. Android contains four layers. The last layer is Linux kernel. It was written in C language and there are many modifications done to this layer as compared to the original Linux kernel. These are the components which had modifications to the existing Linux kernel. Coming to the second layer. Those libraries are different. Some are written in C and some are written in C++. Coming to the third layer. This is virtual machine. Those details about this layer will be covered by the next coming students. Each one is going to cover each individual part in this layer. The upper two layers are used for the applications and the framework. Those are written in Java. This Dalek virtual machine makes the interface between those Java and C language codes. In my presentation, I will cover what are the keys which are modified in Android as compared to the Linux. Why they are modified? I don't give any detailed description about the components. But I will give what is its functionality and why they are modified. Next layer. Now coming to what are the modifications done to that kernel. They prepared one driver like Alarm driver which supports wake-up devices from sleep mode. This driver is meant for deep power optimization. The second one is shared memory driver. This is mainly prepared to minimize the memory optimization space of the driver. That means to support low-flip team. Now coming to the binder driver. This is mainly used for IPC. IPC stands for inter-process communication. That means communication among different processors. Those who are sharing data. Shared memory and synchronization. That means when we are using shared memory or IPC. Concurrents are given. There are lot of issues regarding that synchronization. Winder solves all the synchronization problems between the processors. And why they created this binder is to optimize the... It should have less space in the RAM and it should consume less power. One more modification they did. Power management. For power management they prepared one solution. They are using weight locks. That is one technique to optimize the power consumption. That will be covered maybe in a minute. And these are the modifications which are done to the kernel. And now coming to the point of library. That is in second layer. That means third layer. They had one component SQLite. It supports relational database in tablet. And they are using those as the... This is open source. The two purposes is they should consume less power. And they should outplay less memory in the RAM. That is why they created new. Now coming to the binary. Already we have some general standard c-library glibc. But why and idg another c-library? Because this general standard c-library takes high power. And it outputs high memory in the RAM. And also it contains a lot of functions which are not related for across tablets. That means they are optimizing the standard library. And they created another library. That is libc. The main intention is to optimize the memory consumption of each thread. And reduce the startup time of a new thread. That means as compared to the libc. They took high time for starting a thread. Now coming to the point of Daluk virtual mission. This is also presented in that part layer. Why they need another virtual mission instead of... Many of the embedded systems are using JTMA. That is for Java virtual mission they are using Java to micro-edition. But in Android they created another virtual mission. That is Daluk virtual mission. The reason is in Android systems CPU is low. And it contains limited memory. And operating systems does not work with swaps. That means there is no virtual addresses. Most importantly battery power. To support these features they have created new Daluk virtual mission. Now coming to the point how it works. Initially application developers develop application in Java. And they compile it. And they leave the compiled file to one tool dx. Come next layer. There is one tool called dx. It is converted from .jar files into .dex files. That means it is converted from Java bytecode into its own bytecode. That means the DVM uses another bytecode rather than Java bytecode. Because the reasons are it should take low power. Next layer. Now coming to the point of storage media and file system. Many embedded systems are going to use flash memory. Why not hard disk? The reason is they are large in size. They apply more space in the device. And the second thing is they consume more power as compared with the flash memory. Now coming to the domain of flash memory. Flash memory is a non volatile memory. Which is prepared based upon EEP RAM. EEP RAM stands for Electrically Arrangeable Program Builder. That means if you want to write anything into a block. We need to erase that block initially after than only we can write. That means the time cost for a write operation is time for writing. Now there are two types of flash memories are available. One is NAND and NAR. That means the manufacturer of flash memory based upon NAND gates. Another one is based on NAR gates. There are some differences between both the two. NAND and NAR. But generally we need a vast amount of flash memory. There we will use NAND type gates. Because they are very low cost as compared with the NAR flash memories. Next. While flash memory is it is lightweight and it consumes low energy. And the one main advantage is cost read access time. That means here there is no sick time in hard disk. If you want to read anything initially the cost is sick time plus rotation time. But here there is no sick time. This is the main advantage. But the drawback of flash memory is to prepare one megabyte of flash memory. It is 5 to 10 times expensive rather than hard disk. So this is the main limitation of flash memory. Okay. Coming to the next. Yeah. File system. And I support Linux based file systems like EX-24 and EX-3. But why we need to go another file system? Because the thing is same. EX-24 also consumes more power and it offers more space in the RAM. For that purpose they created another file system. That is at another flash file system. Okay. Coming to the features of flash file system. This is mainly designed to support NAND flash memory types. And it provides fast boot type. Yeah. These two things. Why we need to prepare another file system. Now. Coming to the. Flash memory is divided into different pages. That means each page contains 5 top bytes of memory and 16 bytes for SPAY. That means the 16 bytes are used for maintaining the status of that page. Whether it is corrected or with the. And one limitation of the flash memory is if you write some 1 lakh times. Then that page does not work after that time. That means each block contains some life time. It should allow only at least 1 lakh writes. That means if you write frequent writes to 1 block. Then that lifetime of that block is very less. So we need to maintain which pages are corrupted. For that purpose they are maintaining that SPAY bytes. Now coming to this flash memory file system terminology. NAND page is called as here chunk. Some collection of chunks is called as a block. And at most that the two chunks may be a volume block. And here to store the files they are giving some ire to which file. Like in our ire linux. In ire structure support one id for each file. Like that they are maintaining on unique object id. On chunks are numbered from 1 to 3. We will go on the example in next slide. How this. Yeah file system looks like this. That means it contains different docs and each block contains different chunks. That means whenever we want to store a file. For each block we maintain information like this. That file is stored in which block and which chunk. And object id stands for identifying the file. That is like object id. And this deal flag helps to know the status of that page. That whether it is corrupted one or whether it is corrupted one. Now what are the data structures that are used in android. That flash memory file system. There are four types of data structures they are using to support features. This apps object is used for. It stores the file header object. That means what is the starting address of that file and details about that header. And this parent and siblings students comes. Parent helps to store the parent data structures of the current file. And siblings helps to what are the siblings directories or fights between the directory. And children data structure helps to what are the sub directories present within this file. Or within this directory. Now coming to the UC Linux. This is another operating system. Why we are going to do this thing. Whether we need to use android or we can figure out another operating system. This should be useful for our across tablet. That means as covered with android is there UC Linux takes less power or it occupies less space in RAM. For that purpose we are going to figure out different operating systems. And now coming to the UC Linux. UC Linux is also Linux distribution. Linux distribution means the operating systems those who are using Linux kernel. And live database and remaining stacks they own. That means UC Linux is also using Linux kernel. And it is mainly prepared for the processors which does not have MMU. MMU stands for memory management unit. That means we saw one model in ARM in previous slides. That is ARM Cortex M models. Those processors does not have memory management unit. The advantage of lacking of MMU in this. We are removing some hardware complexity from the processor. So the cost of the processor goes down. And another thing is power consumption of the processor is also less. This is one advantage. But if you are removing memory management unit from processor. Who will do that functionality of MMU. For that purpose we are modifying the kernel. That means we are giving that functionality of MMU into kernel software. Okay, come next slide. Then how the memory management in UC Linux takes place. Yeah, in UC Linux entire memory should be treated as single address space. And whenever the CPU needs to access some data. It directly access the memory without giving this request to the MMU. In general architectures whenever CPU needs some data it request to the MMU. Here there is no MMU. So CPU directly access the data. That means to allow that purpose we are balancing it to kernel. Now coming to the kernel some targets are there during the memory management. That is one thing is if kernel allocates some start space for a process. If the start grows there is a chance to overwrite the data on code segments of that process. So one thing is developers should know what are the requirements of start before implementations of their programs. Okay, come next. Yeah, how UC Linux support dynamic memory allocation. To support dynamic memory allocation they had some preallocated buffer code. Now one more problem is there in UC Linux that is kernel over commit memory. Usually applications ask for large amount of memory. That means if application we ask for 20 MB but it still uses 1 MB. If the memory management is present there it takes care. It allocates if the process does not use any allocated memory it uses the memory for another process. So kernel does not know whenever an application request for 20 MB it simply allocates the 20 MB of memory. So this is the over commit problem. Now come next. And there are different system calls which does not support in UC Linux. Because the reasons on 4.0 they are called these two systems are not using in UC Linux. The one reason is you know how 4.0 works. 4.0 system call works based upon copy and write. That means you know how 4.0 works. 4.0 is very easy to take a child process. After creation of child process, initially parent and all children is same at a space. But whenever one of these processes want to do some modification to the existing code, then only they create another set of pages to do modifications in 4.0. But in case of v4 what they do is whenever the child is created they simply suspend the parent process until the completion of child. That means they are not allowing parallel execution. And after completion of v4, then only parent execution starts. Next slide. Coming to a point of advantage of UC Linux. UC Linux kernel size is 512 kV. But the original Linux kernel size is 3500 kV. So see the difference. If we use these type of operating systems for emerald systems, we are using less space in RAM. And one more is UC Linux has another standard C library. It's not using GNU standard C library. The one thing is to apply less space. And coming to the IPC section. As compared to the Android architecture, UC Linux takes less time for the inter-process communication among different processes. This is one more advantage. Coming to a disadvantage. We are removing the memory production unit from the hodgepile. So there are lot of issues regarding that security. That means if an unprivileged process can point to addresses which are allocated to the kernel-related processes. That means there is a chance to curb the kernel-related processes. So they may need to even curb the system or shut down the system. These are some security-related issues are there. And lack of virtual memory also is one more disadvantage. These are the differences. Let's let them end it off. In your slide you said the file system via a double address. Can you please explain how file system can increase the boot type? Generally the file system boot type depends upon the memory. They are using flash memory. So for the purpose of booting, that is depending upon the memory. The structure is very simple. If you see the structure itself, it looks so simple. There is an idea which references that particular object. If you see the Linux one, they have indirect references. Double indirect reference tables are there and triple indirect like that. As your file system, the size of the file grows, the directly structure increases. That depends upon memory also. If you put the whole thing on hard disk, if you compare both on the hard disk... In hard disk, there is sit-time also. If you compare both on the hard disk, you put both on the hard disk. You have to compare that way. You cannot compare one with flash and one with hard disk. If you put both on the hard disk, I think... What is this? It should be faster because it is quite simple. It is not complicated. You have an inode structure which is so complicated. And you have virtual memory management there. All of the addressing is happening. In this case, probably if you have MNU less support, there is no MNU. So, there is no addressing that can happen. So, you have to write a virtual memory addressing unit also. I think it was slightly interesting. It was not much in details, I believe. And maybe you have figured out some of these things. Maybe not all, I do not know. Because you learn... Some are in second year. I really do not know how much you might be... Actually, how much you have appreciated it. Or maybe if something was shown in details, it probably could have been appreciated well. Like that example which filed as he showed that example. So, that probably motivated you to ask a question. Something like that. So, we can break for tea and there is a heavy session which is coming after that.