 Let us start with a brief recap of last class. So last class we looked at a very short history of IC device manufacture. So we saw that an integrated circuit is one in which the various circuit elements. So it could be a diode, a transistor, resistor, capacitor or all manufactured or fabricated on a single wafer. So this type is called a monolithic integrated circuit because you have the same chip. We saw that the first ICs were built somewhere in the early 1960s. They had a few tens or hundreds of devices which were fabricated on a single wafer. With time the number of devices on a wafer increased exponentially. This is given by your Moore's law which says that the number of component doubles in nearly 2 years. So right now we have wafers with more than 10 to the 7 or 10 to the 8 components. So these could be transistors on a single wafer. Correspondingly with the increase in device density there is also a shrinkage in the dimension of the individual components. So starting with in the 1960s we had components that were a few micrometer long. Now we have components that are of the order of tens of nanometers. In all of this the first thing you need is your blank silicon wafer. So today we are going to focus on silicon wafer fabrication and production or we look at the manufacturing of the silicon wafer. So in the case of a fab the first thing you need is a blank single crystal silicon wafer. So this blank wafer goes through all the operations in the fab in order to produce the various components of the integrated circuit. Silicon wafer usually has a specific orientation. So we either talk about silicon 100 or silicon 111. These are the most commonly used wafers 100 and 111 refers to the plane that is parallel to the surface. We also need to manufacture these wafers with very low defects for example things like dislocations because these in turn can affect the electronic properties. More importantly defects can also cause the device to fail because later we will see that these wafers go through a whole bunch of processing operations, thermal gradients, stress gradients. So the defects in the crystal can cause the wafers to break. They must also have very low impurity concentration especially metallic impurities should have concentration less than a few parts per billion. So we ideally want materials with no defects and impurity levels. So this should not be confused with dopants. So dopants are impurities that are added intentionally but impurity levels especially metallic should be less than a few parts per billion. So we want a material that is extremely pure. So let me give you some specs in the case of a current 300 millimeter silicon wafer. So a 300 millimeter or a 12 inch wafer is what is currently being used in the IC industry. So it should have a diameter the very small deviation from 300 millimeter. The thickness of this wafer is very small 5 plus 25 micrometers which is less than 1 millimeter. It is approximately 0.75 millimeters. So you are looking to make a wafer that has a thickness that is less than 1300 of the diameter. So these are really thin wafers. The orientation it can be 100 or 111 but the deviation from that should be very small less than 2 degrees. Typically you mention the resistivity of the wafer. So this determines the doping concentration in the blank wafer. So this resistivity values can be modified locally in order to introduce things like a PN junction or things like transistors. So they will be done during the process of IC manufacture but the blank wafers should have a certain resistivity value that is specified by the user. If you also look at contaminants oxygen levels should be around 20 to 30 parts per million and carbon and metals usually aluminum and iron or some impurities there should be of the order of parts per billion. So this is a typical specification for a 300 millimeter wafer that is used in the fab. So we need to make this starting from the silicon ore. We now look at the various processes that go through it. So the starting ore for silicon is of course sand or SiO2, SiO2 is just quads and the ore is called quartzite. Quadsite is a relatively pure form of silicon but it does have some metallic impurities in it. So this ore SiO2 has to be reduced in order to get silicon. So the first thing is reduction of SiO2. So in this case quartzite is mixed along with carbon. Carbon is usually in the form of coke and it is taken in a submerged electrode arc furnace. So in this case SiO2 is mixed with carbon. So carbon reacts with the silica in order to form silicon carbide and then the silicon carbide and the silica react to finally give you silicon. So the overall reaction here is silicon carbide plus SiO2 giving you silicon and the temperature is high enough so that the silicon is in the molten form plus SiO in the gas phase plus CO gas. So the silicon that is obtained in the liquid form is separated. This silicon is approximately 98% pure, aluminum and iron are the impurities and this is called metallurgical grade silicon. So you can draw a small schematic of the submerged electrode arc furnace. So this is the electrode. Electrode is made of carbon. So shaded region represents the furnace walls. So the input to your furnace is quartzite along with carbon. So SiO2, carbon is taken in the form of coal, coke, wood chips. So initially the SiO2 reacts in order to form silicon carbide. So you can divide the furnace into different regions and then the silicon carbide and silicon oxide or SiO2 react in order to give you silicon and then this liquid silicon is just discharged from your reactor. So this is your metallurgical grade silicon. So let me just call it MGS. So let me just mark it MGS. So this is the first step in manufacture of your silicon wafers getting the metallurgical grade silicon. So MGS is also used for making alloys. So for example, lot of silicides are made by combining silicon with metals. For example you can have silicon along with platinum, silicon along with aluminum. So there are lot of alloys made using silicon and for this metallurgical grade silicon is good. It is around 98% purity but in the case of IC manufacturing we want your impurity levels to be of the order of parts per billion. So this metallurgical grade silicon must be further purified. Next step is the purification MGS. So this purification is done by using a fractional distillation process. So here silicon is reacted with hydrochloric acid gas in the gas form in order to form SiHCl3. So SiHCl3 is in the vapor form and is fractionally distilled so it is purified. This is then reduced in order to give silicon. So the starting reaction is silicon solid. This is your metallurgical grade silicon. This is mixed with HCl gas in order to give you SiHCl3 plus leftover hydrogen process is exothermic. The reaction is done in a fluidized bed reactor typically at 300 degree centigrade or above so that your trichlorosilane SiHCl3 is in the gas form. This gas is then separated by fractional distillation and then reduced using hydrogen plus hydrogen gas to silicon solid plus HCl gas. So this process can be repeated in order to increase the purity of the silicon that is obtained. So we can say this is a looped process. The silicon solid that is obtained can further react with HCl to give SiHCl3 which are further distilled and so on in order to reduce the amount of impurities give you your final silicon. This silicon that is obtained is called electronic grade silicon EGS. So you start with MGS which is the metallurgical grade silicon and by fractional distillation you remove all the impurities to give you electronic grade silicon. So this silicon has the amount of impurities of the order of parts per billion. So it is suitable for use as an IC as a wafer for IC device manufacture. The only drawback is this is polycrystalline. It is usually in the form of ingots but it is a polycrystalline material. So the next step is to convert this polycrystalline EGS into an ingot of a single crystal wafer. So this has to be converted and we also want the single crystal of the right orientation. So remember at the beginning of the class we said you either have silicon 100 or 111. So these are the ones most commonly used. Now we need to convert this polycrystalline silicon in order to single crystal. So we next look at how we do that. So we need to produce single crystal silicon ingot starting from a polycrystalline electronic grade silicon. There are typically two methods for doing it. The dominant method is called the Chakralsky crystal growing technique. So this is the dominant technique for producing silicon wafers. Nearly 80 to 90% of wafers are grown by this technique. It is especially suited for making single crystals of large wafers. So typically we now use 12 inch or 300 millimeter wafers in the industry. The transition is going to go from 12 inch to even larger to 18 inch wafers or 450 millimeters. So Chakralsky growth method is the most preferential method for this. So in this particular case you start with the electronic grade silicon and it is taken in a furnace and melted. So you have molten silicon in a furnace. The furnace is heated by using RF heating coils. So typical melting point of silicon is 14-12 degree centigrade so that the temperature is higher than that. Then a seed crystal is taken. The seed crystal has the right orientation of what we want. So if you want silicon 100, you take a seed crystal with the 100 orientation then the other way around, it is my seed crystal. The seed crystal is dipped into the molten silicon. So the silicon then sticks to the seed and it is slowly withdrawn. So as the seed crystal is withdrawn, the silicon that is attached to it starts to cool and it takes the same orientation as that of the seed. So you have a growing crystal here and as the seed crystal is pulled away, the growing crystal also grows and it has the same orientation as the seed. This is also rotated in order to get a uniform wafer. So usually this is nothing but a rotary chuck and it is rotated and at the same time pulled out of the furnace. So the crucible is also rotated but it is rotated in the opposite direction. You know how to maintain a uniformity of temperature and a uniform growth rate across the entire length of the furnace. So the various parts of the Chukralsky crystal grover is your furnace. The crucible material that is usually used is silicon dioxide or silicon nitride. The reason being if you use any other material because of the high temperature, there is always a chance of contamination. So usually SiO2 or SiN is used. The drawback is SiO2 can also dissolve in the molten silicon so that the crucible is slowly eaten away as your crystal is being grown. There is a crystal pulling mechanism. So the crystal pulling mechanism is the rotary chuck which pulls the crystal at a rate that is predetermined by the process and it also rotates. There is also an ambient control. So the ambient control controls the temperature of the furnace, controls the flow of gases within the system. So it maintains the system properties. And finally there is a complicated feedback in control system in order to grow your wafers. So this is in a nutshell the Chukralsky growth technique. So as mentioned earlier, the C-crystal has the same orientation of the final wafer that we want. The final silicon that is solidified is your single crystal ingot. So if you are doing this in the case of 450 millimeter wafer, the ingot can get pretty heavy, can be a few hundred kilograms, approximately 800 kilograms. So this process is usually automated so that the entire thing can be done without human intervention. So one way of growing is the Chukralsky growth technique. The other way of producing single crystal silicon wafers is called the float zone technique. So let us look at that next. So the other technique for producing single crystal silicon wafer from the electronic grade silicon is called the float zone technique. One of the drawbacks of the Chukralsky growth is that it is done under ambient conditions so that there is always the possibility of oxygen inclusion in the wafer. For some applications where oxygen levels have to be really low, we go for the float zone technique. The drawback of the float zone technique is that it cannot be used for making large wafers. It is usually used for 3 inch or 4 inch wafers, which are typically used in say research labs. So in the float zone technique, the ingot is taken again in a furnace. There is a seed crystal. So the seed crystal has the right orientation that you need. It is mounted on a chuck. Let me just call it a lower chuck and the polycrystalline wafer is fused on to the seed crystal. The whole thing is taken in a furnace and in order to reduce the oxygen inclusions, usually an inert gas is flown. For example, argon. So you have an argon inlet. So in this particular case, instead of having a furnace that is fixed, you use RF coils to heat the sample. You just draw the coils slightly up. So these RF coils are used for localized heating and melting and they travel along the length of the furnace. So they are basically wrapped around the silicon ingot that is from your electronic grade silicon and as it goes, it melts the silicon in order to create a molten zone. Then there is a rest of the ingot that is on top. So the seed crystal is a single crystal and as the ingot is melted, it recrystallizes and it takes the same orientation as that of the seed crystal. So this region has the same orientation as that of the seed. There is a molten zone and the region above is still the polycrystalline rod. So let me just say poly rod to denote that it is polycrystalline. So as the RF coils travels, so initially the entire rod is polycrystalline. As it travels up, it melts a small region which recrystallizes with the same orientation as that of the seed and as the molten zone goes up, more and more of the rod becomes single crystal. So that finally you get your single crystal ingot and because this entire process is done in an inert gas atmosphere, you can reduce the number or you can reduce the concentration of oxygen within your silicon wafer. So this both, the Kralski growth process and the float zone process produces a single crystal ingot. So the dimensions of the ingot depend upon the dimensions of the furnace and the process. So from this ingot, we need to get silicon wafers that are thin, we need wafers whose thickness is less than 1 millimeter. So we typically need to grow for some shaping and cutting operations. So usually industrial grade diamond is used for this process. So the first step in the shaping operation is to remove the seed end and also the tang end from the ingot. So you remove both ends of the ingot and then you do a surface grinding operation in order to increase the smoothness of the surface. So the size of the ingot is determined by the size or the diameter of the final wafers that we want. So if you want 300 millimeter wafers, you will start with an ingot that is slightly larger than 300 millimeters because during some of these operations you will lose some amount of your surface. Once you remove the seed and you do the surface grinding, then we also grind something known as flats along the entire length of the wafer. So after the surface grinding operation, flats are ground along the length of the wafer. So there is something called a primary flat which is related to a specific crystal direction. This is usually located by using x-rays. You also grind a secondary flat primarily for identification purposes. Here for example, if you have a p-type silicon that has a 111 orientation. So here the 111 direction is perpendicular to the surface or in other words the 111 planes are parallel to the surface. There is just one primary flat. So a flat is just that it is a flat region in your wafer. So this flat region represents your primary flat. This is one primary. If instead of p-type you have n-type 111, there is one primary flat but then there is also a secondary flat that is ground at 45 degrees. So in this case you have one primary plus one secondary. If you have a p-type 100, you have 2 flats, one primary flat and a secondary flat that is at 90 degrees. You just draw it more clearly. So once again you have one primary and one secondary at 90 degrees and if you have an n-type 100, you have one primary and one secondary flat that is at 180 degrees. So the function of the flat is to mark the major crystallography direction and also as a way of sorting out different wafer. So rather than having to measure resistivity just by looking at the orientation of the flats, it is possible to say whether you have a p-type or an n-type or whether you have 100 or 111 kind of wafer. So we can look at some typical specs. So we have seen a 300 millimeter wafer before. So let us just look at a 150 millimeter wafer. So these are 6 inch wafers. So once again your diameter must be pretty close, 150 plus or minus 0.5 millimeters. This is 0.65 to 0.7 millimeters or 600 to 700 micrometers. You have a primary flat that is somewhere around 55 to 60 millimeters and then a secondary flat if it is not p-type 111 which is slightly smaller, 35 to 40 millimeters and the orientation of the secondary flat depends upon the type and the orientation of the base crystal. So we also define a wafer bow, so 60 micrometers. This defines the flatness of the wafers. So if you think about it, you have a wafer that is 6 inch in diameter but whose thickness is very small, it is less than 1 millimeter. So this wafer will not be completely flat. During the processing operations, there will always be some stress so that there will always be a curvature to the wafer. So this curvature is defined by the wafer bow. We want this number to be as small as possible so that we have a flat wafer. So later we will see that when this wafer is used for various processing operations, for example if you deposit films on this, then that can cause stresses in the wafer. It can also lead to an additional bow. So we want to start the blank wafer as flat as possible and the orientation. So whether it is 1 0 0 or 0 1 or 111, we want the orientation to be within plus or minus 1 degree or 2 degree. So we started with the ingot, we cut out the seed and the tang ends, did a surface grinding and then also ground all the flats, whether we have one primary flat, the primary and secondary flat, the respective orientation. Then we need to do wafer slicing so that we slice the individual wafers off of the ingot. So usually an inner diameter slicer is most common and the cutting edge is usually a diamond cutting edge. So in this particular example, so here is the saw blade with the diamond cutting edge on the inside. The wafer is just fed through it, so this is the ingot. So the ingot is just fed through it and the diamond saw cuts out the portions of the wafers at the right thickness. So the thickness usually increases with increase in diameter. If you look at 3 inch or 4 inch wafers, they are usually around 0.5 millimeters or 500 micrometers thick. With increase in diameter to basically have better mechanical integrity, the thickness is also increased. So a 12 inch wafer is usually around 0.75 millimeters or 750 micrometers thick. So after cutting, then we do a chemical etching process. So after cutting, so the etching removes any damaged or contaminated regions. Usually an acid bath is used with a mixture of HF, hydrofluoric and nitric and acetic acid. After etching, the surface of the wafer is polished. So we go through a polishing step. So this kind of polishing is called chemical mechanical polishing or CMP. So later when we look at wafer fabrication, we will see that CMP is one of the important steps, forms a part of an operation called planarization. So in this case, a polishing pad is taken and the wafer is placed onto the pad with some sort of holder. So some amount of pressure is applied while at the same time the holder is rotated. There is a slurry. So the slurry is some liquid with dissolved particles. So in this particular case, the slurry used is SiO2 usually dissolved in NaOH. So the sodium hydroxide works in the form of chemical reaction in order to dissolve any of the impurities and particles. And the SiO2 acts as an abrasive material in order to polish the surface. So that is why it is called chemical mechanical polishing because you both have a chemical component and a mechanical component. So the surface of the wafer is polished. So usually polishing is done on one side, it is called a single side polishing. The other side of the wafer is dull. So the polished side is then what is used for the IC fabrication. You can also have double side polishing in which case both sides of the wafer are polished. So you can have single side. Single side polishing is most common but you also have double side polished wafer. So after polishing, the wafer are usually taken to an inspection step. So in the case of inspection, they are checked for any surface contamination or defects. So you can also measure the resistivity of the wafer. So this is usually done for a 4-point probe technique. This is especially used if you are trying to make doped wafer. So we saw in the case of the operation, we did not consider the effects of doping but you could also dope during the silicon manufacturing process in order to get doped wafer. So some sort of electrical measurement, usually a resistivity measurement is used in order to check the resistivity of these wafer. So after inspection, these blank wafer are ready to be transferred to the fab. So they will be used for the manufacture of the IC devices. So in next class, we will look at overview of this manufacturing process. Then we will look at each of this process in detail in order to consider the various steps. But the starting step for all of these process is the blank silicon wafer.