 This was the circuit which we designed and there was a quick query last time that when I said VGS 3 is equal to VGS 4 is equal to VGS 6 and some people objected to that. Actually it is not objected, I thought but now you should know what I said. Here is one, you can now look at it the way it is done. This is specifically done for you to show how it is done. Let us take a normal mirror both W bar equal to each then VGS 1 is VGS 2 but since it is mirrored VGS 1 is also VGS 1 therefore this VGS 2 is also VGS 2 okay now having done so we now look at this structure which is same thing this is your M6 or whatever number what is that transistor there this is that M6 this is the mirror and it is driven from the output to the input of that common source amplifier. Just look at it, if the currents are same VGS is same there is no other way VDS can be different okay but the currents are also same IDS is equal to beta by 2 VDS at square so that has to be same if the currents are same sizes are same there is no other way it can be different okay. So since we say so I have this normal current mirror which is you can see there these transistors are also identical there as well as here and the output of that is actually fed to the in this is for N channel but you can do it for P channel. Now one can see from here this is VGS 1 this is VGS 2 and that is also equal to VDS 2 and this VDS 2 is nothing but VGS 3 for this is that correct since I 3 is the current which is beta dash by W by 3 VGS 3 minus VD square and I 2 or I 1 which is same here is beta and W by 2 VGS 2 minus but these are equal okay these are equal then I 3 by 2 is W by L 3 by W by L this so the ratio this is also essentially one of the method of biasing a common source amplifier from the mirror okay this is a very standard technique you should know it but I thought since you that the raise issue so I thought I will prove myself that I am right okay so this you try yourself in case still it is not clear but this is very in my opinion very simple the open which we looked into all these days was essentially a normal single ended 2 stage amplifier which we called open there are other opens possible in the hardware implementations one is cascode amplifier open the other is called high performance this is essentially related to slates high speed open is related to the bandwidths the differential output open 2 outputs which are differentially to that is also a differential open which probably we may do not all of them then there are amplifier opens which are called micro power very low power opens then there are opens which are low noise opens very low noise we are trying to use very large signal to noise ratio there and maintaining low noise then there are opens in power electronics particularly we use which are called chopper stabilized at low frequencies and of course there are opens which are at low voltage supply itself maybe 1.8 volt or 0.6 volts so there are number of opens in the literature basic idea does not change though for each case you will have to do something to achieve that specification is that clear so look into books there are all kinds of such opans are available I have done the basic opan 2 stage single ended amplifier but they can need not be single ended as we see earlier it can be double ended as well okay. The first thing which probably we may like to quickly do is the cost code one of the major worry of the 2 stage single ended opan was you are worried about its stability because there was a second stage and there was already a capacitor at the output of the first stage and then we put CC Miller capacitor so that you can compensate to some extent or put RZCC to actually compensate the non-dominant pole or null that but that means you are actually limiting something because once you start increasing CC for your good compensation you have more worries if you put RZ higher than that 0 which is coming has to be very close to the non-dominant pole so adjusting W by alpha that transistor is not very straight forward as it looks. So why after your ultimate aim was to see large bandwidth and large gain and stability so if the second stage is removed then a different as a larger gain it has only one pole dominant pole you can adjust the bandwidth and gain accordingly can do that and to improve the gain of an any different stage or any amplifier stage one technique we know is to do cost coding GMR out so you increase R out. So let us see if you look at this single stage cost code opan to improve stability it shows one possibility that we have a single stage opan with larger gain since there is no second stage second pole will not occur that is increasing stability to improve again we can have cost code defam and if you look at it if R out is larger GBW by AB0 only dominant pole which is R out by C out so you have only two things to control the W by L's of the three and four transistors and W by L's of M1 and M2 transistors and you can still increase the bandwidth will not be very high simply because if you are larger gain then you lose the bandwidth to some extent but at least there is no issue on stability there is no second pole going on of course there is one pole and zero from the C3 but that we are really evaluated because of CGS is far far away so we do not care for that. So this was once not that we did this we I am trying to reach what we did finally one possibility was we cost code the defam itself is that okay everyone this statements are right is simply because I thought that if I say a little fast or something you can read at least you need not write every bit word by word you should only think what I wrote in general what I am trying to say that the method is that you can cost code a defam is that okay so how do you do that is it okay here is a circuit which is cost code open or defam I introduce MCD1 MCD2 MCD3 MCD4 four transistors from the normal M3 M4 M1 M2 combination to make it cost code looking structure now a few things you should know actually I could have connected something like this but since you know it would have merged with something I put it inside this is still like mirroring it from the date I am going to the drain of this transistor D3 now you can see from here what a further idea there is a small resistor R and from this MCD3 to MC I put output here do you think why this was done anyone see I want to bias these two transistors I must provide a drop across it okay so essentially it is a V bias which I am going to create there for and in current will be decided by M1 M3 anyway so whatever IR drop there will actually decides the bias for it so a trick of the trade just put small R okay and this R value will decide when the transistor will be at least at the saturation or little better by similar logic to cost code this I put two unchannel devices which is MCD1 and they are given a separate bias V bias okay so that these two transistors can you recollect your open our cost code stage we need a DC bias at the series transistor that bias I am creating now question is from where this V bias will come externally how do I generate these V biases so that I can force these two transistors in saturation and still act as a series transistor to M1 M2 is that clear this is what we are looking for I will show you how we did you draw the circuit I am not going to design this these are circuits we know the circuit analysis now well you should be able to design yourself in case such a circuit is required and basically you need not design manually right now once you know how to design open basic design you can continue and put in cost code in between okay it can be but then two resistors are very bad to operate because they will create an RC time constant so avoid as much larger number of R senior circuits instead of R in here I have one R I may still keep the other I will create out of what you are asking to a transistor which is what we are going to do you are not very wrong okay what is the drawback of this circuit as soon as I do cost code something goes wrong which swing but even input ICMR goes down because two idiot drops okay is that clear so your ICMR goes down and smaller the ICMR means your linearity is very restricted now okay which essentially means is for very low signals only you can probably employ these amplifiers so what you said we out is our view max we will also will be reduced because of drops across two transistors is that correct and that is one reason why you can actually there is some other version of this looking into the books which is called folded cost code which slightly improves ICMR compared to this but essentially still will be worse than the normal single ended opens okay so this is the drawback so maybe I write reduced ICMR and view swing okay so this is the drawback now I want to create this bias this why I chose it because anyway you need this the circuit which is shown in the book is good enough to actually create any kinds of such biases which is given in not exactly this way but bias book or to some extent even in reserve is book okay also there is some bipolar version of this is available in grain Myers book actually you can also try something you can have Pisimax you can one or few transistors can be converted to bipolar and may have advantages and some disadvantage of course with that so there are versions I am just showing you the basic idea of cost codes if I see you know this is creating a problem bandwidth if I increase the gain bandwidth goes down drastically they it will give gain higher because out is very high now the problem of I see is can I then use the two-stage what we did earlier but actually cascode the output stage okay instead of the first stage the source common source amplifier I will cascode that amplifier so the second version of this which actually appeared is this cascode with cascode in the fan stage can improve by putting cascode a second stage but this is the first one in which you can see from here this is your normal m6 and 7 output stage this is your cascode which we did and to do this I have introduced two transistors mt mc what is called mt2 and mcd4 they are names given in the book so nothing great about okay this is mt1 and mt2 sorry this should not have been changed the name mt1 and mt2 please remember I can use this the advantage of can can you think what is the purpose of mt1 and mt2 because these m6 and m7 are going to decide your gain as well as the slew rates okay so I said okay they should not be connected to the output of the first stage because they they connect directly then they actually limited there so we said okay that is so I can have a layer translators from this voltage and this voltage whose outputs then I can give it to m6 and m7 and if I do this I can have better this but what is the problem with mt1 and mt2 if I put it there again the voltage swings will be now limited because actually you are reducing this values so actually reducing the output swings but slew rate could be slightly better which is independent of gm1 gm2 currents coming from here okay so this additional drive capability which you create separately can do wonders provided you are ready to have lower output swings okay these are tricks what people do ultimately to this as well it just take output stage and cascode it here is that circuit this is given in bio book please look at it again this is essentially required for your slew rate requirement that this currents which are coming from m6 and m7 are not connected from this output these are driven by mt1 and mt1 so I am changing the bias for this independently so the currents which otherwise would have got limited because of the game which comes from the first stage is now broken by me I said okay I have a separate voltage requirement for m6 and slew rate of course this RC has to be because the charge has to be from this side so the output has to be RC from there okay whenever m6 current is calculated the output of this stage goes to input of the m6 forget about this part this output would have gone to m6 that means the whatever is currents coming here will and gain I want this current will be decided from this side what is the input VGS coming from there by putting this translator I broke that chain okay I broke the chain independent control of bias to this now that VGS 6 is not equal to the earlier one I am now controlling through these two devices my bias for the m6 okay so that means I can change the current here to require output load current requirements I can change without changing anything here is that clear otherwise that will decide what current I can push to the output okay the alternate way as I said is to put a buffer at the output that is the common source amplifier this is your normal this all that I did is put one P channel and one N channel device in series to m6 and m7 and now I know once I do this R o of this and R o of this could be boosted so R o parallel is even boosted and therefore one can see the game will be larger because R out will be GM times are out of the first stage so now it is cascode stage the game is now boosted by me is that correct game is boosted by me but what is the problem I will create the bandwidth will proportionately go down because now the second pole has to be that means nulling as well as this method has to be found so that the bandwidth is not that much reduced so do not increase CC too much also do not increase RZ so much because if RZ is too much here will go too much on the left upper it will not nullify the non-dominant pole so when asked to adjust RZ CC value so that reasonable bandwidth and higher gains are please take the point what did we say in the case of game bandwidth is broke that chain we broke in cascode so that word we are trying to use here by putting cascode at the last stage however all these statements I am making I am telling as this two stage circuit which I am keep showing you is an op-amp in fact op-amp is this is not a real op-amp okay any op-amp you use need to have a final output to be driven by something else because this is not able to draw larger currents so the mode which we are going to see may not be very small it may be very very large comparatively very large means it may not be larger than R out or something but at least it will be sufficiently large for a large output loads what should what do I need these should provide larger currents but these currents are provided by this stage as well as the RZ CC combination I am going to GM side decided from their ratios which means I am not able to really drive a larger load using two stage op-amps okay this word op-amp therefore should be slightly with a use with a pinch of soil because this is how we started with as a priority we kept telling it but we said really actually this does not drive the external route it may give a good speed here but at the output you need larger currents their sizes how much we call 40 50 60 I want larger current means 100 200 W bios if I put I can use larger currents is that correct that means followed by this there has to be another stage which is called the buffer stage okay and unless there is a buffer stage we should not really call that as a op-amp why I am insisting on this because if there is a op-amp without a buffer stage and will little modifications I do that that block is essentially called OTA operational trans conductance amplifier OTA with a buffer is essentially a op-amp we will come to it in the soon is that point layer so two stage op-amp is essentially closer to OTA okay whereas when I put a buffer out then I actually call it as operational amplifier okay so is that point layer so the output stage could be what kind it can be a class A amplifier can be a class AB amplifier or it can be class B amplifier that is called pushful okay which one you will prefer what is the problem is pushful anyone remembers second year crossover distortion or dead zones okay the two device may not switch over at the same points okay so there is a dead zone appearing at the inputs now this issue so we will avoid B class A has a limited gain okay so we do not want class A so I want class AB operation so what we say for a while it operates in B okay and for a short time it operates in A okay so we call that as class AB amplifier is that point layer so my worries are that okay I want the next stage which should be able to provide huge currents for the output capacitances but huge currents I can only get if there are large W by L for these transistors but large W by L means they are decided by the gains from this side you have no control on that the W by L you said you remember GM 6 and GM 1 were related because of the stability issue which I create should be greater than 10 or something so that ratio which I could not then play too much forces me to think oh I must have another stage out okay and that is called the buffer stage and buffers are normally AB or in some cases even beta okay is that okay the issue is clear to you just for those who have forgotten their second years this is something slide I think I should show quickly a class we are AB amplifier basics could be understood by using a circuit shown below we are a M1 M2 forms that transistor amplifier and M2 receives of course this is N channel driven it could be other ways it is nothing very serious you can RP drives and load and IP load what we do in principle is to bias M1 M2 by 2 bias power supplies which is called VGG 1 VGG 2 and the actual circuit will say how do we create this VGG 1 and VGG 2 now you can see from here the way it operates depending on these 2 values I can make M1 M2 either in working in such a way both working that class A both out V in plus and V in minus goes through I can have a class B in which V and positive either goes to or V in negative goes through okay that is class B and in one third case partly M1 and M2 independent operates and some way both together operates okay this was required for output of the second stage will be of higher voltage swing V outs max we are created V out my max minus V out min your output swing large enough is that clear please make a gain stage you are going through okay so V out is sufficiently high now when this V out or for this transistor which is going to be my vein if that is moderately large one can see from here if this increases positive this VGS increases is that clear but since the bias is kept like this equal in the same this decreases total bias is same if you increase that one the other one proportionally goes down okay so current in M2 will increase and current in M1 will actually decrease okay now this if I keep increasing V in there may be possibility that this voltage may not be as much as VT requirement so M1 may shut off and all the current may only pass through M2 you increase V in larger and larger this may switch off and this may become only running the converse is true if V in is minus at certain voltage this M2 may shut off and fully M1 will operate but in between these two values both M1 and M2 will operate and therefore this under those cases when both operates we will say device is in or the amplifier is in AB class amplifier of AB class is that clear now please remember since the current in M2 or current in M base this charges the this is off this charges the capacitor when this is off this discharges the capacitor essentially this is like an inverter driven system and this essentially meaning that if I want this capacitor to be charged fast I must put larger sizes of M1 and M2 except for a short time when both are long then the huge power will actually consumed otherwise only dynamic power will be zoomed by me is that clear to you this is equivalent taken from inverter side that okay it is like an inverter system in which I can decide dynamic loading dynamic charging discharging rather than static charging okay now this please remember SR should not be used correctly here because essentially I am saying the output capacitor charging is also cleared there dv0 by dt at that point this view is our two stage amplifiers output which is going to be the input for the buffer stage how much will be voltage swing for this when this is off VDD minus 1 VT okay or VDSAT will be as close to at that point is VT so VDD minus VT and how much is there VSS plus VTP so one can see the swing this is now very VTs are much smaller values so the output swing is also large enough in this kind of class a a b or b amplifiers so one of the requirement was faster charging and larger out why larger because you are putting larger inputs and you want all of it to possibly go out okay otherwise what is it will start going the distortions and more major distortions you see later is the third harmonic distortions okay because nonlinearity starts a0 plus a1x with a1x square plus a2x cube you expand this series and you will find which ones omega 1 plus minus 3 is going which means going to hurt the most for us okay okay so is that point clear so all that now I have to do in real life is to generate VGG 1 and VGG 2 by this was only a principle is shown okay that if I generate this depending on the V in values which I am going to get I must choose these values properly so that either this or this is on in most times or for a short time both will be on for you that is not a good area because then the gain actually is falling currents are actually partly taken here and partly taken here is that clear which we do not want because that means all of it is not made available to the capacitor that case should be for a shorter time this happens even in a CMOS inverter okay this is called short circuit current does it press through p channel and channel turns on both simultaneously for a while when input changes from input output I mean the 0 to 1 when transit it does change the output like that same game was played now only difference between this and next is what I like to create this VGG 1 VGG 2 such that this transistor amplifier can become class AB so okay here is a very simple circuit which can do this job for you these m1 m2s are not same as in the defam I mean two stage amplifier these are just put m1 m2 m3 m4 m6 here so what is actually an amplifier m1 m2 is actually forming your class V amplifier is that clear the one which I just now showed these are the two transistors which are actually at this output is the capacitance whatever this circuit is going to do is provide VGG 1 and VGG 2 it is called floating biases it is called floating biases this there is a transistor m6 m5 m4 m3 in series and there are mirror formations here okay this m3 is receiving current or biasing from the mirror side which side that m5 m8 or whatever the last defam that is in extended up okay or you can also put V bias from the circuit which are created V bias also in my bias circuit so I can either pick up that or mirror the current from whichever current mirror I have to push this so I can decide current in m3 or VDS of this transistor okay so what does it do this is my input so this is whatever this is a amplifier kind of situation this is driven by this transistor this acts like a load for this okay so this is my output which is going to be the input for m2 from the lower side when this gain is opposite this is the maximum voltage then appears here in the negative this minus this so this actually drives m1 okay now the trick here is the maximum current which is decided by m1 m2 whatever we want is beta and VON square and beta p VOP square so if I adjust my W bias of these two I can decide and if I know my VOP and VON then I will be able to decide how much maximum current I can provide CL to charge and how much I can create generally I will adjust them same okay because the time taken to charge should be time taken to discharge but it need not be every time because many a times once the capacitor charge the next stage requires some time for at further is that point where this output will go to some other stage that has some response time so in between discharge if input goes down I have sufficient time for discharge actually please remember there are tricks in the game because once charged the output is now taking time for the next stage to operate when you switch up this it does not matter because it still can be delayed because that is still has not completed the operation is that correct so many a times sizing is done so that this time may not be same as this time but as a designer we always try to keep equals so that this issue may not come into mind how much okay is that clear so that is the method of creation of an output stage of a which is class AB amplifier and this class AB amplifier is always the last stage of any op-amp is that care last stage of any op-amp first stage is single ended defam second is gain stage and third is the buffer stage is that correct please remember buffer gains are not important what is important is currents it can give you as much as this so what should be sizes of this beta's should be large enough so that our I out max and I out mean in our sufficiently large for this capacitor to charge and discharge in a given time what you want is that clear so that something and now since it is not connected with the last two stages this is independently driven by me to any external load I am in connected to is that clear this is how op-amp normally works okay op-amp normally works to understand I was saying op-amp op-amp the real op-amp will have additional circuitry of this kind and if I put this here this is what essentially an op-amp will look like so you can draw this this is our final op-amp which almost every circuit in the chip you have is this kind okay I forgot maybe I can now put R R will be of course replaced by a transistor whose bias can be picked up from any of these even this up can be replaced by what a P channel diode connected is that correct the R can be replaced by P channel diode connected device what why we do not want to put R everywhere because the area it takes is very high this will be around 350 K to 100 K 4000 K that means McGon sometimes and that takes huge area on chip okay however normally R has one advantage which this has a positive temperature coefficient this has a negative so not to see it could be minimized if I put actual R there so for that purpose is sometimes instead of diode you actually put R is that clear this fact has to be remembered normal resistance of positive temperature the other way so we want to reduce to less than thousand part per million per degree centigrade and that is the way people probably prefer it at times is that clear to you okay and this is my final output stage now this last you know something I draw just check that last part C L parallel to something I put this is our defam this is the first part is bias this part is the defam stage this part is essentially your single gains cascode relatively cascode kind this stage but essentially it is screen which is you and which is you to fires this M 15 and M 16 which is your output amplifier or buffer stage okay so how do we design what we first design defam based on that we design gain stage based on that we design what is the buffer stage please do not go the other way and this of course can be independently designed and can actually be kept ready for every one of you okay which may be a common because this line can push anywhere okay and you can adjust W by ratios to get what the new currents you want okay this why I intentionally put a RL there says M 5 and M 15 and M 16 are going to drive with a large currents available so even if you have a resistive load there it can still create we out by IR drops is that clear in the case of you do not have this and you are driving from there then the currents available to you are so small that IR may not reach larger V0 values is that point clear this is an issue which is separating this day open from an OTA which I am going to come now is that clear is that point clear if this currents are not large enough IR cannot reach to V0 max V0 mean values okay and therefore opems can drive both resistive loads and capacity loads is that correct that is the major thing which we are trying to say here a opem with a buffer stage which is always called opem then can drive any kind of loads is that clear that is the strength of an opem okay so now we after all this opem opem word we slightly modify opem word with a new device or new amplifier which we call operational trans conductance amplifier OTA in nutshell what I say is if you buffer it a defam then it is called opem and if you don't then it is called OTA is that correct though the actual OTA is not that simple or not that trivial as show the actual circuit which we use but this is essentially different between OTA and opem is an opem without a buffer stage is like a OTA please take it the actual OTA symbols is therefore separated from opem you can see we cut it partly here make a this quadrilateral kind of thing and it can have both outputs normally opems are generally single ended outputs is that clear opems are generally single ended outputs there are separate opems which are called differential opems so there will be two outputs but then I will create those opems out of an OTA itself because they anyway I have two such outputs possible is that clear some necessary to use both but I have access to both possibilities but in real OTA I will do is I have only one output and I that is what the major OTA chips are available okay is the difference clear this is same defam same defam if it is buffered stage gain stage buffer stage then you say it is intentionally I did not put single ended you can have separate bias and can use source current source the instead of diode connected loads loads could be either of them even here I can have bias or have a mirror okay please remember these are all your thing you can decide any time okay so having shown you that there are two symbols and there are two possibilities now let me give a table which actually separates OTA from is that everyone wrote down shown this figure is trivial but still square defam as a square one of the asset plus minus be cushioning upper plus last so do you get the where do you think therefore OTAs can be used because there are no buffer stages there it can only drive capacity loads it cannot drive resistive loads that is the way major difference between opam and an OTA but you can always convert an OTA into a opam and we will do an example I will make an amplifier using an OTA and I will also make an amplifier like normal triangle base circuit resistance I will show you with OTA also I can get the gain same as what I get from opam provided something happens that provided is what it differs between opam and OTA okay table which is relevant for you opam versus OTA or opam and OTA which are a look at it a typical opam is OTA plus buffer therefore OTA does not have this second most important point all opams are voltage controlled voltage source PCBS all OTAs are voltage controlled current source okay VCCS so what will be the output of a opam V0 by VN so AV voltage gain what will be the output of a OTA current is the output and input is the voltage so it is trans conductance therefore it is called trans conductance amplifier is that clear another thing which is which is very different between OTA and this for a defam stage what are the loads I used diode connected is that clear so what is output mode resistance at the defam VO1 or VO2 very small gene 1 upon gene is that correct so these are 1 upon gene kinds of outputs come these are called low impedance or low resistive nodes so in opam most nodes are low resistive nodes is that correct whereas we shall see later OTA the output nodes are actually very high resistive loads are very high impedance nodes and therefore are easy to charge a capacitor is that clear that is the reason can drive all loads opams can drive all loads both RC and RC okay drive only possible capacity load and certainly not possible to drive resistive loads for OTA OTA does not drive resistive loads because their currents are smaller comparatively they are no large sized understood there at the output so can't drive larger currents and therefore R is very different you got the point why IR is a V0 if I small that IR will never reach the V0 max value which you are looking for the next is the all opams generally are complex we have seen how much hardware I did and they require large power dissipations to maintain your GM's and there are so many vertical paths so they are large power dissipation circuits comparatively the OTAs are low power comparatively and almost on chip so called amplifiers which you use on chip any OCHP you see it will be OTA and not an opam this is some interesting part there since opam can have any load it can have larger gains it can have any bandwidth back as code you can do many tricks there high performance high speed they are used in all kinds of applications so they are called general purpose applications right from instrumentation to communication everywhere or power electron you can drive everywhere whereas these are only generally used in filters which is GMC continuous active filters okay these are the major difference not that they cannot do amplifications voltage amplification is also possible but this is much higher than what I can get through this is that clear so I would prefer to use OTAs wherever I need to create larger GM's okay larger GM's and not larger AV0s is that clear that issue clear so OTAs are of its own class they only say OTA plus buffer is not that real as I make it because I show you a circuit later the actual OTA slightly modified version of what this statement as if gives okay as said earlier OTA is a VCCS device as shown here so what does that mean the symbol which I showed you here it actually receives a bias current I bias for input signals of V plus V minus or V in 1 V in 2 whichever way look at it and it gives me an output current of I0 okay and then I am interested to know I0 upon V plus minus V in or V delta V ID or V ID whatever you write and that is called the trans conductance capital GM okay why it is called capital GM because it is from the output to the input there in the small GM's as the part of this circuit okay if I see equivalent circuit of this you can see from here this is my V difference this is GM time V difference is what is appear this is equivalent circuit of this okay so I0 GM times V plus minus Vm okay capital GM you can make so I0 you make it capital GM so I0 upon V difference is trans conductance and since it is a higher so if I make I0 higher than the V difference for which I am finding that then GM's are higher and we say it is a good trans conductance amplifier so what should I do therefore GM should be improved is that correct a good trans conductance amplifier means large GM's so like of course there will be we will not calculate but maybe you think over it or someone lastly maybe I will put it on the web there are bandwidth issues there are noise issues with OTA and opams either you read or maybe I will put some words on that on my web which okay so that you can see why OTA are not all that great as people think but in some cases they are the best device to operate is that okay this is only equivalent part of that so let us draw actual OTA and see how much it differs that is the real life OTA implemented on a chip the circuit diagram is taken from that so you can this is taken from boys and Bakers book you can I keep telling you day one if you really want to learn the real life analog designs do look at boys and Baker because Baker being the chief scientist all the world he has been actually fabricating the newest analog blocks okay and because of that the data he gives a little data to you that is okay but the numbers which he is giving is essentially tested chip resolve extra extraordinary in good theory but he never gives the numbers which probably may get actually on chip okay he may put in many things ideally okay Baker doesn't do that he knows exactly what is the real chip will give you so his values of sometimes very hard looks to you but they are essentially what he has obtained during designs during realizations so please start looking both that book because it gives the real life there it is old technology he is he is not modified his new book they are modified the old book has still 5 microns okay doesn't matter up may be a theory equally important time okay so typical OTS diagram is shown here this is your defam this is double ended is that correct it is double ended of your book a style of echo yes output no little else a little yeah because you are connected and so we normally show from here he has shown from here which is same point so that's the way people you know differ in right in showing figures okay these are two diode connected but not mirrored is that correct they may be mirrored some other reasons but they are right now not connected like this to create a single ended output it's a two different diode connected loads okay on your right if you see the output of this stage defam which is taken from here or here they are saying is given to m4 which is like your m6 in the opamp stage gain stage please remember we are not looking for what in the case of OTA voltage gain we are not interested in voltage gain what are we interested in gm means currents okay so we will see what currents m4 will drive okay on your this side of load they are on a transistor which is m3 another P channel transistor which is using output from v1 v1 is giving input to the m3 these numbers are also taken from boy's book okay I mean you can put any names but this is what I say defam has the input plus minus v2 minus plus v1 this m4 is connected to a m5 in series down and this m5 gate is connected to m5 one on the other side which m5 one is connected in series to m3 so what is this node has the impedance higher or lower v1 and v2 nodes 1 upon gm smaller loads okay but at this output which is like a buffer stage or equivalently this there is no gm kind so RO power RO huge output resistors are created okay we are asking now RO is output is higher yes RO out is higher actually now the game is from m4 one to m4 the size changes k times m5 m3 one and m3 are the same size m3 and m5 one are also same size but m5 one or m3 to m5 or m3 one m3 m5 equal but this is again k times larger size this is also larger time but larger of m4 one okay k times that k is more than one the minimum value of k will be one okay we can start with same and channel devices are similar p channel devices are similar so that beta n1 is equal to beta n2 beta p3 one is equal to beta p4 one this I can assume w bios are same mu c ox is same so they are identical they are identical now you can see from here last stage very carefully you see it the way I have shown shown the current this current is going coming down and this current is going up okay AC current do not say DC current so what will be the current here the sum of the two are subtracts this is mine one minus or minus means add up this the current will be very high here is that clear we will see how but is that point clear this current this current add at the capacitor end and therefore the currents are larger larger the current output current larger is gm this is what we are saying by making it k I actually boosted the current is that clear by making it k times I actually have boosted the current now the way it operates if these voltage AC signal change since these are 180 out of phase so if one changes one direction the other will change the other directions if this decreases this decreases this also will correspondingly again one it goes up like this this way this goes down again so the idea choice of such circuit is that between these two m4 m5 currents AC currents are always opposite okay AC currents are always opposite because of the phase I am creating out okay now this idea that I can change the phase is very interesting because then out is some of these two currents subtraction means actually magnitude why they will add these two currents will be functions of something like this and something like this okay so I can have control on this I can have control on this and then I say okay I out I can get higher for given v in 1 minus v into or v into minus v in 1 such that I can have larger output current for same difference is that clear of input signal this is what we essentially do is that figure drawn is the issue clear positive negative signal will push the up and opposite signs m4 m5 stage of this where the capacity load has been kept this is my output stage is that clear this is my output otherwise from where the currents will be picked up to drive the capacitance the way I have done it that this current will come through m4 and since larger size I will boost this current since this is k times this is going opposite side boost this current also and this minus this will be more current at the output so that I can charge the capacitor faster is that clear okay having functions all this there is some okay you keep that figure in front of you I will keep in here I am first time to calculate the current in this P channel device so IDS 3 is nothing but minus g1 by 2 v into minus v in 1 but if you see IDS 3 3 1 and IDS 4 1 they are in opposite because one will increase the other will correspondingly decrease so IDS 3 1 is minus IDS 4 1 is equal to minus gm 1 by 2 v into minus v in 1 now the way we did it please remember this is something trick we are playing beta 4 this should not be 4 here beta 4 which is this beta 4 for this is beta dash P into W by 4 but we also know this W by 4 to 4 1 the sizes k times so k times beta P dash W by L by into 4 1 is beta 4 is that correct beta 4 1 is k times that of beta 4 is that okay or beta 4 is k times beta 4 1 okay but you can also see beta 3 1 and beta 3 is same these are not case they are same since they are same and we also see same currents are flowing here and here for the bias beta is here actually same as both sides so essentially say beta 3 1 is same as beta 4 1 please take it size of this is same so beta 4 1 is replaced by beta 3 1 so k into beta 3 1 is same as k into beta 4 1 when we know beta 3 1 is same as beta 3 so k times beta 3 size I am just using my sizes and finally before we come last this size is also k times so beta 5 is k time beta 5 1 okay so we already said since the two currents are in out of phase ideas 4 is ideas 4 is out of phase of ideas 5 and then I can write ideas 4 is nothing but I k times ideas 4 1 only W by L has changed from this and minus since this is minus of this so k times minus ideas 3 1 opposite okay then what I say once I declare this is that expression you wrote down I know ideas 4 which is related to ideas 5 by opposite phases and each is related to why 4 1 3 1 I use because these are the currents from the different stage okay so I am trying to equate this currents with that why I am interested in these currents because G n should come from different stage G n is coming from different stage so I must know what is ideas 1 and ideas 3 1 and 4 1 what is the output impedance of this has everyone noted down okay what is the output impedance here parallel C okay that is the fun so if you look at the output impedance at the out is R04 parallel R05 parallel 1 upon j omega cl impedance of that is that correct now generally I mean I am not saying every time you may have to figure it out at a given frequency range you may find these values this is much higher than these values because normally the OTS have lower bandwidth so generally this may be true but in real life figure it out and then use my statement okay but as I say if you normally unless if I do intentionally machine things will be correct on this so all out is normally equal to R04 parallel R05 now we define the current common current ideas which is equal to ideas 4 1 equal to minus ideas 3 1 just same these are same no so I put ideas which is nothing but equal to GM 1 by 2 V into minus that is what I derived earlier so what is I out current please look at it what is I out current this current minus this current so ideas 4 minus ideas 5 which is k times ideas 4 minus k times ideas 3 1 and since these are opposite signs they will add so I get 2k times ideas is that correct but what is ideas GM 1 by 2 V into minus V1 so I get 2k GM 1 by 2 V into minus V1 so now I get a ratio of alive by difference voltage which I call it trans conductance of the amplifier which is k times GM 1 is that clear k times GM 1 so case in my hand how much size I put ratio wise GM I can decide where from where the size of M1 into or the M5 current I push in is that correct bias current I push inside is that correct I can decide my GM now here is the interesting part please everyone has seen I out by V into minus V in 1 is trans conductance which is nothing but k times GM 1 or GM 2 because they are same for the sake of brevity I will even calculate the voltage gain we are done current this trans conductance so V out upon V into minus is output voltage by this output voltage can be written as ideas into this this which is equal to then substitute correctly all these values so I get k times GM 1 into RO 4 parallel RO 5 what is K GM what is K GM 1 capital GM so every zero is capital GM multiplied by the output resistance I can have voltage amplifier in Milan so it is not that it is not doing voltage amplification so the two-stage open is also doing this job the first part there is essentially OTA based now for the sake of brevity I choose case 1 which is like an open there is no increase so we say okay bomb so GM is GM 1 AB 0 is this which is what you would have got in a defense stage anyway since GM 1 now look at the way I did GM 1 is 2 beta 1 into ISS which is in this case ideas 5 by 2 okay now I choose my ideas 5 such that it is twice the bias current I create that is double the size I keep I bias twice of that I pass through my 5 M5 transistor so that you know this half there is nothing if I substitute this here 2 I bias have you please note down and then I will put the last few slides for that trans conductor and some man why it is OTA so please remember OTAs are why they are so important is this now this fact which which I am showing you is important and noted down everyone now you can look at it if I put that I ID 5 is 2 I bias this become 2 beta 1 W by I bias so GM is proportional to root of I bias and capital GM K times GM is also proportional to root of I bias what is the advantage of this if I change the bias current I will change the trans conductance is that directly as proportion root of course but is that clear so now I must figure it out if I want a particular GM and GM 1 upon GM is hard resistor so if I want to create a 1 upon GM as large or smaller I should boost larger GM why should I need smaller what is the time constant associated with the output 1 upon RC is that correct at frequency if R is smaller the frequency is larger filter I think cut off point you know so GM decides the cut off for the filter but GM is decided by bias current I choose okay so I have a OTA which I can nicely configure to create a low pass filter high pass filter band pass filter and it is active device why because GM is active element is that correct it is not a passive filter it is a active filter which is connected from the DC bias current now the question is DC bias current externally how you like a voltage so something I must create a voltage control pair the pin should have variable voltage control if I do that and if I change I bias for that control voltage then I will be able to confirm that we control I will change the GM value is that correct so here is a circuit which is very simple this is what we had I added this additional mirror side from this side P channel you are looking for the real resistor here is not it instead of that I have mirrored through another P channel and put a series transistor M 10 whose input is variable control as we call and the resistor R now you can see from here if you have drawn the figure they are same size M 9 and M 8 are same size so the current here is same as this mirror okay so this is my I bias current and for the different I made double size so it is too I bias current so that the earlier expression is valid and if I bias is to be created from this the current across this must change is that correct so that the voltage here should be such that it create this I bias current what current R can receive what M 10 can provide okay now I bias you can see from here this voltage minus this voltage divided by R what is this voltage Vgs of this is that correct so V control minus Vgs 10 is this voltage minus 0 of course if you wish divided by R is the bias current now here is a catch the normally for if I keep this W by 10 very very large so Vgs will be very close to BT for the sake of those who do not agree I will just solve for them if the size of this is 100 200 or 500 then the view will be less than 10 millivolt or 20 millivolt so Vgs will be almost close to VT so I now know this VT I know my control voltage which I am varying if I fix R then I know my bias current once I know bias current I know my 2 by I bias current which I bias each can give my GMS and if I K factor known to me I have my transconductance K times GM 1 and I also know my I out so I know what is the transconductance essentially at the gain both transconducting gain as well as the voltage gains are possible is that we should clear to you yes IDS is beta dash by 2 W by L into Vgs minus VT let us say I want a 10 micron current for the sake of it this is 110 into 10 to power minus 6 per inch channel device by 2 let us say I make it 200 last size Vgs minus VT if I do it 20 into 10 to power minus 6 upon 110 into 200 into 10 to power minus 6 is Vgs minus VT minus 6 plus 1 is okay fine that is not very issue important okay so 20 this is 10 so it is 1100 under root is Vgs minus VT this will be roughly 0.02 or 0.05 less than 0.02 10 millivolts or lower so one can say Vgs is close to VT is that clear so one of the techniques of forcing a transistor to remain in saturation is increase the W by else okay it will force itself to reach to saturation is that clear this is a trick which we follow often wherever we push for similarly okay increase is that should be clear this things sometimes I said it is equal to VT only this VT comes from because of large W by L if W by is smaller this is not valid okay but if W by L is large enough so this M 10 which I was showing you here must be of the order of 100 or 200 or more so that it guarantees this voltage as Vgs between minus VT and that VT is known to me so roughly I can control my current here and then I can control current here so GM's are controlled K times GM is my so bias current instead of bias current what is then the output will be GM proportional to V control so I that thing I change the voltage and I actually get different output currents is that correct the external pin has only V out V controls pin it does not because I is very difficult to push you will have to create source of yours bias is always available so pin has control voltage pin which changes the GM of the OTA is that clear that is how next time we will do quickly some filters okay out of this and then start on a new area which is not connected to open NL out per se which is noise let us see how much noise you can make