 Hello, and welcome to this presentation of the STM32MP1 Arm MPU Core. The STM32MP1 series integrates a Cortex-A7 Core from ARM in order to support a range of full operating systems including Linux and Android with a high level of performance and a low power consumption. The Cortex-A7 Core includes 1 or 2 32-bit cores with complete SMP support with full HW coherence. The Cortex-A7 Core also supports trust zone security with separated secure and non-secure execution modes. Each core includes a 32 kilobyte data and 32 kilobyte instruction cache and a common unified level 2 cache of 256 kilobytes, all having 0 weight states and running at processor speed. NEON is an advanced simple instruction multiple data or SIMD instruction set for further acceleration of media and signal processing functions. A single and double precision FPU is also present. A generic interrupt controller supports up to 224 interrupt lines with security and multi-core routing. For more details please refer to the ARM website on which you will find all information about the Cortex-A7 Core.