 you can follow along with this presentation using printed slides from the nano hub visit www.nanohub.org and download the PDF file containing the slides for this presentation print them out and turn each page when you hear the following sound enjoy the show some insider information from an experimentalist I thought I was advertised like that so I tried to do my very best to to point out what an experimentalist can potentially do in order to shine some light on interesting questions regarding graphene and my talk will actually be then I can't use the okay thank you thank you very much Mark so so let's focus on this side okay because maybe from time to time I have to use the blackboard and then I don't have to go up and down all the time so what I'm trying to do is from the very beginning tell you if I am asked as an experimentalist should I jump into a new field of working with graphene and then I respond with a question back I'm saying maybe not a question to the person who asked me in the first place but the question to myself is it worth while doing so is there something unique and different that I can expect in principle are there opportunities that I don't have with another type of materials because I'm not a materials person per se I'm a device person I'm interested in the type of device application and so naturally the kind of question I'm asking will be related to can I make a device can I fabricate characterize a device that will be different and hopefully not only different but also better in one or the other aspect than what I could be doing with a different type of mature and so this is the kind of mindset I want you to be in okay and I'm trying to sell you a couple of arguments why indeed graphene might offer this type of unique opportunities for certain types of application the application that I want to discuss with you are all falling into this category of graphene field effect transistor device so the simple structure you should have in mind from the very beginning is a source contact a drain contact both metal attached to my graphene structure of whatever shape and there is a gate it could be a gate from the bottom that would be the substrate itself separated from the graphene structure by an insulator or could also be a gate from the top and we will look at those as well again separated from the graphene structure by an insulator that is deposited on top of the graphene okay these will be the types of structures that we're considering and I want to point out that indeed in my mind graphene has to offer things that are different and unique and promising so let's get started the first interesting news I believe for a lot of you are being students is that there has been a change in the mindset of the industry I have worked for IBM for more than seven years so I know a little bit what I'm talking about that in the past the industry semiconductor industry that is has focused a lot on silicon and everything had to be CMOS compatible in a very narrow window this idea has changed nowadays the industry is much more open-minded well some pessimists say yeah that's obvious because they are challenging so big problems right that they have to be more open-minded I think it's a great opportunity for a lot of us working in the nano-electronic fields and and exploring new types of research devices and materials in the context of maybe post CMOS applications okay in 2004 maybe 2003 this mindset has changed and it gives us the opportunity to look into materials that have would have been discarded years ago among them certainly graphene one of those very very interesting ones so what is the interesting thing about graphene we heard that graphene has a different type of band structure so if we look into the materials properties and ask what do we have intrinsically to be expected from graphene then looking at the energy dispersion is certainly a good idea and we have seen that now often again and again something seemed to be special about this band structure this cone type structure the question is what is unique and my colleagues have pointed out a lot of fundamental differences between this material when it comes to transport and let's say two-dimensional electron gas system like you can find it in the version they are of silicon or also three five materials again related to this type of band structure and one of the most important points I believe related to the energy dispersion was the density of states so let's focus on this density of state aspect how would the density of state normally look like for two-dimensional system that is associated with a parabolic type of band structure well I hope we all know that it's going to be just showing a constant density of state as a function of energy until the point where we hit the next sub-band so one of those things that is clearly different here for graphene is that the density of state can be very very small around the direct point and that's certainly not the point that carries most of the current and maybe also not the most obvious point to focus on but I want to draw your attention to this point and ask what can we do with this type of material different when it comes to device application so this is the first thing I want you to keep in mind now I diverge for a second and I'm saying okay what on the other hand side is that most scientists sell this material for mobility and we have heard presentations that clearly stated well let's be careful when it comes to mobility and I think people are getting a little bit more careful evaluating mobility but still a lot of motivation comes from high mobility arguments it is to a large extent the reason that people are looking into three five materials let's say like indium arsenide indium gallium arsenide because those materials have proven to have extremely high bike mobility and you can fight with me about these numbers it's just going to give you a rough idea ballpark numbers what I'm trying to do here is saying well first of all yes indeed different materials have very different mobilities if you look at the trend of mobility you find something that hopefully doesn't surprise you too much namely that there is a price to pay for high mobility the price to pay is going from large bandgap materials to small bandgap materials normally gives you the high mobility and us being in and that also goes along with the decrease in the effective mass and us as people being interested in devices application we immediately say haha I can see high mobility is being good for the on state of my transistor but if I'm giving up on my bandgap right that's going to ultimately harm the off state of my transistor because the off state of my transistor has something to do with making use of this bandgap in order to turn the car really off quite a bit what is graphene graphene in some sense is just an extension of this table it just gives you an even higher mobility yet we immediately see we have no bandgap at all and so it's a very extreme case to consider in this context and I do believe that most of you are not knowing about graphene being interesting material would have said well without a bandgap I should really not touch this material for devices application yet we are discussing field effect transistors based on graphene and the question is why is that the case and again the mobility itself cannot be the reason so I want to propose that we kind of combine these two pieces of information the on state that would be the mobility and the off state the gap in some meaningful sense to get an idea of what material choice should we make if we are interested in high performance transistor devices in general well a way to do that that may be useful is to say the on current has something to do with my mobility not surprisingly it has also some length dependence and there's a capacitance associated with that and if I'm expressing my mobility as e tau over m and tau being the scattering time tau then I can oops this is not working well the scattering time tau scattering over there then I can try to capture what's going on in the on state by asking how fast can I switch my transistor device on and off and I can ask the question how good can I be in terms of my tau delay my gate delay how fast can I make my gate my transistor structure and since tau delay is also proportional to the capacitance ultimately what turns out to be I think capturing most of what's going on for the delay time is that we have a proportionality to the length the effective mass and the scattering time so this somehow takes care of the high mobility because the high mobility helps to make this number here small that's good now let's try to include the off-state performance of our devices let's argue that if I'm scaling the device making the channeling shorter and shorter and shorter that's a good thing right because if I make it shorter I make my device faster so if I make it shorter and shorter and shorter ultimately the minimum current that I'm going to get from source to the drain will be the current that tunnels through my bandgap that's the kind of limitation and if I am saying okay this direct tunneling current I'm capturing with a WKB approach and I'm just claiming I want this current to be x for every type of material that I'm picking whatever this number x it doesn't matter but I want this number to be the same whatever you as a circuit person tell me this is the minimum current I will accept but it has to be the same no matter what material I choose then that's going to limit my capability to scale the channel length of my device namely in the sense that a small bandgap material cannot be made as short in terms of gate lengths if I want to have the same off-current and so we can capture this by saying in WKB approximation this expression L times squared of M times squared of energy gap that takes care of the energy gap in the off-state has to be constant that would give me the same off-current and now I can replace the L in my on-state here in my tau delay with this constant divided by this expression and what we end up is a very simple way of capturing to some extent what's going on in the on-state and the off-state of my transistor structure and what it tells you is I can make my device very fast I can make tau delay very small if I'm making my bandgap very large or I'm making the scattering rate very small so I want very little scattering but I want a large bandgap not surprisingly but this is actually an analytical form that we can plot we can look at different materials now and compare how they look like so let's do that well I think it's rather interesting that you find after cleaning out from the mobility being a factor of 35 or even more different between different semiconductor materials in terms of scattering times different materials don't differ that much and again you have to forgive me there are a lot of details that are kind of washing over right I'm not telling you what carrier concentration I'm dealing with what high or small biases I'm dealing with I'm taking bulk mobilities etc etc etc all I'm trying to give you as a trend and we can certainly debate about every number being slightly different from what you see here but I think the trend holds true namely that the bandgap dependence always wins in all these instances so this is a plot that my friends dealing with small bandgap materials I don't like to see because it says to some extent that dealing with these small bandcaps is going to be a problem if I'm using conventional scaling schemes I cannot make my channel lengths as small as I could with a large bandgap material if I'm claiming the off current has to be the same now there are ways around it and there are solutions for that and this is not the end of the game but I think it's rather interesting now what about graphene in this context well again not surprisingly from this simple argument here right it's down here not good for anything at that stage if I want to have a good on and off state right but this is where people hope graphene can outperform all these other types of materials because they have seen that there is something out there that can do much better than all these materials and that is a carbon nanotube so a carbon nanotube has the capability of offering nice large bandcaps of electron volts and at the same time experimentally these experimental data can have very very large scattering times so the hope now is dealing with graphene for the purpose of logic types of device application to create a bandgap in graphene like we have successfully done with carbon nanotubes in carbon nanotubes it was the wrapping up the periodic boundary condition that gave rise to the band gap formation for graphene it would be potentially the patterning that creates little ribbons of graphene creating a bandgap in this way through the introduction of fixed boundary condition and then hopefully ending up with something like in carbon nanotubes but with a big plus that I define where my graphene nanorubin is going to sit I define the size I can ultimately even define the bandgap that's the hope and so from a materials perspective this is why people in my mind dealing with graphene are excited about the potential materials let's move on and go back to the density of state argument and look at the electronic properties of graphene and that brings me to the quantum capacitance argument that I think is a very important argument to make we heard professor lunch from talking about for thick oxides that most of graphene transistors are made out of 300 nanometer 90 nanometer it's fair to say the carrier concentration is kind of proportion to the oxide capacitance times the gate voltage minus pressure voltage and in that way I'm using the classical equation to determine what is my carrier concentration well we know that the truth of the matter is the only reason in normal MOSFETs that we can apply this approach is that we have an infinite bazaar of states available that we can fill fill fill we never ask ourselves the question is this bathtub that holds all my electrons in my MOSFET channel already full we never ask this question right why don't we ask this question because we are assuming we have a very very large density of states available so what you really do is although you know in a normal MOSFET model that there is actually a capacitance associated with the material with the density of state in the material although we know this is the case and although we know that this capacitance is in serious with the oxide capacitance we ignore that capacitance happily because we know that two capacitors in series with one being very very large it takes over here in the denominator then cancels out actual results in the total capacitance still just being the oxide capacitance that's a normal case but it's by no means the only case that we can consider it's in reality the case for most MOSFET structures but keep in mind the density of states for the graphene looked very different actually around the DER point it allows me to create the situation where this quantum capacitance becomes extremely small even zero so without too much effort I can end up with a situation that is the opposite of what I have in a normal MOSFET namely the situation where this quantum capacitance close to the DER point is much smaller than the oxide capacitance if it's much smaller the opposite holds true namely that the total capacitance now becomes dominated by this quantum capacitance the oxide capacitance doesn't matter anymore this is normally a situation that my colleagues at IBM wouldn't like a whole lot when I talk to them about this they immediately said okay this is a knockout criteria I should stop working with this material because what it means is I cannot pump more carriers in my material by reducing the oxide thickness done I don't like that I don't want to see that happen what I'm saying is in a material like graphene and also for one-dimensional conductors in general working in the ballistic regime and then operating in what I'm calling here the quantum capacitance limit can actually be beneficial because once I'm ballistic I will never get more current per 1D mode in one material than in the other material if you say that again if I'm giving you material A and B and I'm telling you both materials have one one-dimensional mode contributing to the current it will not matter anymore what this material is now again I'm kind of skipping an important piece of information namely one material might be very large the other one may be very small in order to accommodate one mode but let's forget about this point for a moment what I'm trying to tell you is if I'm operating in the quantum capacitance limit and I have a ballistic device let's look into what this device can do for us when it comes to transistor performance and so I just pointed out to you that the total capacitance now in one case was the oxide capacitance in the other cases the quantum capacitance but it also means that the way we think about the device operation is different in a normal device when you're saying my charge is controlled and it's the capacitors capacitance times gate voltage you're assuming that the entire voltage drop in the on-state of the transistor occurs across the oxide what it really means is that you're assuming that the band movement let's assume this is the conduction band of our MOSFET that's a source in the drain region that's a gated region that this surface potential here this band stops moving once I'm in the on-state that's our normal MOSFET picture and how can I see that in this little capacitor argument this the change of the surface potential as a change as a function of the change of the gate voltage goes like C ox over C ox time plus Cq if Cq is very large like in a normal MOSFET this is a very small number and that means in the on-state the bands move very little now look at the same equation and ask yourself the question what happens in the quantum capacitance limit in the quantum capacitance limit Cq is extremely small compared to C ox and this expression is close to one so now we have a transistor that because of the density of state operates very different it's not the charge that I'm controlling with the gate voltage I'm controlling the band movement well if that doesn't matter for the device operation I don't know what does so I will not go in this direction but there is some work being done on tunneling devices for example that make use of band-to-band tunneling from the conduction to the valence band and those devices can be benefiting quite a bit from the fact that I have this rigid gate control that moves by bands up and down as a function of gate voltage for those tunneling device exactly this operation in the quantum capacitance limit and the possibility to make use of the small density of states is extremely important so I want to carry this argument further what does it imply for the scalability of my devices well if I look at Cv over I again I notice that since the total capacitance shows up in the current that is here in the denominator as well as up here it cancels out I have the same L square scaling or in other words it doesn't matter whether I'm in the quantum capacitance limit or in the classical limit when it comes to scaling in terms of switching speed no disadvantage no advantage but also no disadvantage but if I'm moving on and look at the power delay product Cv squared it does make a difference whether I'm having the capacitance being dominated by the oxide capacitance or the quantum capacitance because the oxide capacitance is proportion to L over oxide thickness normally both of these values are scaled simultaneously that means this value stays pretty much constant meaning that p times tau is pretty constant while in the case that the quantum capacitance is a dominating one we are proportion to L and correspondingly we can improve on the power delay product according to this argument in the quantum capacitance limit when we are reducing the channel length this is something that we worked out here again we are showing that the classical p times tau would give rise to constant dependence then the linear dependence here for small and smaller channel lengths this is the kind of predictive trend and if you're doing a more thorough calculation there are no experiment data to the best of my knowledge yet available on this topic then you can show that p times tau independent of whether you have scaling scattering present or not so ballistic regime and scattering limited regime both show indeed in this simulation on equivalent screens function simulation the trend that is predicted here from this hand-waving argument and we have also verified that the scattering tau scattering time tau decreases as predicted so the point here was that operation in the quantum capacitance limit that is enabled in materials like graphene because of the small density of state would not only change the ballgame in terms of you controlling the band movement rather than the charge but might also give you an edge when it comes to the power delay product what else is there well one thing that I could have put first because it's more simple than the argument about the quantum capacitance is that nowadays people have noticed that scaling channel length scaling that is again depends very much on the characteristic screening lengths within this material on other words normally I have to introduce a certain doping profile in my MOSFET in order to preserve long channel type of behavior in nanostructures this is not necessary because in addition to my capability of making this characteristic length scale lambda here small by reducing the oxide thickness I can also make this number small by reducing the body thickness and reducing the body thickness makes this lambda small this lambda will be compared with the channel length and that defines how short I can make my device and ultimately making it short is as we saw the key enabler of low power consumption and fast switching okay so in case of graphene obviously we have a very thin body just one layer of graphene that allows me to get very tight electrostatic control big plus of this material same argument for nanostructures in principle scalability and so I hope that in general in this first part what I've shown is that there are some promises from the materials and from the electronic structure that graphene holds and that makes it interesting for me to work with graphene for field effect transistor application okay second part I want to talk about experimental findings that I thought are very curious and maybe it's useful for you to understand better why device characteristics in graphene look as they do interesting enough despite the fact that there's no band gap in place right we know there is some gate modulation so the first question is why is that the case why do we still see despite the absence of a band gap that there's some current modulation and second why do we see device characteristics output characteristics that have this kind of awkward shape namely output characteristics should increase in current as a function of terrain bulge and then saturate if I build a nice MOSFET type of transistor they don't do that for graphene devices and I want to explain in a very simple way why that is the case and I want to give you some tools namely simple analytical expressions that you can employ to confirm that this is the case and also maybe useful for you for other wonder message structures with arbitrary band gaps to calculate what the respective transistor characteristics would look like so here are experimental findings that I put together for you namely that upper left corner here experimental data of output characteristics that look very similar to what I just described I want you to know the current increases levels of and then bands upward again and then these curves cross each other the more I try to turn the device off the more of this crossing I have graphene these are data from columbia philip kim's group there's some leveling off here but then see this bending up this s-shaped curve and then the red curve this is very important crosses over so this is what we observe and it's interesting enough something that we observe for both carbon nanotubes as well as graphene and I want to explain why this is a case yes these are room temperature data yes so the way I want to explain it and the tools I want to give you is there is a the nice thing about 1d transport and we will combine all these 1d transport to 2d transport of graphene in in a second in the next stage the nice thing about 1d transport was one mode in the ballistic limit quantum capacitance limit meaning one to one band control is that I can evaluate this current through my device immediately I can write down an analytical expression that tells me what the current through my transistor is under these three assumptions okay and of course I'm using the normal kind of expression that relates the current to the density of state and velocity and and Fermi distribution if you plug in for 1d conductor the velocity and density of state then you notice these expression in terms of energy cancel out we're ending up in the product density of state and velocity with a constant that you can pull out of this equation and professor that lansstrom I think mentioned that yesterday already that in that case the current can be just evaluated by looking at the integral of the Fermi distribution in order to understand current flow in this simple picture for my 1d channels I want to break down the problem into the following parts I want to argue if this is the source Fermi level and this is the drain Fermi level and this is the conduction band edge then there is a current component one that has to make it over this barrier in order to contribute to my current flow and if I'm using this expression and do my integration right considering that this band can be moved up and down one to one quantum capacitance limit with a gate voltage I can immediately write down the current as a function of this gate voltage and there are really no material specific parameters as I just promised you for 1d conductors it has to be the case like that the only thing that there is is the gate voltage dependence here vgs and vgs and some temperature because the Fermi distribution obviously has some temperature dependence okay but that doesn't capture everything there is also a current component back from the drain that we have to take into account this is not a new concept but under these assumption quantum capacitance limit blah blah blah all my work with the non-equilibrium screens function becomes very simple because I can really evaluate these equations these these integrals by hand immediately myself and that's true for finite temperatures not only for zero temperatures so if I'm doing that I can also calculate now I have the Fermi distribution from the source and the drain the current flowing from the drain backwards and obviously I need to have those two currents added or subtracted depending on what you're doing in order to have the total currents through my device and what you see is now i2 is obviously drain voltage dependent as well as gate voltage dependent as you would expect because the Fermi level in the drain is modified by my drain voltage these two simple equations now allow me to already obtain regular output characteristics this is what a ballistic transistor looks like I can add these two components I can see that I have a current increase here and then a leveling off this leveling off is a result of the fact that I'm moving the Fermi distribution in the drain far far away that there's almost no spill back current number two becomes very small that's responsible for that so I can obtain all the normal kind of device characteristics transfer characteristics subthreshold characteristics subthreshold swing the way I would expect it to be what you notice here i1 and i2 breaking off right the transfer characteristic depends on i1 as you would expect for a long channel device this is what ultimately gives me the kind of response but as I said for the saturation here I need also to include my current i2 nothing special the reason I introduced you to that is because now I can easily add two more current components I can say if there is no a valence band in place down here then there's also a chance for a current three or four to contribute to the total current you can see where I'm going because in particular if my band gap is very small you can certainly not ignore these current contributions so let's see how those two currents look like and what a surprise for the first time there's a material specific parameter showing up namely the band gap because now I'm defining relative everything relative to the conduction band so that introduces this eg the band gap still nothing else right vds vgs eg nothing else I can do the same for the fourth current component and now I'm ready to look at nanotube devices in the first place with different band gaps so let's do that and this is what we get output characteristics on the right hand side the left one is only for comparison you can say this is the result of a very large band gap if you want that include all the four components the gray one is the result looks already very s-shaped right it has the component constant current contribution as a function of drain voltage from i1 a very small one here from i4 because I'm considering band gap of 0.1 here i2 is responsible for the current saturation because i1 and i2 together would give me exactly this type of device characteristic and what is responsible for the s-shape well it is this green one here i3 let me remind you what i3 was that is the current component from holes from the drain to the source electrons current one from the source to the drain are those that would like to give me the current saturation those flowing backwards the holes flowing backwards current three those give rise to the increase in current so this gives me the kind of s-shaped curve that we saw here okay and now I can put these things together and can ask the question how do things look like for different band gaps using these different currents and you're probably not surprised to see that if I have a large band gap I get a nice saturation I get more s-shaped up to the point that for a metallic nanotube without a band gap there is no such modulation left anymore and I think it's interesting to look at this because some people say well why is this metallic nanotube different from graphene right we are talking about graphene keep in mind that for the metallic tube where I have just one 1d band available I have a constant density of state while in graphene as we noted before we have this linear increase okay and that is really the key to distinguish despite the fact that in the metallic case we have no apparent band gap we get a very different drain and gate voltage response so here we have the trend and we can now see that for small enough band gaps we get this s-shaped kind of curves here's the full set of curves for different gate voltage looks exactly the same way now we understand it's the m-bipolar character that is responsible for the electron part whole part electron part whole part electron part whole part that gives rise to this behavior and it would vanish if there is no band gap in place at all these are the experimental results and qualitatively there are nice agreement people believe this is what is really behind this is the first publication on this topic and for graphene well for graphene despite the fact that we are not having a 1d conductor despite the fact that we have no band gap we see exactly the same type of behavior and that is something that we can understand now by adding up the 1d modes that we have in place namely for my graphene structure I want to suggest that we are cutting this cone in a lot of 1d modes and we are adding all these 1d modes up the energy spacing may be very small namely for a wide graphene structure the boundary condition that I introduce may only give rise to a very small energetic spacing but I can still kind of add these up and pretend for a moment they all contribute individually now if I'm doing that then I'm really asking the question what happens if I have a certain gate voltage let's take the purple case steep in the on state and I call it electron like so I have my gate voltage now such that I'm looking at states here my source thermal level is here and let's say my drain thermal level is very small I mean I'm talking about the small drain voltage right now somewhere here at a high positive gate voltage so I have a lot of these states contributing right and now if I'm moving with my drain voltage down down down what I'm doing is I'm adding more current because I'm increasing this vds interval that's why the current increases but it levels over because the contributions if I'm becoming larger and larger in my drain voltage of these different modes are becoming smaller and smaller in particular this mode here right at this drain voltage contributes very little to the extra current and so now it is really the density of states or the summation of my 1d modes that is responsible for this bending over up to this point where I'm kind of flat namely here when I'm starting to see my m bipolar device characteristics kicking in so while the turning is exactly the same like in the carbon n tubes going from the electron type character to the whole type character the smooth s shape that in the carbon n tube case is only a result of the band gap existence that would vanish without a band gap here is a result of the density of states and if we look at the transfer characteristics for the carbon n tube case we can see again and I only show that for completeness here that decreasing the band gap not only gives rise to a linear depends id vds but would also remove the gate voltage dependence entirely okay so I want to summarize this part in the following way I want to say device characteristics id vgs that is for MOSFETs show gate voltage dependence for carbon n tubes show gate voltage dependence for graphene shows gate voltage dependence in a second we will see those characteristics look very similar but the underlying physics responsible for these device characteristics are very different namely while in a normal MOSFET with a band gap it is really the modulation of the charge as a function of gate voltage that gives rise to different current for carbon nanotube ballistic conductor with a band gap it is really what we just did the Fermi distributions that matter ultimately for the device characteristics that we obtain and in the case of graphene without a band gap again ballistic it is ultimately the modulation of the density of state down there on the right-hand side that matters because the density of state product with the velocity is not constant that is why this term here is the most critical one to consider and I think it's just interesting to look at it this way that although all these device characteristics id vgs would not reveal this from the very beginning please be aware of that modulation as a function of gate voltage can actually come from a number of different reasons and it's very important for device optimization and device design to consider these aspects okay the last part of my presentation i want to go through two experimental modules things that we have done that hopefully tie together one talking about quantum capacitance again what do we know experimentally about the quantum capacitance is it all just academic that we hope to operate in the quantum capacitance limit but actually there's no experimental evidence i will show you that we do have experimental data that show how the quantum capacitance looks like in graphene and the second small module that i want to discuss actually deals with the contact resistance in graphene structures and the comment there that i want to make and hopefully experimentally substantiate is the better my channel material the better the context have to be in order to exploit this channel material if i have a very resistive channel i can afford not having two good contacts if i have a very conducting channel i have to make an even bigger effort to make good context i think that's a pretty straightforward statement now if we believe that graphene is a very good conductor and we want to make use of that we need to ask the question how is it what kind of quality of context can we form and and the first response always in this context is well there's no band cap i don't have to deal with Schottke barriers should be pretty straightforward to get good ohmic context everybody loves to just throw ohmic context out there right but please let's see what the reality is when it comes to the contact formation because even good contacts may not be good enough for graphene transistors so these are the two modules quantum capacitance is the first one i want to discuss what kind of device structures are we exploring often we use as professor lancström pointed out silicon substrates and we deposit graphene on top before we can do that we grow our deposit in oxide that has typically a thickness of 300 nanometer more recently we have also worked with 90 nanometer oxides as has been pointed out before this enables us experimentally to see molar layers of graphene deposited on top of this oxide this is an interference effect that we are using under the optical microscope to see these then we deposit by peeling off with scotch tapes or other means layers of graphene now let me put this in the context do we believe that this is going to be a manufacturing manufacturable approach certainly not is it a useful approach to learn something about prototype device i i think it is um should we explore at the same time uh what can be done in order to scale things up and maybe create a potentially grown large-scale graphene structures oh of course we should and and there is work going on in all of these fields and hopefully we can merge the insights gained on the individual transistor devices together with the improved material on a larger scale all of this is under investigation here at Purdue and other places as well so in this case we have the graphene peeled and deposited we make metal contacts okay these are the areas that i'm particularly interested in later on when it comes to the contact formation so these are metal that we put on down titanium is normally the contact metal we have stacks of titanium palladium gold other groups are using chromium gold as contipatials there's a debate about which one is better and so on we can we can talk about that later if you want we deposited another dielectric layer because as uh professor Lanzmann pointed out correctly a 19 nanometer oxide is far from what you want to have in order to have the tight gate control so we would like to see a much much thinner dielectric on top a very convenient way of creating this top dielectric is by means of a ad atomic layer deposition atomic layer deposition of aluminum oxide doesn't give you the type of dielectric constant that you might expect it's not 10 it's more in the range of six seven maybe maybe eight epsilon that is we are depositing around 10 nanometer because of the adhesion problems with graphene i think i'm not talking about something that you are unfamiliar with it's very very hard because of the non-existing non-existence of dangling bonds to deposit anything onto graphene that sticks that includes dielectric films and i believe uh harvard university deserved credit for having um developed an approach where i think you're actually breaking some of the bonds but in particular creating a dipole layer NO2 that allows you to deposit a dielectric on top that's why this little graph says aluminum oxide slash NO2 so it's not straightforward to just deposit aluminum oxide and then the process is finished by putting a gate on top so let's look at these structures in order to verify that we are dealing only with single layers of graphene we are often using AFM Raman sometimes it's not something that we always explore actually in in my group here we have almost never explored it but in some of our collaboration teams we do so AFM is the the preferred means to see that we have single layers of graphene here are a number of devices stating exactly what professor lansstrom pointed out these are not perfectly shaped halberd geometries but frequently over the lengths that we are considering between the electrodes they are fairly uniform in terms of width so it's possible to do some normalization here let's look at the device characteristics um i just briefly showed the idvgs so let's let's see that we understand what's going on in these graphene devices why do we see this typical v-shaped curve well i gave the answer before density of states right it's a modulation of the density of state the gate voltage kind of probes the density of state in my cone-like structures which is increasing and ultimately shows the symmetric behavior of the electron and the hole branch the picture is that if the thermal level that the line up of the cone structure with the source thermal level given by the gate here in this region negative is in the lower part of this cone system if i'm changing my gate voltage i'm moving the cone structure relative to the thermal levels of my source and drain downward and if i'm going to even higher positive voltages i'm reaching this upper cone structure so i'm really going through the entire cone structure in this way modulating my current what am i plotting here left and right well we wanted to measure the capacitance of this structure it's a small capacitance but we said it should be measurable in principle we wanted to do that as a function of gate voltage and we wanted to have a reference also in how far does a single layer of graphene behave different for multi-layer of graphene when it comes to this capacitance measurement so the purpose of this curve is actually to tell you that multi-layer graphene on the right hand side and single-layer graphene when it comes to the id vgs doesn't look vastly different yes there are some details this is a more rounded curve the on-off ratio is different but you would agree i believe that this modulation here doesn't tell you immediately that you are dealing with a single layer or multiple layer of graphene however if you're doing the capacitance measurement we saw a drastic difference and that's not only true for one device we explored a handful of those and what you see is there is again a very strong gate voltage dependence for the single layer of graphene now when it comes to the total capacitance that we measure where the capacitance in the multi-layer structure is rather flat we believe that has something to do with the density of state that's what we were after right we wanted to explore the quantum capacitance if the density of state shows up then we should actually see a modulation of the total capacitance as a function of gate voltage for the two decays the picture is that the density of state at least in this gate voltage window is fairly constant and that's supposedly the reason why there is no modulation of the total capacitance so let's focus on this single layer of graphene and if we consider that in addition to the quantum capacitance that has a density of state's impact we have an oxide capacitance and also some trap contribution that give rise to the minimum capacitance that we measured we can actually extract the quantum capacitance that's what we did and presented at the idm 2008 and the interesting thing is that the quantum capacitance numbers that we found are a factor of two smaller than what you expect so this is still a mystery to me i'm not sure why this is a case i'm in the right ballpark but somehow the actual quantum capacitance numbers that we found do not add up yet i do believe this is a nice confirmation of the quantum capacitance the numbers uh the linear dependence in particular making sense in particular i'm going to show you now that operation in the quantum capacitance limit that was my credo at the beginning is possible because if we are using high k dielectric as aluminum oxide 2 nanometer then indeed you can show that this oxide capacitance would be larger than the measured quantum capacitance over a large gate voltage range here in that case it's actually translated into an energy scale 300 plus minus 300 mili electron volts we saw that yesterday already this is not unusual that we can modulate that far into the conduction valence band for you just as a reference for those of you that are familiar with MOSFET devices what is it that i can normally do in terms of degenerate doping for silicon well normally 100 milliolectron volts or something like that is the ballpark number for electrons for holes is 30 milliolectron volts roughly so 300 milliolectron volts here is a very very large number by any means and it is in obviously in to a large extent due to the fact that the density of state is so small that i can do this kind of movement that we were talking about before and so operation in the quantum capacitance limit from these experimental data clearly possible for the device application that i was discussing with you before very last part and i think i'm going to be perfect in time with this contacts so in another study we said let's look into what people like to do mobility extraction knowing that mobility may not be a good number for these graphene devices and let's do that study in particular looking at the length scaling because one thing is for sure right keep that in mind we want to improve device characteristics and switching speed by length scaling scalability scalability scalability that's all that matters and all the other things around it dielectrics and so on are just enablers of doing exactly that that's ultimately what everybody cares about in the industry for speed and hopefully also for power consumption so we did exactly do that we looked into devices graphene devices with different channel lengths and so here i'm plotting for you just to have an idea 0.5 micrometer channel lengths 1.3 2.8 4.5 micrometer and what you're supposed to see is a certain trend so the first thing i want you to notice is that there's a little bit of a difference here between 0.5 and 1.3 when you focus in particular on this steep slope region here the reason we are doing that is we said you can make a lot of mistakes in extracting mobility obviously right and and you find publication where it's very very hard to believe that that people actually use this approach to extract mobilities so what what i want you to notice is if you have an id vgs characteristics and you use your classical equation and say oh my id is proportional to my mobility and then also to my capacitance let's say oxide capacitance and there is a vgs minus vt here i can get an idea of what is going on let's say in my id vgs if it looks like this if i know my threshold voltage just happens to be here around zero it doesn't matter then i can use this current level here and i can divide the current by this vgs minus vth expression and i get some mobility information maybe that's a way you want to do it now in the case of graphene we have a current that is non-zero we have no band gap so we might have a characteristic that looks like this at the same time it's somehow tempting to take the Dirac point as a threshold voltage and then use this equation again and say oh oh my voltage range and i'm now evaluating the current here that i'm looking at is from here to here right not noticing the fact that obviously at that point the current is non-zero although maybe because of the density of state argument you expect that to be the case but it's not so the mistake you would be making here is the threshold voltage picking this as a pretend threshold voltage makes this voltage difference much smaller than it really is giving rise to a much higher mobility number than is fair by any means okay so in order to avoid things like that and and other possible mistakes we decided let's just look at the gm region and let's pretend for a moment that we can do the analysis entirely based on the diffusive regime okay what you're supposed to notice also is that if i'm going to larger channel length yes the current per width becomes smaller but in particular this curve becomes wider it opens up more so the gm is decreasing so this is to be expected because we want to get some information about the mobility so really this is what you would like to see so let's look at those mobility data then as a function of channel length the red data points is what we obtained let's ignore the black one for a moment this is what you would expect something like constant mobility here as a function of channel length then you could maybe write for the argue that we have a real mobility extracted in this case keep in mind this is on the substrate this is with an oxide underneath so there are a lot of reasons to expect the mobility not being as large as you can have it when you have a free-steaming system i should also point out that this mobility extraction doesn't make sense for the full range of carrier concentration we picked this gm region and in this gm region we have a carrier concentration in the high 10 to the 12th range so all these mobilities are extracted in this region that according to the discussion we heard yesterday would fall into this impurity region if we believe into impurity scattering being responsible for mobility being limited but what i want you to note is there's a very clear role of of the mobility if i'm going to smaller and smaller channel lengths and that is a result of the fact that indeed in our extraction that uses diffusive a diffusive model the transconducting gm pretty much remains constant once we create channel lengths that are smaller than 1.5 micrometers or so so what does it mean does it mean that the mobility degrades in case of graphene if i'm making my channel too short and indeed you will find that people like to publish data on very long channels exactly supposedly for this reason so we believe instead it is an indication of transitioning over into the ballistic transport regime that's at least what i thought in the very beginning when i saw these data so we said well let's go backwards and let's associate this diffusive calculation or extraction of mobility with what we would really do if we assume ballistic transport and we know we learned it yesterday that this transmission function here that has a contribution from the scattering length lambda and the geometry the separation between the source and the drain actually captures what's going on Professor Lanzmann pointed that out in both the ballistic regime and also the classical regime so let's use that in order to get some idea of what the scattering length is if you say these two expressions the diffusive one that we use to extract the mobility the wrong one if you want with the one that captures both regimes the ballistic one and the diffusive one i can extract lambda namely by saying i'm defining this effective mobility that has my minot that would be the constant mobility here up for very long channel lengths times l divided by lambda plus l this expression here becomes relevant in particular when i'm going to smaller and smaller length scales when l becomes comparable to lambda if i'm using this approach i can get a reasonable fit of my data here for a lambda value of around 600 nanometers now when i saw this i said well either our material is a little bit better for whatever reason than what others have published or something else is going on let's be careful let's not jump to some conclusion let's look instead into the current let's not do this analysis about the mobility let's ask the question like Professor Lanzmann pointed out yesterday current as a function of gate watch we know what we should be getting in the ballistic regime right we can plug in this lambda lambda number that we just got and see whether the current makes sense not even trying to do this mobility extraction these are the experimental data so this is one branch of my v-shaped idtgs right just the one branch the electron branch and for the same lambda the blue one would be the calculation so while it looks okay to use a 600 nanometer lambda value for the mobility extraction it clearly doesn't fit very well when it comes to the actual current numbers okay then let's do the other way around let's extract the current let's extract the lambda value the scattering mean free path from the current this is what we heard yesterday i get a current and that defines my lambda and i end up with a lambda value of around 150 nanometers okay so how does that 150 nanometer look like now in my mobility extraction well i would say it's not a very good fit in particular here for these data all of them are well below the green curve so i can either get this one right or this one right depending on what lambda i picked but not both of them and so that makes i believe that a possible explanation for this dependence and keep in mind that it's only a length dependence we are not switching temperatures we're not changing carrier concentration blah blah blah we are sticking with the same conditions right just changing the channel length we believe the explanation maybe contact resistance because now if i introduce the contact resistance as well as a medium not 150 not 600 nanometer mean free path i'm able to capture both the current and the mobility in this expression and i have heard recently that some of my colleagues doing completely different experiments feel very comfortable with this resistant number and i think it is extremely important for us to focus on this contact resistance effect because you see already now without really optimizing without really going to 20 30 40 nanometer channel length it plays an important role this is a substantial number we need to focus on this aspect in order to make best use of our graphene structures and so with this i want to summarize i hope i gave you some insights into intrinsic opportunities materials device wise for graphene structures i've discussed two experiments one on the quantum capacitance regime and the other one on the contact resistance thank you very much for your attention so even though our graphene structure maybe somewhere oddly shaped the context that we create right always overlap the entire graphene structure and the difference between those two w1 and w2 i think is the only variation that i could take into account and that doesn't help me to explain what i'm observing here because that variation is small compared to the humongous current difference or whatever i have to explain here in my data so i don't think that that helps me so i think that's a very valid point because as i said this here is at a fixed gate voltage and you could rightfully so argue well this is going to look different for different gate voltage however here what i'm trying to do is choose just one lambda value to get things right so i think i think you have a valid point however what bothered me in particular is when i look at this upper right one there right and i would just put myself at a fixed gate voltage namely the gate voltage that gave rise to these gm values i would at least expect that i get some agreement there in terms of the expected current and i don't so just for this let's forget about the vgs dependence for a moment i was i was assuming that i should at least for this gm value for this gate voltage value i should get something that is similar but i don't is that consistent as you saw from the experimental data there is a dependence here certain shift if i'm going to very long channel lengths we saw sometimes things shifting around since we don't take this point as a point of reference but rather look into the steep slope the steepest slope region we hopefully have not to deal with this kind of shifting yeah okay i think i would very much like to to to have some discussion with you about this part because the the question really here for me is not to say okay it has to be a constant lambda or whatever but by no means i could get i was unable to get my mobility extraction and the current that i would expect for a given lambda in agreement and if you're saying that doesn't have to be the case then i need to understand why why it doesn't have to thank you you know i'd like to ask a general question since you wrote this up at the beginning of the talk of all the advantages almost all the advantages were decided for working on both quantum capacitance limit or one more to transport the most scattering and what else small t body these are all true for all other low-dimensional manufacturers right people are talking about the same things for carbon nanotubes as well but now they are not so popular anymore so i'd like to know why graphene is so much better than any other three five silicon nanowire or any other possible nanostructure so i think that's an extremely important question and i want to address it as as honestly as possible so carbon nanotubes indeed um i could make exactly the same arguments and i did in the past uh the biggest difference that i see is what i try to point out carbon nanotubes still uh don't give me the chance to have them being patterned exactly the same way i want although there's humongous fantastic progress and creating a race of tubes it's very challenging uh to have tubes that behave exactly the same same diameter same band gap no one being metallic all these kind of variations that i have to deal with in case of carbon nanotube make them extremely interesting for the investigation of individual devices but very hard to picture them being integrated into a circuit so the hope and it's really nothing else at that stage but the hope the hope that graphene as a 2d material gives me the chance to use all my well-developed uh lesographical techniques right i think inspires people to think it could be different now let me make the comparison to other materials silicon ultrason body silicon structures normally are of the order of 10 nanometer body thickness and you can argue they are 8 nanometer or something like that for extremely scale devices 8 nanometer and 0.5 nanometer in terms of body thickness still is a difference so there i would certainly prefer to have a mature with a smaller body thickness than density of state um as long as i'm talking about a planar 2d system my density of state arguments holds so you will find yourself in the situation particularly for silicon and other materials with a higher density of state that you will not reach the quantum capacitance limit then you said what about wires what about other types of wires we are looking into wires exactly for that reason too but you have to make sure that your wires are small enough to enable 1d transport because as i said before if you're in a 2d transport regime except for graphene you will have a density of state that is too high right 2d graphene versus 2d otherwise 2d graphene nice i can go to very small density of state in quantum capacitance limit 1d versus graphene yeah in principle i can be in a very low density of state limit but in order to be 1d for wire i have to make the wire very small for a lot of materials in a lot of instances let's say for silicon you would have to be maybe two nanometers or something like that before you see this density of state argument kicking in and is that not something we should explore i think we should explore it so for me this is then on the same level while for the graphene i can already show that my quantum capacitance is small enough i think that's that's the fair assessment at this point are there any negative negative points of graphene compared to silicon other than that silicon solar study yeah of course there are tons of negative points so the first negative points is as with all these materials that are nano materials what do they have they mainly consist of surface versus bulk that's why optimistic people are talking about sensors right they are extremely sensitive i could also say being sensitive is not a good thing for electronics applications because sensitive means i'm going to have a lot of problems with reliability with reproducibility etc etc why do we see different characteristics every time we make a device that supposedly is designed the same way for that reason it's extremely sensitive to all effects so the demands on the control of fabricating these devices i would say are even larger than for bulk device because there is no bulk everything is surface it's very very hard to control surfaces and interfaces it's what we have to do in the nano business dealing with surfaces and interfaces but it's the same time extremely extremely hot and the question is is it possible for us to do something about it or not so that's that's clearly a minus right because it challenges us a whole lot the other thing and that is something you should not underestimate at all silicon is around for a long time and and processes have been developed in the industry for all the little things going on contact formation gate stacks dielectric right and and it took years and years to develop all these little things so for us and i include myself to catch up with these types of activities to make nanometers a viable choice for the future we have to be very fast we have to be fast and and and overcoming all these obstacles and coming up with processes and so on and so on in order to uh to compete so that's that's if you want a big mind it's a big challenge right nobody knows are we fast enough because at the same time now we are talking about what generation of MOSFETs 60 nanometers 32 yeah i mean these are small channels right this is clearly nanometer size so if you want to have graphene kicking in on nanotubes or nanowires anything right we need to be better than that that's a big big challenge it's an opportunity but without any doubt i mean anybody who plays that down right would certainly not tell the truth the most optimistic channel then that you can have theoretically let's say everything goes right so i know that when when i was at IBM we were trying to argue about the carbon nanotubes and i think for CMOS if you want to have any chance with graphene you have to create a bandgap there's no doubt then we were talking about three to five nanometer channel lengths so with the body thickness and a couple of nanometer high k dielectric that that would be the optimistic very optimistic uabili yes so not not wanting to develop too well on the challenges because there are a lot of them but i do want to ask you one more question because it's something that worries me and i have to get you thinking about it so this quantum capacitor is very nice and i can think of two ways that you can give an insulated capacitor to the estate and that's very nice because then you have a lot of conducting channels the other way that you can get it which would be easier to realize is you can have a small density of states and reasonable insulated capacitance and then the worry is you have a small number of conducting channels so you get this wonderful control but you have a very small current so in the end aren't you going to be faced with putting a lot of these in parallel yeah so so so i want to repeat this question and you can say whether i repeated it right to just make sure that we are all on the same page so the question is oh wonderful i take this huge object which happens to have just one one-dimensional mode and i can operate in the quantum capacitance limit and all i said applies but the footprint of this is huge right i want things to also be small and the smaller my density of state in some sense in particular the smaller the effective mass the larger this object can be while i'm operating in the perfect 1d regime so for me as somebody interested in making 1d happening and observing these effects i certainly pick a material first that allows me to do that and then prove my point but professor lansom pointed out well but then you're not going to stop at that point and i agree i would like to make a raise now if i'm making a ray of these huge objects right it becomes quickly very very huge so what do we have to do we have to then improve on our fabrication skills pick a material with a high density of state that's exactly what you said reduce the footprint per 1d structure and then add those up in order to have both benefits namely the 1d quantum capacitance limit and the array structure so so this is kind of the logic path to approach this problem but the goal i think you clearly defined it rather have something 1d in a high density material than a low d yes uh-huh you have to direct me which one it is this one yeah so may i have missed uh can you please explain the reason behind the unbalanced current for energy the what the unbalanced current yeah not symmetry oh the the asymmetry so we're coming back now to this asymmetry thingy so that was brought up i i have an entire presentation on that but i'm going to give you the short version so you know um professor gold harbor gordon i think deserves the credit for being the first pointing out the as a possible explanation for the asymmetry related to this p-n junction you're going to cover that on friday so so part of the reason is that we are saying if i'm transitioning from a cone and this cone happens to be lined up like this that i'm injecting into the top part of the cone and i'm injecting from this cone structure into a cone structure that i somehow let's say by means of the gate have a line such that i'm going into the lower part of the cone and maybe then back into the upper part of the cone and then to the drain right in such a structure what i really then have is a transition n p n and these kind of structures have been fabricated so professor gold harbor gordon i think has made a device structure in the first place there are no more publication from him where he has a graphene channel two contacts and a gate that sits in the middle region and a back gate that can control these two regions so with this configuration of back gate and front gate i can create this kind of structure okay what does that have to do with your question well i can modulate the middle gate independent of the back gate in particular i can create with this middle gate the situation where i have n n n instead of n p n now let's assume that this p part is as p as the n part is n meaning that the triangle there is the same then shouldn't we assume that we have the same current the answer is no if it would be the same current you would have a perfectly symmetric curve i'm going to connect that with this measurement in a second just stay with me if n p n actually is a slightly larger resistance actually pose a slightly larger resistance for current flow this current here would be somewhat smaller than this kind which is the explanation that in these kind of devices the p side would have a smaller current than the n side in your id vgs so this smaller current here would actually be associated with the n p n configuration while this would be n n n or you can flip everything over make p p p the high conductive one and p n p the low conductive one okay this creates asymmetry now what we noticed and this is something that that we had published in a vli article i can give you the reference for is that even if i have this gate overlapping the entire structure even then i can create this n p n p n p structure supposedly because underneath these contacts i can still through back gating change the fermi level lineup relative to the code and can still create this p n p n n situation although the top gate overlaps everything so if you buy into that argument that i can still create this transition regions in one case it was the transition region between this open area and the gated region in our devices it would be the transition region between what happens underneath the contacts and the gated region then i can always explain the asymmetry no so first of all normally nanowires do not intrinsically have a perfectly symmetric band structure so there's no expectation from you that it should even be the same plus what you always also find is that in i know it from carbon nanotubes i know it from from pretty much all the nanowire work that i have done if the material is sitting on a substrate and you're looking at the id vgs and you take your substrate as an experimentalist and put just a little bit of water on there just a little bit of water and the device characteristics should be something like that let's say not even perfectly symmetric because a lineup of my thermal levels is different blah blah blah so as i said it's not even supposed to be symmetric on top of that i can suppress this current a lot because the interaction of the carriers in the channel material with the environment in particular with water contaminations and with traps in the substrate very very frequently suppress electron conduction very effectively in these open channel materials so asymmetry is easy to explain by a lot of different reasons harder to explain in the graphene case that's why we use the more elaborate approach there so i pointed out yeah very good so i tried to say that the key is the dielectric on top the channel length is not the point right because both capacitance are proportional to the length the only thing that you can do in order to enter the quantum capacitance limit is to make your oxide capacitance very large or your oxide thickness very small or also the dielectric constant very large so reducing the top gate dielectric thickness to 10 nanometer and going over to a high k dielectric is the key enabler to reduce the voltage and operate in the quantum capacitance limit not the lengths the oxide thickness it's the same the same no because both cq and c ox are proportional to l so the length dependent doesn't help you the length doesn't matter because both skates the same with the length not be useful unless you open a band gas and open up a band definitely could be a bit of the graphene who's maybe there's more value than the nanometer or you can store so again i think you're going to still face the same problem that is between carbon nanotubes aligning it properly and making sure that you come to the right place again a very very good comment i have two types of response to that first is yes we have to go into the nanometer range but unless we are trying to do it we will not know what challenges and problems we will face so that's that's an almost trivial answer to your question the other the other response is maybe i don't want to use graphene for logic application but for our f applications then the things look slightly different you know probably that there is a dappa program even out there that's called sara that is exactly tackling these types of issues namely saying okay what if we don't have a band gap we do have this gate modulation for free because of the density of state can we make a useful device out of that for other than logic application and the current um credo is that yes for our f applications it might be good enough because there the on-off ratios don't have to be three orders of magnitude or more but circuit designers seem to be okay with let's say a little bit more than an order of magnitude 10 15 maybe 20 and that is something you can get out of graphene without the formation of a band gap so i think it depends very much on the type of application you have in mind how about the for example for other application fd is the gm upon people who get their vaccines so what about gm what are you expecting roughly is it significantly higher than 35 or other? yeah so the first of all the argument is the same as in 35 or nanotube business when you just look at the intrinsic ft values things look extremely promising kind of gives me a full loop right but what is really why why don't we still have no just recently we got terahertz transistor out of 35 right that was the latest announcement right just recently we got an experimental data on a terahertz transistor on 35 just recently i believe why did it take so long to get that despite the very nice intrinsic properties because all the parasitics in particular contact effects and so on matter a lot plus in case of 35 you are unable to bring the until recently bring the gate very close to the channel material that's actually work from our colleague peter yee going on here that has succeeded in getting a surface inversion layer in 35 where you can now do something similar to MOSFET you can scale the dielectric and can in this way improve on your frequency so two things you have to put together the parasitics and the gaitability and so for graphene the same challenge is out there intrinsically i can immediately throw at you a very nice a nice large number but the truth is i need to do a very good job in getting rid of these contact effects all the other parasitics and at the same time head to the type of gate control without sacrificing intrinsic channel performance so these are major problems but at the same time there is a promise for this high frequency application so for those experiments where we peel things off we are using hopg this is highly oriented pyrolytic graphene and it is literally a block black block of graphite where you have supposedly a very nice alignment of the different graphene planes relative to each other and as you know i mean that's what graphite is used for among other things for being very nicely sliding one layer relative to the other one you take this as a starting material and peel the graphene layers off and and deposit them so the starting material is hopg graphite yes from this block so the technique that professor Lancer mentioned yesterday is really i mean one of those techniques is to take a scotch tape peel it off and in this way you remove top layer a couple of top layers and then by pressing it back onto the substrate almost like stamping and peeling and doing that in a in a repeated way you can get very very thin layers of graphene but that's only for the study purpose the real approach that well maybe not the real but a approach that people are looking into is can i use a substrate like silicon carbide and can i somehow convert the silicon's carbide surface into a carbon surface that would be a graphene layer right can i do that because if i can get rid of the silicon and some approaches include sublimation of silicon then i might be able to use a real handle wafer and by means of silicon sublimation end up with a continuous graphene film this is what is currently explored by the materials experts the low hanging fruits are very much much associated with your personal expertise i would say if you are a gate dielectric expert i would answer working on the interface between graphene and the dielectric to prevent the deterioration of the mobility that is normally observed would be one of those maybe not low hanging fruits but immediately relevant experimental work if you are a person that is very good in in like hil for example i heard the presentation at the drc very good in making i f devices then probably the first thing that you can easily do is do the scaling and change the channel length and see that you see the frequency increasing with the channel length the way that you want and so i believe honestly that not only does the application matter but but it matters what kind of background expertise you have for me personally i am curious to explore new types of device application as this band to band tunneling devices structure and i try to find ways of making use of the material in a smart device layout and and also what i told you about this pnp junctions here shown a very different type of behavior in graphene right immediately makes me think well if it's different how can i exploit that difference can i do something about that so for me maybe it's not the low hanging fruit but that's what sparks my interest to go in this direction of of unique capabilities um that's probably not exactly the answer that you were looking for but that's the best i can i can do oh huge i mean look they they potentially grown material if you're a materials expert okay that brings us in the other field then then i would tell you it would be a great idea if you find the right growth conditions in order to make a very uniform large scale perfectly flat graphene surface on silicon carbide or other substrates right so that's why i'm saying it depends very very much on your personal background and and what you can do well in order to to answer this question our stack structures are titanium palladium gold palladium in particular to make it hardy against the probe tip scratching down and and damaging potentially the interface you can do something similar with chromium gold the no it's not an alloy it's really layer by layer even evaporated titanium palladium gold palladium and gold which as which matter is on the bottom so why do you do this kind of so i told you that one of the hardest problems with graphene is to make things adhere to the graphene everything that you deposit peels off so what things adhere well in uh in the semiconductor field you can find a lot of literature on various metals that stick well and others that don't metals that don't stick are gold itself palladium itself things that stick well titanium aluminum chromium so there is a lot to be learned from the materials side that tells you already what is a good chance that it sticks and others that don't and so it's in the first place from an experimental standpoint the ability to create a contact rather than saying okay what is the best contact because a lot of good contact materials hypothetical contact materials i can't even make stick so i can't even make those devices does that make sense nickel sticks well