 In this example, we're going to be looking at how forwarding will affect our data hazards in this block of code. I've already marked the dependencies from our previous example. So we're just going to be focusing on the forwarding this time. As always, our first instruction isn't going to be dependent on any of the other instructions that we've got in this block of code. So we won't worry about any dependencies there. We'll just let this instruction run immediately. Now our add instruction is dependent on the results of our load word instruction. Since our load word instruction computes its results in the fourth cycle, they're not going to be immediately available for the third cycle of our add instruction. This means that we're going to have to wait one cycle before we can run that add instruction. So in this case, I'm going to fill that one cycle with a no op instruction. Now we have two add immediate instructions that aren't dependent on any of the other instructions that we've got here. So I'll be able to run both of those immediately. Next, I have a shift left logical instruction, which is dependent on the second add immediate instruction. But our add immediate instruction will compute its results in the third cycle, and the shift left logical will want to use those results in its third cycle. So they'll be available through forwarding. I won't have to wait any cycles after the add immediate before I can start my shift left logical instruction. Now I've got an add instruction, which is dependent on the results of the shift left logical. And again, this is going to compute its results in its third stage. So they'll be available to the add instruction in its third stage without any waiting. We can just forward those from the end of the ALU stage from the shift left logical instruction to the beginning of the ALU stage in the add instruction. Now I've got a store word instruction. It depends on both the add instruction before it, as well as the first add immediate instruction. It's been more than two cycles since that add immediate instruction ran. So I know those results have been committed back to the registers, but I'll need to use T1 in the third stage because I need to add zero to it. So I need to be sure that the results of my add instruction are available. Since the add instruction will compute its results in the third stage, those will be available for my store word instruction in its third stage as well. So I can run my store word instruction immediately. Lastly, I have that jump register instruction, and that's not dependent on any of the other instructions that I've got there. So I can run that instruction immediately as well. So in this case, I've reduced my delays to just one. I only have one no op now. So this code is going to run a whole lot faster because it's not sitting around waiting for instructions to complete before I can run new ones. I can just forward data from one instruction to the next without a whole lot of waiting. So forwarding works out really well when you have lots of ALU instructions to run.