 In this video, we're going to explain one of the parts of today's computer system. More precisely, this box over here, which is inside a CPU, which we call the data path. Let's go over the ingredients that are present in the data path. Data path, as its name suggests, it's a place in the computer in which the data is being manipulated. One of the most important elements of the data path present in most microprocessors is what we call the bank of registers. This is just a set of registers, the number of them various, that are all together to hold data being processed by the computer, by the microprocessor. There are several parameters that are very important about these bank of registers. One of them is how many of these registers are there. The other one, very important, are the names of those registers. And the third one, perhaps the most important, is the size. In other words, how many bits can they store here? Number of them would be this dimension. Regarding size, the typical values are either 8, 16, 32, or 64 bits. And again, from one microprocessor to another, both the size and the number, and also the names of these registers change. And the first thing you should do to get familiar with an architecture is to get a hold of this information to make sure you understand how the data is processed inside. Now let's suppose these registers have names from R1 all the way through RK. These bank of registers has a few signals that are very important that control how the operations are carried out. One of the most important ones, of course, because these are memory elements, is the clock. Another very important control signal is the one stating if the operation we want to do in these bank of registers is reading a value or writing a value, which is typically represented by this abbreviation, read slash w with a bar on top. And then, depending on the bank of registers, if, for example, these bank of registers can read two registers at the same time, then we are going to put address one and address two as the address of the registers that can be read. And typically, another entry, control entry is the data that is written to the bank of register. The second element that is present in most of the data paths is what we call the ALU or arithmetic logic unit. The ALU is basically in charge of executing several operations. So another way of looking at this circuit or this element of the data path is as a very versatile piece of circuit, which can perform several operations depending on a control signal, which we are going to call OP. Typical operations are in the arithmetic category, addition and subtraction. And in the logic category, this is the reason why we're going ALU, in the logic category we also have very important operations like, for example, compare an AND or conjunction, an OR or disjunction, and, for example, negation. And again, as with the size, names, and number of registers, this also changes depending on the processor. Now this ALU receives two operands over here. And depending on the value of this control signal, it executes one of these operations among the two operands. And the result is typically, not always, but in most cases, is stored in a register that is connected to the output of this circuit to store always the result. And as you can imagine, in this memory element, it also has a clock signal. Now the additional observation here is that the operations that the ALU can carry, sometimes they need to be performed of different type of operands. So in order for us to be able to choose which operands enter this circuit, the typical solution that is adopted in many processors is to put here two multiplexers. Let's call them M1 and M2. And with these multiplexers, which have these control signals over here, let's take this one over here and this one over here. Let's call this one M2 and M1. This could be several bits. Same thing as this one, this one, and this one. All these can represent several bits. So as I was saying, the purpose of these two multiplexers is to select the most appropriate input to be processed by the ALU. Different choices we have here. One obvious one is one and two operands that are coming out of the bank of registers and that are specified by the address of these two, by these two addresses. In other words, the bank of registers when the signal is set to read and I provide here two addresses of two registers. Here one of them exits through the signal, the other one exits through the signal and I can select the appropriate value in the multiplexer so that these values are then fed into the ALU and a result appears at the output of the ALU. Other alternatives for operating are values that are coming from, let's just say, other sources which right now they don't belong on the data path, could be from anywhere and a third typical option is sometimes the result that by the way needs to be sometimes written back to the bank of registers. In some cases we need to also select it as an operand here. And again this multiplexer could have some other inputs which we don't describe just for the sake of simplicity. So this is our initial data path. It's a simplified version but this data path, if we analyze it a little bit more closely can do a lot of interesting things. The first thing to look at which is very important that is all the signals that we have over here including this clock is what we call control signals. So another way of looking at this data path is that you have a digital circuit that is capable of carrying out several operations and the type of operations that are carried out and the way the results are stored depend on the values that these control signals take over time. Let's take two examples. Let's assume that we want to do the following operation. We want the register R3 to be equal to register R1 plus register R2. Let's see how this operation would be implemented in this data path. So the first observation is that in order to add these two values the values of register R1 and R2 need to be read from the bank of registers. The appropriate signals be selected in these multiplexers and the calibration code be put in the control signal of the ALU. We can represent that saying that address 1 which is this control signal over here will be the address of R1, address 2 will be the address of R2 and the read-write signal should be set to read. This refers to this signal over here. This will be the first step. Finally, once we set the proper address here and the read operation here we see that the bank of register is going to set these outputs to the proper value. At the same time M1 should be selecting this input here. Let's call it RB as in register bank. So M1 and M2 both should be selecting the input coming from the register bank. So with these two signals over here the output of this multiplexer input of the ALU the values of R1 and R2 are coming out of the bank of registers and being fed into the ALU. The final touch is that this ALU which can carry several operations need to be set so that it carries an addition. This will be the initial step to carry out this operation we see here. As we see it right now R1 and R2 are being added here in this ALU. Now the fact that this is a register controlled by a clock means that we have to wait for the next clock tick. In other words step number two and at the next step what we guarantee is that the addition or the result of adding R1 and R2 is now being stored in this register called result. Now what do we do? Let's just say here result equal to R1 plus R2. Now what it needs to be done is this result is now capturing this register for the following clock cycle. It needs to be fed back to the bank of registers. The read-write signal has to be set to write and one of the two addresses let's say it's address 1 will be set to R3 in order for the write operation to occur. The way we represent this is first we make sure that read-write is equal to write this would set this value in this signal and we also make sure that the address 1 here is equal to R3. So during the second clock this was occurring during the first clock during the second clock the value capturing this register is being fed into the bank of registers and at the same time the write signal is being active is being set to active and the address 1 is R3 and as a result the bank of registers writes the data that comes to this input and the address is specified by address 1 because write is equal to 1. Let's make a little bit more sophisticated operation. Suppose that the operation that I want to execute right now is R3 is equal to R1 plus R2 plus R1 again. How would we execute this? Well you will agree that the first step is exactly the same as the previous one in other words I would like to calculate R1 plus R2 and therefore I set the address 1 to R1, address 2 to R2 R1 and R2 are at the input of this multiplexer M2 and M1 are set so that the value of the register bank is selected the operation is set to add so on and so forth. At the end of that clock cycle we are guaranteed the result at the end of step 2 we are guaranteed as before the result contains the value of R1 plus R2. Now what do we have to do now? We already carry out this operation we need to take the result of this and add it back to R1 and this is where this path between the result register and this multiplexer over here becomes really really handy because what we can do is maintain the same signals to make sure that R1 is still coming out of this output therefore we still maintain address 1 equal to R1 the read write operation is maintained to read but now the important observation is that this result over here should be feeding M2 therefore M1 will remain to RB as before but now M2 will select the input coming from the result this is the main difference and of course the operation still is an addition so what is happening here is that this result we just produced in the previous clock cycle is now being fed by controlling M2 is being fed through this multiplexer back into the ALU so in this step number 2 the ALU is adding the result of the previous operation plus the value of R1 which is still being output through the signal and selected through this multiplexer to become one of the operands of the ALU now here comes the difference on step number 3 what we have to do is this result in other words when the clock ticks again that addition which is R1 plus R2 plus R1 again it's captured in this register over here and therefore result now contains R1 plus R2 plus R1 and what we have to guarantee is that this result is written back and the only thing we have to do is set the read-write signal to write and the address 1 will set it to R3 and at the following clock cycle this value that is here is stored in the proper value in the bank of register so these are two examples of how this data path can carry some operations based on the bank of registers control signals and the ALU