 So we're here at the embedded world 2018 and hi, so who are you? Hi, I'm Rick O'Connor. I'm the executive director of the risk five foundation. So you're like the president, right? Yes, there is no president per se. It's a non-profit foundation looking after the risk five ISA And I run the foundation. I was I was behind starting the foundation with a bunch of member companies who are founders So there's a lot of logos right here exactly all these companies are part of the foundation, right? We have over 80 member organizations commercial companies and universities as well as an additional 50 Individual members. There's like very active ETH Zurich, MediaTech What are they doing? What is it Qualcomm and video? What does it mean to be a member of the foundation? Well, the foundation looks after the risk five instruction set architecture that originated at UC Berkeley and what the foundation is responsible for is Making sure that that specification remains free and open and available to all users No, no charge. It's a free and open instructions that architecture that you can use as well as extend the roadmap and Promote and educate and increase awareness around risk five. So what did they start the risk five? Well, so the project at Berkeley started in the spring of 2010 And they thought at that they were looking at that time for new Instructions or a new new curriculum for their undergraduate and graduate program to teach computer architecture and programming That's when the original research started around and the idea was okay Hey, we could have a little three-month project in the spring Create a very simple ISA that we could then use in the fall semester Well, four years later that three-month project four years later produced the first formally released risk five specification and Many tape-outs for test chips and research publications along the way Such that the community the industry at large started to realize that hey this was something interesting going on at Berkeley and The team at Berkeley decided that this needed to exist outside of the University because of the amount of interest that was going on in industry So the foundation was created and now we have 80 any some odd member companies You were not at the University when they did that, right? That's right. I'm not I'm not I was not I know I'm not a Berkeley alum. I met Kirsta Sanovich and Dave Patterson Early well I started talking to the team probably around the professors. Yeah So Kirsta Kirsta is what the lead researcher at Berkeley Dave Patterson is quite famous in the risk world He coined the term risk risk risk industrial original risk papers with his ninth in the 80s So a pattern that inspired our right at the very beginning before arm and MIPS and and all of those companies So Patterson and Hennessy anybody who's taken an engineering Computer architecture design course in engineering schools would have had a Patterson and Hennessy textbook And that's Dave Patterson from Berkeley and Hennessy from Stanford So he and those two they did that program 2010 correct and some students worked on that Yep PhD students and so on worked on that and they designed something completely different or from the ground up completely new ISA it's not a it's not a copy of anything that's before it's it's Informed by so if you have the opportunity to do something from a clean slate But you have three decades or more of history on what works well in a risk machine And what maybe doesn't work so well in a risk machine You know you can you can be informed by that history to do something quite good And so basically they're sitting down there thinking of an instruction set It's like a creative process We think we need this this this this but we don't need that or exactly that exactly these things were bad these things are good Let's have this Build test chips test it out Published research papers get feedback and that resulted in the publications that started in 2014 The first base integer spec released in 2014 and then the creation of the foundation to manage the rest of the specification stack so What is there version 1 2 3 4 5 what what is the 5? Ah, that's a good good good question It's not risk V. It is risk 5 as in Roman Roman numeral 5 Which represents the fifth? Risk-based research project that originated at Berkeley so risk one was back in the 80s under Patterson's original research, and it was a risk to Three and four were kind of not named three and four They were sore and spur, but there were other additions of the of the research work So this was the fifth time that team started to do more risk-based research if you will hence risk 5 So it's reduced instructions set computing It's actually computing right it's not the It's computing and so that's the better way that the the the sysk That's Like it's better to have a reduced instruction set well, certainly the the the modern learning around Computer architecture is that risk-based approaches? Are better you can get generate more performance at a better price point using a risk Approach to your computer design until it's not on this board Until it's not on this board. No, they don't they don't like it or I might I wouldn't say that They're not a member yet, but some of the risk five Staff maybe they came over from it Oh and other companies and so on and and certainly the research that all this was sponsored under inside Berkeley You know Intel continues to be a major research sponsor for the work at Berkeley, right? So You don't need to be a member to use risk 5 Obviously from my standpoint we welcome all parties It's one big happy sandbox and everybody all the kids can come and play in the sandbox arm is not here either, right? This is the challenge for not not all member come not all companies on the planet or members that is true And you've raised to obviously high-profile important processor companies This is arguably one of the most interesting Things that has happened in the processor industry in the last decade and you know my jobs to talk to everybody So it's a challenge to the art, right? What it is and as much a good example is Microsoft and Linux, okay? When Linux first sort of hit the hit the road it was you know came on the scene It was like oh, what's going to happen to well, and if you look at Microsoft's platforms these days They're one of the largest, you know Linux users on the planet, right? So it's it's not About one company versus another it's a it's an approach to Bringing an open standard for an ISA into the marketplace that everyone can use Right, so we don't think of it as a us versus them for anybody What do you mean who's free bsd? No, I'm just joking Say maybe there's windows linux, and then there's free bsd. Yeah, as they're like They could be several different like open ecosystem kind of places, right? And it actually that's an interesting point when you think when you look at all of the major building blocks for a computer system Whether it's OS is whether there's network interfaces, whether it's chip-to-chip interfaces whether it's wireless interfaces There are open standards for all of those pieces of technology There is not today yet or hasn't been until risk 5 an open standard around an ISA So why not why shouldn't there be? And that's that's fundamentally what risk 5 brings to the table. Is there argument that They need to invest in making new chips and and the license fee is actually quite small That's a question you'd have to ask her That's the way they do right because most of the the companies that do License they are they're like It's not a big part of their expense To pay the license is it so there's there's a An open platform You know has has a number of benefits the licensing is a portion of it To your to your point Yeah, but so But the freedom to do whatever you want because it's an open ISA is Is there and the level of The level of innovation that what we've unleashed as a result of having an open ISA in a marketplace You and I could start a processor company in your kitchen tomorrow We don't need a license or permission from anybody to do so. So what we're experiencing is We're harnessing the best and brightest minds from industry and academia around the world working on risk 5 and help and helping to solve problems using risk 5 by our Estimation there's roughly 80 universities to date that have adopted risk 5 at the Undergraduate and graduate levels for the for their curriculum as a pedagogical tool, right? So it's It's quite interesting watching the momentum of both, you know companies as you as you are we've already talking about And and academia in the adoption of risk 5. Is there any Interpreted between the the arm ecosystem at risk 5 is anyway that software could still work over there somehow that has to be recompiled everything So Yeah, it's a different it's a different binary, right? So it has to be Recompiled, but there's there's Linux support. There's actually there's just been a fedora release For Linux There's tool chain Work going on in the ecosystem GCC upstream benedals upstream LLVM working So the community is you know bringing the bringing the ecosystem up in the tool chain up around risk 5 All right, and maybe I'm just thinking maybe I don't know if that's true But sometimes for example when some companies are doing arm servers They kind of use that as a pressure point against Intel so they don't have too high of prices Maybe there are some of the companies are using risk 5 as like not I don't know if it's a threat or not But I guess I'm and say hey if you try to increase the if you can't lower your License then we have an alternative going on. Is that maybe is it possible? You know freedom of choice. I think is good for everybody in the industry ultimately You know obviously it provides pressure points in different parts, but there's To say that that's a an overwhelming theme There's way too much activity in the ecosystem for that to be a mainstream reason are some people doing it probably right but To suggest that it's why people would be interested in this five exclusively is Is one part of the benefit of risk five the there are characteristics of the ISA that are Unlike anything else that lets you build different architectures in a very interesting way and Have the ISA being used in deeply embedded IoT devices very small devices right through to server scale And no other instruction set architecture can do that. So right now you have one need to hear There's actually risk five here hardware. It is real risk five chip. Yep. How many risk five chips exist like this This is what is this one? This is from side. This is from sci-fi. It's a little embedded controller from sci-fi And this was a badge that was designed for our last workshop that at micro one of the member companies designed together with with sci-fi With an e-ink display just as a toy and you know conversation piece But is that the is that the sci-fi chip that can run Linux? No, this is an earlier version There is an more of an embedded controller the sci-fi chip that runs Linux is just being released in the development board Is it I think available now where it will be shortly. This is 8 bit 32 bit. It's a 32 bit controller You don't do any 8 bit. No 8 bit doesn't actually make sense really anymore. You know, there's no point We have 32 bit with compressed ISA down to 16. So this is like Zeroish yeah, but you do you have something bigger already taped out So you say Yeah, so I want to be clear so when you say you the foundation. No ecosystem, right? so part of my role and as Executive director of the foundation I get to see behind the curtain of all of our members Clearly, I don't get to talk about where they're what they're doing until they're ready to talk about what they're doing, right? But I can tell you that we have member activity at Every point along that ecosystem like from Yep Big server scale chip what is it going to be designed out of I mean the Because does I mean you have something that's that's compared comparative to what you call it to cortex a like a v8 or something like that Different from the app right is the M is a small design the a is much bigger, right? And you have the whole thing planned out or already or so the ISA Does not presuppose an architecture So the micro architecture and implementation of the CPU is what is what you and I if we started our chip company tomorrow in your Kitchen we would need to decide what kind of a processor are we looking to design is it a big? You know out of order machine deeply pipeline. What is it? Are we going after server? We're going after low and embedded what are we trying to do? So the ISA specification itself does not presuppose a particular Just the ISA well you use different the ISA is modular it is released in Standard extensions depending on what you're trying to develop. So In this device, I'm not sure not 100% sure But it's probably the base integer multiply divides. Maybe atomic. That's it As that's what you would use typically an embedded device and you know, then you've got floating points Maybe double or quad position floating points Maybe some vector extensions depending on what you're doing for your server classes. These extensions are open source and ready and available Yeah, so the process would be double exactly. So there's very there's various stages of completion on on these extensions I am AFD which is referred to as sort of the general class CPU that would have a typically have an MMU and you'd run Linux on That's very well-defined and and release. I is the only thing that was has been frozen 100% in cement Bring them the base integer extension. Yeah A is for atomics M is for multiply F is for single precision floating point D double precision floating point There's a queue for quad So there's a bunch of other extensions and all of that work is is very well baked and being released by the foundation Ratified actually in the coming months. So actually some of these companies might be Saying hey, I'll take care of this this part and maybe they'll release it up in source or something They can do that or absolutely work together. Absolutely. Yeah. No very much so somebody only in the risk foundation that does that so the foundation is Really these guys, right? So it's the member. It's the member companies that For that create that are the foundation So that the technical committee and marketing committee within the foundation have task groups that work on different Extensions the marketing committee have would have task groups that works on work on coming to events like this Making sure that we have a presence that you know in better world and other events like it help with the workshops that we run But it within the technical committee then there would be you know a privileged architecture Extension or a task group there would be a memory model task group effector extensions task group Security task group and so on we have it like a dozen different tasks No, no You know we have Contribution rules and a membership agreement and bylaws in terms to govern how we how we act and how we participate And then we have chairs for each of the task groups in the time and within the technical committee and Technic committee chair actually is from sci-fi Then the company with this chip a gentleman named you and simply who is one of the principal authors of the work He's a graduate a PhD graduate from Berkeley, and he's the chair of the technical committee and micro-semi who is another member a Gentleman named Ted marina chairs the marketing committee On on the marketing side do they pay a fee to be a part of the foundation? Yeah, there's very various membership classes You talk about how much it is. Yeah, it's published on the web. So it goes. Yeah, it goes so for nonprofit Research labs and universities. It's $2,500 a year, and then you come and participate in any of the task groups For commercial companies, there is a silver gold and platinum level that range from 510 to 25k And you get different privileges within the foundation depending on the membership level And do you use that money to hire more engineers or not yet? We have no engineers and we have no intent to have engineers We use it to educate. Yeah, we use it to educate have events like this and run the foundation. All right Yeah How much demos right? Yeah, so someone running on Stabilization what do you call it the FPJ scan of the software? Right? So where's G? Let's go around Micro you are having it right here No, that's just one of the things that that micro is done. That's not their their demo over here So it'd be worthwhile for you to do everybody when they're available Here Can we film your demo right here? Yeah So here we're showing off the gap 8 which is a What we what we call an IOT application processor Yes, it's it's a processor which is destined for Doing content understanding applications analyzing images sounds motions on battery power So it's based on a risk five base core. That's what there's actually nine risk five cores Diagram that it's basically an MCU and Then a calculation entry which can be used for doing things like convolutional networks It's a flexible device so it can do loads of different types of outfits. It's It's based on an open-source project called pulp where the cores come from And Who's making the chips we are you are yes We we actually make this chip. Yep We take the work of the whole project that we have a very close association with our CTO It's one of the founding members of it And then we size that for this specific market and the specific market is IOT sensors that are doing content understanding So octa core it's it's actually nine core. So this is eight eight core here and an extra core And then we also have a hardware convolution engine, which allows us to do very long power neural network It was taped out in Christmas and we got the first chips back a couple of weeks back So we're still actually running a demo here on FPGA No, it's it's not that kind of device It's like a sense if you think of a microcontroller you're gonna run a very lightweight real-time OS We've actually ported our men bed onto it. We also have another OS called pulp OS which comes out of the pulp project and we will have free autos on it when we release the SDK This board is kind of like an Arduino form factor board that you make that we make That will have that has the gap 8 on it and that can be ordered on our website now and green waves The core competency of your company is in the embedded world Yes, absolutely, but it's also in the semiconductor. Well, we're a fabulous semiconductor company. So we're taking open-source IP We're combining it with With our expertise and then focusing that in on a specific market No, no, we sell we sell gap 8 which is this chip and it's risk 5 based We're three years old Selling this selling this chip now we're there where you based we're based in Grenoble in France Just outside. It's kind of the the Exactly a lot of the people who work for the company access to yeah Foundation door, I don't believe But risk 5 risk 5 for us is incredibly important Because it's without risk 5. We basically wouldn't be able to make the product We would not be able to make the product without risk 5. It gives us the ability to actually produce a system on chip At a capital efficiency, which we wouldn't have if we were licensing IP from someone else It's designed in-house obviously and then the actual fab is TSMC we produce in a 55 nanometer As I said The boards are available now engineering samples of three the boards are available to order now They'll ship in April's first shipments in April engineering samples first shipments in April and we expect to be in production in Q4 Is this this chip going to be compatible with the software that goes on with other risk 5 chips absolutely It can run it can run standard risk 5 codes. You can pilot with GCC C C plus plus You compile straight to that, but we've added some extra instructions Which are these instructions which allow us to be more energy efficient processing things like content understanding applications? We're 15 15 1 5 A mix of private and institutional investors we raised one 3.1 million euros in August and if this works out you're gonna be We want to be very focused in this this range of IoT devices that are doing content understanding so for example Things which are analyzing a particular area and seeing is it full as a half empty is empty cap people counting type applications Keyword spotting so we can do on on device. We can do the full keyword spotting stack. So everything from The noise echo cancellation noise reduction through to feature extraction through to the neural network Be it convolutional D neural network work to do keyword spotting Okay, good to me Me jump these guys over there Hey, can I jump in here? Yes, please So, so what do you do in the risk pipe? So we are ultra sock technologies and we provide a run control and analytics for the risk 5 processor We have developed the run control with the working group and we've decided to take the lead on getting tracing coding for The risk 5 processor which will bring the rate risk 5 to much more potential customers and we have at a moment Ecosystem To get it to get to more advanced chipsets Yeah to more advanced chipsets, but also to make sure that Everyone has has got the tools that they used to in the current standard processor world in the risk 5 environment so that they can actually make sure that they're The environment they used to is not being degraded when they move to a risk 5 processor So it's filling out the ecosystem to make it much easier for people to move across to Yes, we we support arm MIPS 10 silica. We're working with synopsis on an arc integration We have lots of other customers who are using proprietary Processes we can work with all of them and that's one of our unique features Yeah, it's to look at to the whole chip so one of the unique things about us Where IP so we put IP onto chips and these are then give you the insight into what is going on in your chip And interaction between various things on the chip that may be killing your performance Maybe cause new power problems, etc. That you want to go forward Thank you very much All right, so we were Here's I think it's an FPGA so putting it on the FPGA is also fairly easy This comes down to a tool problem once you build the processor You want to package it up so that other people can use it? And so you need to use a tool like IPI or IP integrator for Xilinx or Q-SYS for Altera And that's a system builds tool so it allows you to drag and drop blocks and connect those blocks together So we packaged up our CPU