 Hello and welcome to this video session on Interintegrated Circuit, I2C bus for peak microcontroller 16F877A. Myself, Mr. Vipul Kondekar from Walchand Institute of Technology, Sholapur. So these are the learning outcomes of this video session. So student will be able to describe I2C module, its master and slave configuration with the help of block diagram as well as student will be able to implement the interfacing of any peripheral device which supports I2C protocol to the microcontroller. So these are the contents of this presentation we will have brief introduction then we will go for various control registers associated with this I2C protocol for peak microcontroller. Then we will see how we can have interconnection means when you get different peripherals which are to be interconnected they are supporting I2C protocol so how we can have interconnection between them and at the end we will try to understand the operation of the master and slave module of peak microcontroller for this I2C with the help of block diagram. Now this I2C protocol bus is one of the important quite popular versatile widely used protocol you will find in most of the embedded systems what are the reasons behind that. So one of the important aspect of I2C is its hardware efficiency so when we will see the interconnection of this I2C protocol only two lines two pins are required for this interconnection and hence the circuit becomes simple not only is when you are using these two lines out of these two lines one line is used for these are the lines are bidirectional one line is used for data communication another is used for the clock signal whenever you have I2C bus compatible devices so you can have effective communication between those devices because those devices have got on-chip interface and this on-chip interface available on those I2C compatible devices allows them to communicate directly with each other by taking the help of this I2C bus connection between the two devices I2C protocol support it can support up to 128 different devices attached on to the same bus so so many peripherals you can connect on to the same bus when you are going for this I2C protocol and few of the few examples of that is whenever you are having some embedded system developments some memory is required so serial E-square prompts are available so they are I2C supporting E-square forms so you can use this I2C interface IO expander real-time clock ICs are available serial ADCs serial DAC some sensors are available all these things we can have interface to the microcontroller by taking the help of only two pins of the microcontroller if I2C is protocol I2C protocol is supported there now this is what is the simplicity of the I2C protocol so when you want to have the interfacing suppose this is a microcontroller is a master device so only two pins serial data and serial clock these are the two pins used and this is one I2C bus this is a common I2C bus these bus lines are pulled high by using these two pull-up registers and then whenever you want to have interfacing of I2C compatible device let us say device 1 2 3 up to n we have seen that up to 128 different devices we can connect here so so these devices are also taking the help of only two pins the two pins are used for interconnections so this is one typical interconnection let us try to understand same thing with the help of one what we can say embedded system diagram where a microcontroller is there and your requirement is you want to interface different peripherals like accelerometer is required let us say serial e-square prom is required your application requires RTC real-time clock and OLED so if these are your requirements and you want to have the communication between them so you can take the help of this I2C bus and this is how a typical interconnection can be made between these various I2C compatible devices to form a very simple efficient interconnectivity for the communication as far as the peak microcontroller is concerned so as we discussed MSSP is the module and it supports I2C so this I2C mode it is implemented in all master and slave functions all the functions are supported for the peak microcontroller including general call support as well it supports it can generate interrupt so this I2C module can generate interrupt on start and stop bits in hardware to determine the free bus as we have seen that so many peripherals are connected onto the same bus so there may be the problem of collision if more than two devices are transmitting their data onto the same lines you will get collision of the data and to avoid that so this type of facilities are used so again this module is implemented in standard mode specifications as well as seven and ten bit addressing is used so when you say where you are interfacing so many peripherals to the microcontroller so how you are identifying a particular peripheral in that network so addressing is done for that so these are the features some of the features and when you want to implement this particular I2C protocol so what hardware as we discussed only two pins are required so as far as the peak microcontroller 16F877A is concerned so the two pins of port C a piece RC3 and RC4 so they're working as SCL serial clock pin and serial data pin respectively so these are the two pins used as far as the hardware part is concerned and these are the various special function registers control registers which are used for this MSSP module I2C for the I2C operation so it starts with SSP control register control one register control two registers are there SSP status register is used SSP buffer all these registers we will see when we will see the block diagram of this I2C module so one buffer register is there one shift register is there we know that when you have the data the data available to you in file register you want to send the data is in the parallel form so that parallel data is to be converting to serial so you require this shift register and as well as as we said different around 128 devices can be connected in this I2C bus onto this I2C bus so we have this unique feature this address register is available so that you can have unique addresses for all the peripherals so these are the special function registers these are the various registers and these are two hardware pins required for this I2C communication now as we have discussed when you want to write a program for I2C communication so that I2C communication you will be controlling by taking the help of different control registers so these are the control registers used for I2C communication SSP status register which has got this file address 94 H one more register SSP con one register is used as well as this SSP con two so SSP con one SSP con two and SSP status are the three important registers you need to deal with when you are writing the program for peak microcontrollers I2C communication now let us try to understand how this I2C module is working with the help of what internal hardware is present so there are two parts either you are working as a master or you are working as a slave so this talks about the master mode operation when peak microcontroller works in the master mode operation and then we can have comparison what is the reference between master mode operation and compare mode operation as far as this block diagram is concerned so if you look at this block diagram so as we discussed these are the two pins used so on this pin clock will be sent and on this particular pin data will be either sent or received as we said this device is master so one more responsibility of the master device in the serial communication synchronous serial communication is it has to generate the clock and hence you'll find this particular clock generation part so this is a border generator by taking the help of this SSP ad bit number 0 to 6 you can generate different border rates and this clock can be generated here this clock is given to other slave devices in the network as well as the same clock is used by this master for sending as well as receiving the data and then this is the SDA pin so this is a bidirectional either you'll be sending the data or receiving the data now as let us discuss this part this new thing as compared to the SPI mode that this SSP ad register is there so here you'll configure the address for a particular device and whenever another device wants to communicate initially it will send the address to whom it wants to communicate and then that data will be received here and then you will check whether the address with which a particular device wants to communicate is your address if you find this address match then only the device will start accepting the data so this is what with the feature available along with that to have the control of error control of this particular communication so our framing part so this start and stop bits detection and generation of block diagram is there so this this will result into set or clear of the S and clear and set of the P bit in this SSP set so this is the what we can say one important block as far as the start and stop bits are concerned so this is the block diagram of the master and as we know that when you are sending the data the data is available on the file register from the file register it will go here and right to the SSP buff will be the operation and when you write the data in synchronization with the clock generated that data will get converted that this SSPSR shift register will convert that data okay into the serial form and then that data will go on to the SDA line if you are receiving the data again that receive data will be available in SSPR shift register then it will available to SSP buff and then you can read that data receive data you can read here on to the internal bus with the block diagram of the master now just will go for the block diagram of the slave and just see what are the differences here the most important thing in on slave you will not find any clock generator border generation circuit most of the part is same one more difference you'll find is it is start and stop bit detection circuit let us go to the previous slide this border generator part was there and start and stop detect and generate both the parts were there both the functions were performed here in the master mode but if you come to this slave mode you'll find that only start bit stop bit detection part is taking place as well as the slave is concerned as well it is not generating any clock signal it will be taking the help of clock signal generated by some another master present in the communication module in the given network so this clock signal which is received on SCL will be used for sending the data as well as receiving the data and all other operations this SSP add register and match detection part is same as that of the master so this is how this is the hardware present inside the peak microcontroller with which with the help of which it supports this I to C protocol and you can have in very simple way communication between the I to C compatible devices now just think now we know SPI I to C so can you list out the differences you find between the SPI protocol and I to C protocol as far as some hardware and software aspects are concerned these are the references used for this video presentation