 Hello, and welcome to this presentation of the STM32 MP1 Extended Interrupts and Events Controller. The EXTI controller provides up to 76 independent events, split into categories, configurable events, and direct events. 29 of these events are secureable. The EXTI controller can be configured to wake up CPU1, CPU2, or both independently. Applications benefit through smarter use of low power modes, taking advantage of the capability to wake up via external communication or requests. It also is managing the external interconnect line connection to the GPIOs. The EXTI controller provides interrupt and event generation functions, as well as the capability to wake up the processors from stop modes. Configurable events allow the user to select which active edge generates an interrupt or event with a dedicated status flag for each line. Requests on configurable lines can also be generated by software. Configurable events are linked with external interrupts from general purpose input outputs, comparators, programmable voltage detector, real-time clock, low power timer, window watchdog, Ethernet controller, and HDMI CEC. Direct events provide an interrupt or event from peripherals having a status flag requiring to be cleared. EXTI wake-up events may be configured to wake up a CPU. Configurable events need to be cleared by the corresponding CPU which has been awakened. The external interrupts and event controller allows the selection of GPIOs as sources of interrupts or wake-up events. GPIOs are connected via multiplexers to the 16 EXTI events as configurable events to trigger other peripherals through the interconnect matrix or IMX. GPIOs can also be used as configurable interrupt event signals to generate asynchronous external interrupts or events with wake-up from stop mode capability. It also allows the selected GPIO pin to be used as an internal interconnect trigger signal to the peripherals. The interrupt wake-up event from configurable peripherals can be secured thanks to enable bits in the EXTI controller registers. Also, the GPIO multiplexer provides individual security enable bits for the 16 peripheral interconnect external event lines. As shown in this figure, the EXTI consists of a register block accessed via an AHB interface, an event input trigger block, a masking block, and the GPIO multiplexing. The register block contains all EXTI registers. The event input trigger block provides event input edge triggering logic. The masking block provides the event input distribution to the different wake-up, interrupt, and event outputs and their masking. The GPIO multiplexing block allows selection of a GPIO pin to be used as a configurable interrupt trigger event and or as a signal to the peripherals interconnect matrix or IMX.