 Today we will be starting lecture 8 which is going to cover active devices for analog signal processing what are the active devices that are used in signal processing introduction to that in the previous class 7th lecture we had been introduced to available passive devices primarily piezo devices resistor inductor capacitor crystal and semiconductor diode. We have seen what kind of commercial components are available what are the specifications how to design simple applications using these components we covered rectifier when we covered diode rectifier Zener application sensor applications multiplexer analog gate it can be called application of diode in an important application like multiplexer. Today we will be starting with introduction to active devices primarily I am going to cover what is known as network approach to realizing universal active device that is the op amp operational amplifier it is called and in the same series will be covering comparators multipliers BJTs and FETs in that order first op amp they are called so as they are used in mathematical operations used to perform several mathematical operations like addition of 2 signals subtraction of 2 signals integration of the signal or differentiation of the signal these are linear operations which can be performed with op amp. Let us see what this is an ideal op amp the input output characteristic is as shown it is having infinite gain so if it is infinite gain for finite output of this amplifier finite output by infinity is the transfer parameter okay from input to output it gets transferred by a factor of infinity whatever in parameter it is voltage or current if it gets transferred from input to output okay as voltage or current then for a finite output that divided by the transfer parameter infinity becomes equal to zero that means for zero input it can have any output possible any finite output possible. So this is the characteristic of ideal op amp there should be no limit on either side now how to realize this ideal op amp is an ideal amplifier we have already seen ideal amplifier in our lecture on 2 port network and the parameter of the active devices possible. So there we had seen that the imitance matrix of such an ideal amplifier is zero self imitance zero reverse transfer parameter zero output imitance only PF is finite that is the parameter which transfers input variable to output okay by a factor PF the model to model an ideal op amp we require at the input an element now suppose for finite output okay for finite output we can therefore say output finite then divided by PF is the input independent variable which we have a same it can be voltage or current. So that when PF goes to infinity tends to infinity this goes to zero that means one input variable is already finite and has zero value the other input which gets transferred to the output okay that also goes to zero that means both voltage and current at the input become equal to zero such a situation exist because of PF the transfer parameter going to infinity. So an input network element therefore has to be defined that does not draw any current because II is zero and has zero voltage across it is the element that gets evolved because of this definition okay and that is called in a later it gets evolved because of the assumption that PF okay for finite output is tending towards infinity. So the second variable okay that is the input variable goes to zero as the first variable at the input is already zero so if VI is already zero that means it is an open circuit okay VI is an zero means short circuit II zero means open circuit so if VI is already zero it is a short circuit at the input current control then this current gets transferred to the output as voltage or current for finite output voltage or current if the transfer parameter goes to infinity VI also that is II also goes to zero. So both VI and II is zero is called a null late element and it is represented okay as this symbol this exists because of the transfer parameter going to infinity for finite output. So at the output a network element that is a source that is neither a voltage source nor a current source that can provide any current demanded by the load and can develop any voltage across the load known as norator okay which must exist symbol for the norator is just this neither a voltage source nor a current source this is an important definition at this point defining an active device a null later along with this companion norator is termed as nuller every null later has to have a companion norator null later norator always occur in physically realizable networks in pairs. So let us consider this now we have the symbol for the op amp as let us say differential input and differential output indicating that it can exit as a floating element anywhere in a network okay. So ideal op amp is represented okay by a null later at the input and a norator at the output this way indicating its ability to sustain finite output voltage and output current for any load. So VI is zero II is zero V naught and I naught being finite this is a differential input differential output op amp which ideally represents this null later norator pair this is the symbol for the op amp that is indicated that is the simplest macro model for the op amp this is differential input and if you ground one of the norator terminals then it is a single ended output that is normally indicated as the norator exists between this output and the ground this is the commercially normally available op amp single input single output single ended input single ended output both at the input and the output is a common ground okay that means this becomes a three terminal device null later norator. So such a three terminal device it may be grounded or may not be grounded but that must be a common terminal between input and output. Then it is this single ended input single ended output op amp. Let us use this powerful concept to synthesize lot of applications that we had defined in our two port network theory class regarding amplifiers. Let us therefore try to realize ideal amplifiers using ideal op amp synthesis this is first example is to synthesize an ideal voltage control voltage source of gain one which is normally called a voltage buffer which is introduced between source and load so that the source voltage simply appears at the load and it can load can take any amount of power from the VCVS or voltage buffer. So such a voltage buffer can be designed using a null later norator pair for an input with source resistance of RS and load resistance of RS. An ideal VCVS voltage buffer is represented by its G matrix this we already have understood 0000 it is voltage control voltage source with no feedback and its gain is exactly equal to one. For the synthesized network to represent an ideal voltage control voltage source now what should happen let us understand this. The input is voltage control that means it does not draw any current from the source should not draw any current from the source the terminal voltage will be the same as the source voltage okay if it does not draw any current this voltage should be transferred to the output without any change this can be done by a series null later always when it is voltage control null later should come in series whatever be the application that you are putting if the input is voltage control there should be a series null later. At the output a norator has to be connected across the load to deliver any current since we have already transferred the voltage of the source to the output across the load in order to supply any current demanded by the load okay we have to have a norator across the load. So the topology is very clear we have the voltage source with source resistance and null later comes in series with the source resistance so as to prevent any current how about this voltage VI gets transferred at this V naught as equal to VI and VI is equal to VS because there is no current through RS. So we have this now this becoming equal to VS because there is no current in this so output voltage is same as source voltage no loading us occurred of the source and output voltage becomes equal to VS and any current that is required by the load is delivered by the norator. So we have synthesized a buffer stage using null later norator. Second example let us see we would like to have gain of K greater than 1. So synthesize an ideal voltage control voltage source of gain K greater than 1 that is the problem using null later norator pair for an input with source resistance of RS and load resistance of RS. An ideal voltage control voltage source is represented by the G matrix and it is again 0 0 0 K being greater than 1 that is what we have to synthesize for the synthesized network to represent an ideal voltage control voltage source again we have input being voltage control a series null later so we will go ahead with the synthesis. So we have the null later coming in series and we have to introduce R1 so that this voltage VI gets converted to a current of VI by R1. Now this current cannot flow through the null later so it has to flow somewhere in this path and in that path in series with this voltage VI we will put a resistance so that output voltage is boosted up since this current flows through this this current is also VI by R1 and the drop across this resistance R2 is VI by R1 into R2 with the result in fact we have the drop across this which is VI by R1 into R2. So this is already equal to VI so the net voltage V naught which is occurring at between these two terminals is 1 plus R2 over R1 by VI okay. Now any current to the load can be delivered by the same concept the narrator coming in shunt with the load. So if it is a voltage control voltage source null later should come in series nor later should come in shunt at the output so that is very clear. So on the output voltage has been boosted up by a factor of 1 plus R2 over R1 which is the gain of the stage third example let us take. To synthesize the dual of voltage control voltage source okay of gain 1 here current control current source of gain 1 or current buffer using null later nor later pair for the input with the source resistance of RS and load resistance of RS. So the H matrix that is to be realized again from our two put network theory 0 0 0 0 H I 0 H naught okay because it is a current source it is current input short circuit so 0 feedback and minus 1 is the transfer of current from input to output for the synthesized network to represent an ideal current control current source the input is current controlled there should be 0 voltage drop at the input that can be maintained by a shunt null later at the input so it maintains 0 voltage drop and any current that is input has to be passing through the other terminal we can therefore see this so IS okay since there is 0 voltage maintained by the null later in shunt this current IS will simply flow through this because there is no current permitted to flow through this because there is 0 voltage maintained by the null later so IS is equal to II because of this factor this is 0 volts okay. So no current through this and then this II is also going to be the same as this because this does not draw any current so we have got through the load if you want to develop through the load any voltage that should be a narrator in series. So if it is a current source at the output narrators will always come in series okay if it is a voltage source narrator will come in shunt similarly if it is voltage controlled null later will come in series if it is current controlled null later will come in shunt so this is the method of synthesis. So we have got a current buffer whose gain is minus 1 because current is going out when the current is coming in here example 4. Now let us synthesize like we did in the case of voltage control voltage source an amplifier with gain greater than 1 current amplifier with gain greater than 1. So the procedure is here since it is current controlled and voltage across the input is 0 a null later in shunt maintains the voltage across the input 0 once this is 0 nothing is drawn here so II is equal to IS same current flows through this and this does not draw any current therefore this current also is equal to IS. So this current is made to develop a drop across this R1 a voltage drop of IS into R1. So IS into R1 gets developed across this and this potential is same as this potential because it is 0 so the voltage across this resistance which is coming at this same node so that the current can add is going to be the voltage since it is IS into R1 IS into R1 okay that divided by R2 is the current through this these two currents add because they are coming in shunt so that gets added to the input current II so II plus II into R1 by R2 II being equal to IS so output current therefore is equal to source current into 1 plus R1 by R2. So we have designed an amplifier current amplifier with gain K equal to minus R1 by R2 gain greater than 1 so say routine procedure which is going to help you in synthesizing it from the basics right. So we have designed an ideal current amplifier with a gain of 1 plus R1 by R2 with negative sign let us consider the fifth example. So we have designed ideal voltage amplifiers and current amplifiers two of the basic amplifiers the other two being trans conductance amplifier and trans resistance amplifier let us see how we can synthesize it. Synthesize an ideal voltage control current source okay with a trans conductance equal to GF so the ideal Y matrix YI is equal to 0 YR is equal to 0 Y0 is equal to 0 YF is equal to GF has to be realized it is voltage controlled at the input and current source at the output which immediately tells us that since it is voltage controlled nullator should come in series and since it is current source norator should come in shunt at the output. If you now transfer this voltage VI this VI is same as VS because there is no current okay this VI is equal to VS so the current in this is VS into GF and this current will flow through this norator so this is nothing but VS into GF and to develop any voltage across this it should come in series load. So it develops any voltage that is demanded by the load when this current is flowing so we have the voltage developed across the load but that is of no consequence we have already transferred the current of GF into VS to the output so output is going to be GF into ES so it is a trans conductor the deal of this is a trans resistor let us see how trans so it has to have an ideal Z matrix 0000 – RF okay let us see how this can be realized it is a current control voltage source current control means we have to have the nullator coming in shunt at the input voltage source means norator should also come in shunt at the output. So we have the current source feeding it with shunt impedance RS now the voltage is maintained as 0 across the nullator coming in shunt so this is 0 no current is drawn by this and no current is drawn by this by definition so this current II equal to IS will flow through this as IS so and this develops a voltage across this plus here and minus here as RF into IS and this voltage being 0 the voltage across this is going to be this way plus here and minus of this and that is equal to RF into IS that means V naught if it is defined as this okay it is going to be same as minus RF into IS so we have got a trans resistor of minus RF generated because of this so now actually we can couple this together this is what we had mentioned in the 2 power theory class this is a basic trans conductor cascaded to a trans resistor which we have just now synthesized this trans conductor this is a trans conductor this is a trans resistor coupled together we get a voltage controlled voltage source of gain RF into GF so we do not have to go through the other method of synthesis we can as well synthesized trans conductors and trans resistors and get voltage amplifiers and current amplifiers ideal ones this way this is illustrating how it can realize a current amplifier by cascading the current controlled voltage source with voltage controlled current source both of transfer function RF and GF so the current gain K becomes RF into GF with negative sign okay so one can cascade the trans resistance amplifier with trans conductance to get a current amplifier as shown you can see how easy it is to design all the 4 ideal amplifiers using this concept of the later and no later. Now another important thing is the op amp realized by making P of going to infinity means that op amp model can be created by making the transfer parameter go to infinity starting from either voltage amplifier or current amplifier or trans conductance amplifier or trans resistance amplifier which means all the op amps that get realized by going through one of the 4 ideal amplifiers will be looking the same ultimately with VI equal to 0 II equal to 0 and V naught and I naught becoming finite okay with infinite transfer from input to output this is what happens and therefore we can for simulation purposes use the model of op amp which is a voltage amplifier with very high gain with gain going to very high value or current amplifier whose current gain is going to high value let us therefore illustrate some of these simulations using only this because we are used to voltage amplifiers so we can use this concept for simulating op amp okay in a simple manner with voltage gain going to say 10000 or 1000 okay and get all these ideal near ideal amplifiers synthesize okay. So commercial op amps are available in fact the first few op amps were realized as trans conductance amplifiers okay and then voltage amplifiers these are not all that popular these two are pretty popular in the commercial game of ICs being made available now we go to an important part of differential operation now what is this differential operation we would like to have a differential input that means if you apply V1 to one terminal of the input of the amplifier and V2 to the other then this amplifier only should amplify V1 – V2 normally any practical device will have a transfer from one node to the other output and another node to the output in such a manner that V naught is a function of neither V1 and V2 which is normally called an offset okay it is independent of V1 and V2 this is called the DC offset then a linear dependence on V1 alone a linear dependence on V2 ideally amplifier should have a linear dependence and plus the non-linear function of V1 and V2 that means V1 square V2 square okay and then V1 square V2 V2 square V1 and all those combinations these are the non-linear combinations possible okay and that non-linearity should be as low as possible by operating the device properly this can be reduced considerably and this is what can be achieved in a symmetric network we will show that K1 and K2 are related by this K1 is equal to – K2 that means it is a differential amplifier it has no common mode transfer that is technically it rejects the common mode signal so what is this common mode so any signal current or voltage okay V1 can be written as V1 okay plus V2 by 2 this is common to both V1 and V2 okay plus V1 – V2 by 2 so this gets cancelled so it becomes V1 then V2 can be written any V2 can be written as again V1 plus V2 by 2 you can see that this is common to this this is called the common mode signal plus now it is not plus it is going to be – V1 – V2 by 2 so that means actually V1 is equal to V common mode plus V differential V differential is V1 – V2 by 2 and V2 is equal to the same VC okay – VD by 2 a symmetric network does not respond to the common mode a symmetric network only responds to V1 – V2 so this K1 into V1 can be put down as this this is the V1 and V2 is represented as this so this is the way so what happens if there is a symmetric is that the common mode gain okay if it is symmetric K1 is equal to – K2 will make this common mode gain go to 0 and the differential mode gain K1 – K2 okay equal to K will make this 2K by 2 which is K differential mode gain alone will be K so this will be equal to K so the common mode rejection ratio of such a net that is capable of rejecting the common mode so this is a very useful concept in improving signal to noise ratio at the input so that means this subtraction of voltages V1 and V2 which is possible okay in a differential mode operation is improving the signal to the noise ratio if common mode appears as noise and differential mode appears as signal okay so since in integrated circuit particularly it is pretty easy to get symmetry so the symmetry of a network is facilitating rejection of noise and acceptance of signal and that is why the common mode rejection ratio of a symmetric network okay ideally is infinity if there is some amount of mismatch it will be finite okay so that is due to the asymmetric factor and therefore AD by AC is pretty high and this has been capitalized in design of every IC that you can think of for analog signal processing the most important concept in analog signal processing has to do with symmetric network and by just layout the symmetry can be improved by an order of magnitude and therefore it is an important thing that you should have a front end which is absolutely symmetric in all aspects okay then you will have an excellent common mode rejection ratio achieved at the input so practical op-amps therefore have lot of non idealities associated with it right first of all right we can just see this is the characteristic of the practical op-amp obviously it has to be biased in order to operate the active device in the proper region and therefore it requires let us say dual supply in order that the output can go positive as well as negative the maximum output is now limited by these two regions these are called saturating regions of the op-amp if the supply voltage is plus vs and minus vs this is going to work as an active device all the way up to the output equal to plus vs and minus vs this is called rail to rail operation so by proper design this can be very nearly achieved again it may not go through the zero that is for zero input V1 and V2 output has to be zero but that is normally not the case because of again asymmetry in the active devices so there is what is called an offset voltage coming into this is a voltage offset that comes okay now the gain is not infinity if it is infinity it will be vertical slope will be vertical and that we had already seen in the ideal op-amp there will be a finite slope the slope is equal to A naught delta V naught by delta VI right is roughly equal to A naught at around the operating point if it is this if you are operating around this point okay at the output if it is zero you can get equal thing if it is not zero the the output swing will be equal okay only if you have the input trading over the offset okay so now this particular amplifier which is non-ideal has finite gain these gains are normally this DC gain this is the static characteristic this gain is of the order of may be anywhere from 10 power 3 to 10 power 6 okay so it is pretty high so if you consider this as some plus 10 volts and minus 10 volts if it is something like 20 volts difference with the gain of 10 to power 6 the order of voltage at the input over which it is active is about 20 micro volts or less so you can normally consider that when the device output is such that it is within these two limits it is in the active region and the input voltage is very nearly equal to zero so this is the approach that we take in analyzing and synthesizing most of the op amp circuits op amp is a network element which is to be embedded okay inside a network so that output is connected to the input this is important in all the synthesis things we have seen that output is connected to the input so that for a finite output input of the op amp both input voltage and input current are going to zero so finite gain ranging from 10 to power 3 to 10 to power 6 of the order of 60 decibels to 120 decibels common mode rejection ratio is of the order of 70 to 120 decibels several independent parasitic capacitance associated with the internal nodes result in the gain fall off okay at 20 decibels per decade for each time constant associated with the system. So the gain transfer function of an op amp typically okay is something like this A naught divided by what is called 1 plus S by Omega P1 first pole 1 plus S by Omega P2 second pole this is at a lower frequency than this and the third one may be something like this 1 plus S by Omega P3 Omega P1 less than Omega P2 less than Omega P these are called the corner frequencies the magnitude reduces by 3 dB at the first corner frequency if these two are not influencing okay and the phase shift is about 45 degrees when this becomes J right at Omega equal to Omega P1 if these two are much higher than Omega 1 then if this has contributed first to 90 degrees as the frequency keeps on increasing and this starts happening at Omega equal to Omega P2 the second pole comes in picture and gives additional 45 degrees so 135 could be the thing if this is not influencing at that time then once this also starts influencing the phase shift okay these two contribute to 90, 90, 180 and this will give its 45 okay so this way the phase shift keeps on changing okay to higher and higher level so ultimately all the three things can contribute to 90 degrees and resulting in 270 degrees okay at very high frequencies so but this is an approximation okay so depending upon the number of poles here there will be 20 decibels per decade for each pole for the typical 3 corner frequency response you can see that the magnitude from 120 decibels if A0 is 10 for 6 it is 120 decibels keeps on falling first at 20 decibels per decade then at 40 then at 60 decibels per decade and the phase shift changes from 0 all the way up to 270 degrees. So mismatches at the inputs cause input offset voltage as already illustrated in the graph this is going to be of the order of few millivolts to few tens of millivolts okay depending upon whether it is bipolar or MOS and the input offset current in the case of bipolar in the case of MOS it is nearly 0 so this will be of the order of nano amperes if it is an op amp made of voltage amplifiers input impedance can be of the order of few mega ohms in the case of bipolar and the effect hundreds of mega ohms okay. Output impedance can be few hundreds of ohms output current of majority of the amp amperes limited okay to some typically 20 milli amperes also. Now what are the other parameters of importance the maximum rate of change of output that is limited by the capacitor that is dominant okay. So there is output of an op amp cannot rise at a rate faster than what is called slew rate. So many volts per microseconds typically 1 volt per microsecond is the value 1 to 10 volts per microsecond because of the limited DC current available that can charge the capacitor at the output as op amps are protected again short circuit at the output it limits the output current to 20 to 50 milli amp so it is in terms of volts per microseconds 1 to 20 micro 20 volts per microsecond. Op amps are characterized by gain bandwidth product this is an important parameter associated with op amp I would say the first important parameter which tells us the quality of the op amp is gain into bandwidth not just the gain not just the bandwidth it is the gain bandwidth product that becomes important in the dynamic operation of the op amp. So static characteristic is not all that important it is the dynamic characteristic that is important when both gain and bandwidth come in the picture as gain bandwidth product. So the quality of an active device is always defined by the gain bandwidth product even if it is a transistor that is used as an active device. The gain bandwidth product a parameter that is used extensively in designing op amps with circuits is the most important parameter that will let us see and study the effect of this on the performance of the op amp circuits. This typically for general purpose op amps 1 to 20 megahertz TL081C is an operational amplifier introduced by Texas instruments cost about 0.2 dollars and it is a popular op amp like 747 or 741 LF356 similar to LF356 fat input and it is characteristics and parameters important parameters are given here. You can see I would highlight the most important parameters it can work in this supply voltage range and gain bandwidth product is about 3 megahertz and slew rate is 13 volts per microsecond common mode rejection ratio 70 decibels and input offset voltage about 20 millivolts okay output resistance 200 ohms and these are the other secondary non idealities. Important ones are the gain bandwidth product and the slew rate. This is a precision op amp okay you can see the slew rate is much higher and you can see input offset voltage is much lower than the other one. So it is useful for low frequency biomedical applications etc. This is a high speed op amp you can see the gain bandwidth product actually gain is 2 at that time bandwidth is about 140 megahertz. So the gain bandwidth product is very very high this is a trans conductance amplifier you can see the value of trans conductance being pretty high 95 milli siemens and the bandwidth for a gain of 5 is about 80 megahertz. Now we will consider simulation here we are simulating let us say voltage controlled voltage source is here so I have put a gain of 10,000 here okay this gain is about 10,000 and I have now connected R3 here and R2 this is actually our R1 and R2 kind of thing. So this is resulting in this voltage getting transferred to this this voltage input voltage comes here okay and actually I think we can this is this voltage comes here and the current in this is V1 divided by R2 and the same current flows through this develops a voltage which is 9 times V1 by R2 which is 1K so 9 times VS is developed here this is already VS so 10 times VS occurs here. So we have designed a voltage control voltage source with gain equal to 10. So that can be simulated run this and you can see this is the output this is the input it is exactly 10 times input which is 1 volt. So we have designed a simple voltage controlled voltage source with gain equal to 10 exactly by using a voltage controlled voltage source type of op amp with a gain of 10,000 and it is totally independent of the factor 10,000 as long as it is 10,000 or 20,000 or 50,000 does not matter this reproduction occurs exactly. Next turn is this is the voltage controlled voltage source. So now it is the second circuit I am trying to realize using the same voltage controlled voltage source with gain of 10,000 I am now realizing a current amplifier see the same op amp with same characteristic is being used okay for obtaining a current control current source. So this is a voltage control voltage source with gain 10,000 and putting it in series so what happens here is that input current okay the input voltage is maintained zero so the input current is same as the current flowing in this okay and this develops a voltage of IS into 9K and that divided by 1K is going to be 9 times the IS is going to get added to this IS so we will have 10 times IS flowing through this. Now we will plot the transient again it will be run and you can see here that output current divided by input current okay I naught by IS is also equal to 10 but there is a phase shift of 180 degree indicating it is minus 10. So we have designed exact current control current source or an ideal one amplifier with gain equal to 10. So simulation is very simple the macro model that is used is the same it is a voltage control voltage source with gain equal to 10,000 which acts as my basic op amp we can realize an ideal current control current source or an ideal voltage control voltage source with gain equal to 10. So summarizing we have discussed in this course in this lecture how to synthesize all the four ideal op amps with the concept of nullator norator for the op amp that is VI equal to 0, II equal to 0 output is finite voltage finite current and you can have a macro model for the op amp as a current amplifier with large gain or a voltage amplifier with large gain current control current source or a voltage control voltage source and we had taken voltage control voltage source to synthesize to op amps voltage and current amplifiers then we have synthesize trans conductors ideal and trans resistors coupling these trans conductors together trans conductor with trans resistor or trans resistor with trans conductor we can realize voltage and current amplifiers.