 Hi, I'm Jeff Halvick, Product Marketing for ST Microelectronics Power Discrete Products. I'm here to introduce an exciting new evaluation board platform for power factor correction, taking advantage of ST's latest technology and high-power SCRs for in-rush current limited and silicon carbide MOSFETs that enable the bridgeless totem pole topology. Briefly our agenda. First, I'll introduce the demo board and its key performances. Second, I'll describe the totem pole PFC topology and the power discrete that enable its performance. Then I'll look at how to best implement in-rush current limiting in an intelligent way. Then wrap up taking a look at some measurements of the ST demo board solution. The ST EVAL DPST PFC1 is a 3.6 kilowatt totem pole PFC demonstration board utilizing the latest in high-temperature SCRs for in-rush current limiting. And it also implements ST's second-generation silicon carbide MOSFETs in the bridgeless PFC topology. These are controlled by an STM32 microcontroller and driven by ST's isolated driver technology, the ST GAP. A small integrated power supply controller, the Viper 26LD, completes the design for auxiliary power. The board demonstrates the benefits of the bridgeless totem pole PFC in smart current limiting, namely very low THD and incredibly high efficiency due to eliminating the losses of the standard diode rectifying bridge. The solution is compliant to multiple IEC standards for AC to DC converters and will be available through distribution channels by the end of Q2 2020. The main benefit of the totem pole topology is to eliminate the losses associated with typical full-bridge diode rectifier front ends for AC to DC power supplies. The low RDS on high voltage blocking ability and a rugged body diode of silicon carbide MOSFETs in the high frequency leg of the PFC are key to unlocking the performance of this topology. However, due to typically large bulk capacitance at the output of the PFC at the conductive path through the power switches, there's a need to limit the surge of current into the PFC when the power train is first connected to the line or after recovering from a line dropout situation. Let's take a look at our options for power switches in the low frequency leg of the totem pole to derive a smart solution. If we choose to implement current limiting with an MPC and bypass relay, we can use either diodes for the low frequency leg, which is often the most cost-effective design, or opt to use MOSFETs, often selecting carbide MOSFETs, to get peak performance. But another option remains that will completely eliminate the need for an MPC and relay, using SCRs to control the low frequency leg. In fact, using SCRs for inrush current limiting is an area of expertise for ST. We have four different methods depending on the power level needed or desired performance. Varying from series triad control, bypassed NTC with two SCRs, an SCR mixed bridge, or the low frequency SCR totem pole leg for the bridgeless PFC. Demo boards are available for each as seen here. The premise of SCR-based inrush current limiting is pretty simple. The SCR will act like a diode, but with the advantage that we can intelligently control the gate to keep it off until we're ready to let a small amount of energy through to the bulk capacitance. Then the AC cycle returns to zero, and the SCR shuts itself off until we trigger it again the next half-line cycle. By shortening the turn-on delay, we gradually pass more of the line cycle through to the output until we're at steady state. This is an easy algorithm to implement with a simple microcontroller. The complete solution will be ready this summer. It comprises the power board, STE valve, DPST TFC 1, with an STM32-enabled control board, the DPS334M1, and an evaluation adapter board for ease of debugging, the DPSA DP01. As you can see, the startup is quite smooth. The inrush current limitation keeps peak current manageable, and the soft start time can be fully programmed by the STM32. We've obtained peak efficiencies of more than 97.5% at 2 kW of output power, and a peak output of more than 3.5 kW. Even down to less than 20% of full-rated load current is still achieving some 15% total harmonic distortion. To recap, the 3.6 kW totem pole PSC demo board allows the engineer to evaluate the benefits of this bridgeless topology. A full solution is provided that can be easily connected to a DC-to-DC stage The ST solution incorporates many key ST technologies, including high-temperature SCRs, silicon carbide MOSFETs, isolated gate drivers, and the STM32 with embedded TFC control algorithm. The benefits of such a solution are many, low EMI, immunity to transient and surges, high efficiency, low THD, robust performance and simplicity of the build materials, includes the removal of ADNTC relays for inrush current limiting as well. Thank you for listening. For more information on these solutions, please visit our website at www.st.com.