 Hello, and welcome to this presentation of the STM32 General Purpose I.O. interface. It covers the general purpose input and output interface and how it allows connectivity to the environment around the STM32 and microcontroller. The general purpose I.O. pins of STM32 products provide an interface with the external environment. This configurable interface is used by the MCU as well as other embedded peripherals to interface with both digital and analog signals. Application benefits include a wide range of supported I.O. supply voltages as well as the ability to externally wake up the MCU from low power modes. The general purpose I.O. ports provide bi-directional operation according to the input memory map. I.O. ports are directly connected to the AHB bus. This allows fast I.O. pin operations such as toggling and output with an independent configuration for each I.O. pin. They are shared across six ports named GPIOA to GPIOE and GPIOH, each of them hosting up to 16 I.O. pins. After reset, all GPIOs are set in analog mode to reduce power consumption. I.O. ports support atomic bit set and bit reset operations through the BSSRR and BRR registers. This allows I.O. toggling every two clock cycles. Most of the I.O. pins are 5 volt tolerant when supplied from a VDD above 1.62 volts. Up to three I.O. pins are supplied by externally providing a voltage within the VDD USB supply domain. This supplies independent of the VDD provided to the MCU. This functionality allows users to adapt logic levels of the MCU's I.O. pins to the levels required by external logic which may be supplied by different voltage domains without the need for external level shifters. General purpose I.O. pins can be configured for use in several operating modes. An I.O. pin can be configured in an input mode with floating input, input mode with an internal pull-up or pull-down resistor or as an analog input. An I.O. pin can also be configured in an output mode with a push-pull output or an open-drain output with an internal pull-up or pull-down resistor. For each I.O. pin, the slew rate speed can be selected from four ranges for the best compromise between maximum speed and emissions from the I.O. switching and to adjust the application's EMI performance. I.O. pins are also used by other embedded peripherals to interface with the external environment. Alternate function registers are used to select the configuration for the peripherals in this case. The configuration of the I.O. ports can be locked to increase robustness of the application. Once the configuration is locked by applying the correct write sequence to the lock register, the I.O. pin's configuration cannot be modified until the next reset. Several integrated peripherals, such as the use art, timers, SPI and others, share the same I.O. pins in order to interface with the external environment. Peripherals are configured through an alternate function multiplexer which ensures that only one peripheral is connected to an I.O. pin at a single time. Of course, this selection can be changed while the application is running through the GPIOX, AFRL and AFRH registers. The independent VDD-USB supply domain allows operation in an environment with several different logic supply voltages. It allows the STM32 to communicate with different logic supplies. Up to three I.O. pins in this domain can be used to communicate with other logic circuits. For instance, USB, which are supplied by voltage rails other than VDD. The use of independent voltage supplies may eliminate the need for external voltage shifters in the design. During and after reset, the alternate functions are not active. Only debug pins remain active in AF mode. JTAG SWD debug pins remaining in AF configuration mode are listed on this slide. When the external oscillator is switched off, pins related to this oscillator can be used as standard I.O. pins. This is the default state after a device reset. When the external clock source is used instead of a crystal oscillator, only the OSC32 in-pin is used for the clock and the OSC32 out-pin can be used as a standard I.O. pin. The STM32WB high-speed oscillator pins are dedicated to the OSC in and OSC out functions and have no standard I.O. function. A new multi-supply scheme of I.O. pins brings new I.O. pin structures. Previously used naming FTTT has been extended by abbreviation suffixes to highlight alternate supply sources for each FT and TTIO pin. Previously used name FTF for FM plus capable pins has been transformed to FT underscore F. The new underscore L suffix has been added to mark pins supplied through LCD supply, suffix underscore A marks pins supplied by analog supply, suffix underscore U is used for pins supplied from USB supply, and suffix underscore S now clearly identifies pins within the independent VDDIO2 supply domain. The absolute maximum rating for each I.O. pin is defined by the lowest voltage of the supplies listed for each I.O. pin. I.O. pins remain active in all modes except standby and shutdown, where the only available configuration is input with internal pull-up, pull-down resistor, or floating input. When exiting shutdown mode, the I.O. configuration is lost. When the MCU is under reset, I.O. pins are forced into an analog input mode.