 Let us do a high frequency response or actually frequency response high is only a word we may also like to see the lower frequency response also we will like to why I use higher frequency essentially is the capacitance related that is why word use high but need not worry high means really 10 hertz is also higher than a DC okay. Another thing we are other day showed you that there is a low frequency there is a mid band and there is a high frequency regions in normal amplifiers you are done already in experiment in what is it called opam you must have observed there that there is a gain even at 0 that is DC is that correct there is a because opam can amplify even DC okay. So there is nothing called lower cutoff in opams is that clear there is no lower cut off in open and you get the point the response of an opam if you see carefully it always looks something like this gain in DB versus say this is like this that means since it is a DC amplification is done in opam this is true whereas in any AC coupled amplifier which we shown here there are capacitors and says which will always give you a band high pass low pass property and therefore there will be a lower cutoff as well as there will be and higher cutoff so a frequency other day I showed you if I see a response of this gain versus omega radian frequencies so you will have something like this this frequency we call mid band where gain is constant somewhere like and this we call AV 0 this essentially 0 does not mean 0 frequency okay sometime it is also called DC gain okay so please remember in this amplifier when I say it is a DC gain it does not mean 0 frequency gain this is why I am trying to say word again when I in a normal AC couple amplifiers when I say DC gain I mean mid band gain is that correct it does not essentially say that it is a 0 frequency what essentially we are saying remove all capacitances for solutions that we call the mid band is that correct this is an issue which must be modified when we go to opams in opam there is a 0 frequency gain also possible is that clear so please do not confuse many times this DC gain of an opam and DC gain here are not identical terms is that clear here essentially I means capacitance removed whatever resistive kind of thing gives me load that I will call DC or AV 0 is that clear this is my definition not in the sense my mean this is what most circuit people believe in the case of analog and therefore we will follow that terminology okay then we will say okay the 3db point somewhere here if you see this I will call Omega L which is the lower cutoff and somewhere here I will call Omega H as the higher cutoff and we will declare the band width is Omega H in of course variance to divide by 2 pi you will get in frequency hertz so that is the mid band the bandwidth is defined where the mid band gain occurs is that correct the definition of bandwidth for is is the play is the frequency band in which mid band gain is constant that for we say it is mid band is that that is the definition we will use in all our analysis side this is my way of telling because some day you know you read books and you find suddenly they change terminologies in mass to bipolar they change and from I had to I had also they keep changing so I just wanted to clarify what I meant when I wrote something is that okay this is a definition and nothing great about you may call this FL and this FH does not matter as long as you get this frequency man okay this is a only a nomenclature systems which many years we have been using so believes okay having drawn that figure I can make a equivalent circuit of this I have a input source which is AC signal small signal this is the source impedance R signal then there is a RG which is the bias resistance which may be due to the RG1 RG2 parallel combinations then of course this may be taken to VSS for this is drawn for AC so all power DC term in terminals in into ground so this is grounded then there is a capacitance CGS which is due to the gate to source capacitance then there is a capacitance which is this how much is CGS normally typically Seox into W into L is that correct Seox into W into L is CGS it can be 2 3rd if it is in saturation it will be full Seox if it is a non-saturated depends normal cases one may use Seox but normally in our analysis I will give a value how much is CGS this is the gate to drain capacitance and what is this related to in real transistor the overlap capacitance between gate to drain is CGD so there I said you know when in saturation there is no CGD no it is actually overlap capacitance always exist okay so whatever is W into overlap into Seox will be the CGDs this value also will specify then there is a current source due to amplifiers GM VGS downwards because it is opposed to the same 180 phase out then your R0 is the output resistance RD is the resistance to the drain and RL is the actual load externally put okay and we call this net load as parallel combination of R0 RD RL which is RL dash okay I am right now trying to really look for the cutoffs okay and I am more interested to see the higher cutoff first so for higher cutoffs we will show you the other problems this call 0 value method to get FL and FH separately so I will show you what essential right now I am looking for dominant poles okay on the upper side because the please remember okay I should have clarified this normally his viewpoint is very good so I must clarify typically this WL value will be order of tens of hertz typically I am not saying every time depends on the value of time constant R and C values it may be different but maybe not more than 100 hertz they need okay it will be less than 100 hertz WH will be in 10s and 100s of kilohertz or the megahertz okay so you can see 10 to power 6 minus 0.00 or the other 10 1000 K minus 10 hertz 100 hertz is almost as 100 kilohertz is that correct so the number wise this number actually is very small and we are interested in the other side I may like to find where is it which I will evaluate then but right now I will only look for higher frequency side where is the cutoff is that clear so I am now I am not saying what I said otherwise but this is the fact which I am right now so okay so what he is saying I have neglected CC1 CC2 these are called coupling capacitance and this is called bypass capacitance this is for the bias purposes this is for coupling AC and DC so we remove right now CC1 CC2 and yes in my circuit and last time I did say you these are the capacitance series which frequencies they attack the low frequency so we will actually find using them where is the lower is that correct for the higher cutoff side 1 upon j omega CC is small enough short circuits this is large enough opens we just removed them is that clear this is what essentially we say high frequency response we remove both this side CC1 is typically 1 micro farad to 5 micro farad at higher frequencies okay kilo hertz and above this is short circuit right now it is connected to ground there is so common emitter common source source is grounded through VSS okay so if we now say DC gain what is the word I already defined DC gains means remove all capacitances and find the gain so I remove CGA CGD and I get this circuit which is our signal RG GM VGS R0 RDR dash where as I say RL dash I may also neglect at times RG is much larger than our signal and since they are in series I may as well neglect RS in terms of RG otherwise VGS is how much RG upon RG plus R signal into VN but let us say I can even neglect that but right now I am keeping you to show it so in numbers sometimes you may see the number large you can neglect that and get away okay so what is AV dash 0 we will call it gain of this amplifier transfer yes call it this 0 without capacitance how much it will be this GM times this okay GM times this into RG upon RG plus RS okay RG upon RG plus RS this is because of VGS is ratio of RG and RS to V in is that correct this is V0 by V in into GM sorry minus sign into RL dash is that okay this is the DC gain is that okay DC gain is GM RL so actually if you see RG is larger than this it is nothing but GM RL minus GM RL is that correct and RL is parallel combination of this R0 is normally very high so it is parallel combination of RDN or typically both are 5 kilo ohms or 10 kilo ohms this will be GM times 5 kilo ohms or something because R0 will be in order of mega ohms okay R0 will be order of mega ohms is that clear so you can always get so called DC gain or mid band gain by just solving a simple circuit without any worry on that okay okay this is the mid band gain I want to find how long this mid band gain remains in this case when I say constant gain so this frequency gain at those frequencies where none of the capacitances are dominating the my output is essentially called the mid band this value essentially means no effect of CGS no effect of CD no effect of CC 1 this is the gain maximum possible which remains constant for those frequency regions when all these capacitances can be neglected some way either open or short such that the gain comes out to be this is the mid band is that correct this is the DC word we are used mid band is the DC game please remember my DC and open DC is not same because I will come to it now we define yes that is called current gain this is not this is a voltage please remember unless stated otherwise we are talking of voltage gain as I told you there are four gains possible voltage by current voltage by voltage current by voltage current by current so unless specified we will specify its assumption is we are looking for voltage amplification why we say so because our input source is voltage signal we do not mind calling it trans conductance as well because if you leave the RL you have a current please take it if you lead the load you are only a current there at the output now this ratio of this current to the input signal is also a trans conductance gain that is essentially called capital GM why it is capital cost GM times VGS VGS you take from the input side the ratio of then I by V is essentially the trans conductance but if you multiply that with the load then it becomes the voltage is that correct so basically we are only looking right now voltage I am not saying we do not need any time the other gains this problem right now we are looking for voltage we define two terms okay one we call is omega 0 will just come to this num value which I am talking about okay okay let us come this latter okay so VGS is RG upon our signal being I think whatever I stated I will repeat V0 is – GM VGS RL dash so V0 by VGS a V dash 0 – GM RL dash then if I substitute VGS from here I can get AV0 as well okay now this issue is very interesting now look for I am now interested to see the effect of capacitances but still I am not interested in capacitance like CC1 CC2 and CSC or CS whatever it is I am only looking for now CGS and CGD why we are interested in these two because these are internal capacitances of the device I have no control the others I can change I can put five micro farads I can put 30 micro farads is that correct these are beyond me so I must know what are these doing inside okay so I see if you have a CGD like this coming from the output side this is AV VGS RL dash okay and if you see this is your input side this is your output side if I apply Miller's theorem what did I say that this will reflect into input how much gain 1 plus gain times magnitude times the capacitance will be reflected at the and how much will be reflected the output same value as CGD because A upon 1 plus A is same as 1 so if CGD will come at the output and 1 plus GM and the gain is 1 plus GM RL dash into CGD will reflect into input side so now I started looking for influence of capacitances okay the other side will be only CGD I am only looking for the input side okay I reflected at the input okay your answer is here this is CGS this is 1 plus GM RL CG dash a CGD this is your external on the output side only capacitance is CGD please remember externally if there is a or a CL you must also use CGD power plus CL as the net capacitance is in actual circuit you may also get a CL here okay so the net capacitance is this plus this so the pole position may change on this side depending on the actual capacity load if it occurs and where this not normally will occur whenever I will connect one amplifier output to the next amplifier input the CGS of that plus all this all of this will be now parallel with this CGD itself is that correct that will be the output side for the first stage is that point clear if I connect two amplifiers the input of the next stage will be now shown as the output of the first stage so that time you must not forget this right now it is a single stage I said no other external I am getting a theory I am getting a problems then in real life you must take actual values whatever they come okay I want to know what is the input impedance so you can see from here RG parallel 1 upon this total of course this is equivalent of that C equivalent J omega time C equivalent parallel RG is the Zn seen please remember Zn is seen after the source Zn is seen after the source do not connect RS into that calculation of Zn is that correct because voltage source is not mine this is device and other things are mine so I am trying to see what is the input resistance or impedance I am seeing into the gate of this transistor or gate of this amplifier input of this yeah yeah right actually there the assumption is that the DC gains are reflected okay the Miller theorem assumes the DC gain the your problem is if that is an AC gain then the reflection will be AC gain times that then there that will become very difficult to solve is that correct because you may transcend tell SS square term will start appearing so in real spice it does take care of that but in solving this is the easiest ways to solve use the DC gains that is why you first calculate the DC gains is that clear your point of view is well taken because that gain of an amplifier is not independent of frequency so it should also reflect in the input but that is what we are saying it is only DC gains which reflect okay okay yes this is CGD is reflected as gain times the CGD so yeah this is an admittance when this is one upon C is therefore the impedance see if it is a capacitive use do not calls it that is what that day I say use why if it is a resistive or inductive inductance use Z is that correct so this is a capacitance use why okay so the capacitance reflected is always multiply the capacitance by the gain value is that correct same way it will be for the inductance also but that time it will be Z times the gain will appear is that it will always be multiplied by the DC gain okay okay so if I calculate Z in I will get this so I will be able to evaluate Z in I already said Vgs is Z in upon Z in plus R signal times now what is the difference I did from the last case instead of leaving capacitance now I am using capacitances in calculations is that clear that is all that I am doing so Vgs is Z in upon Z in plus R signal times V in there it was what Rg upon so instead of Rg now it is a parallel combination of Rg and this additional Cgs plus this value C equal and okay haven't done this now I do I also calculate V0 V0 is GM Z0 how much is Z0 can anyone tell how much is Z0 if I see from here parallel combination of this is that clear but there is something more will appear 1 this is 1 plus RL dash Cgds this is the parallel combination with Z0 will see please say Z0 is seen here okay so the parallel combination of load and that capacity 1 upon C will be the Z0 well upon that of course because the capacitance yes I agree so you are perfectly right the way it is done since during the DC gain calculation we are use RL prime as with RL we are continuing it but you are perfectly right we should have gone leave the RL and only use RL double dash to calculate it these all values I think you have very good understanding I feel that I have transferred what I wanted the way we are calculating is to get roughly the value of 3 dB point now all that we will so when we start operating will never go close to 3 dB point we know you the game will start 3 dB down there so will be always before that is that so any over estimation or under estimation we will see that which one is lower and will use that as a marker let us say I get 100 MHz so I am not going to use 100 MHz in my any use it I will say okay use at least 50 or the rate as I say 50% so that you will never close to 3 dB point so these calculations though are not accurate but these are easier analytically done and I keep saying if you solve numerically all these values you need not worry because use give the circuit you give the notes it will always take care of everything automatically because it has it can solve numerically any number of steps it does not ask you anything but for us if we keep using that then it becomes longer and longer to evaluate is that correct there is nothing wrong what you said but the way we calculate to know where are we okay okay so I now get a AVS which is the gain of this amplifier with capacitances as GM RL dash upon RL dash CGS CG upon this so this is the net term I am going to get so how many poles you see here you look at look at it this is okay please remember what did I do I only calculated V0 in terms of this VGS I replace by this okay VGS I replace in terms of V in by this this is Z0 times GM RL dash this into this totally is my V0 V0 by V in is the actual high frequency gain okay how many poles you see how many poles you are seeing in this transfer function how many s 2 terms which are connected this s plus Omega 1 into s plus Omega 2 are you seeing 2 terms 1 on the bigger bracket 1 in the smaller bracket so there are 2 poles seen by you is that clear 2 poles in my you one related to this one related to this okay so one related to this and one related to this there are 2 poles available to you okay which one key where is a key here okay that was I call DC gain because you know that because there is no frequency term I use I thought since I am going to use AVS 0 tomorrow for 0 frequency here I wanted to separate DC from there if I write yeah you have a point if I write this essentially means 0 frequency okay so I wanted to separate that from my DC line so this is symbol please do not get a book may have another symbol I used only simplified it because I did not want to confuse yourself with this AV 0 with AV dash 0 this AV dash 0 is only related to GM RL whatever by input impedance input is so I wanted to make it little clear that this is DC value okay okay please remember if this frequency terms are available but we are saying frequency 0 is that clear frequency 0 you if I now write this 2 terms once again like this this is AV 0 upon this this I get S upon RL dash CGD S plus 1 upon sorry R in dash CQ the rest terms I calculated where R in dash is RG parallel R signal so this is high frequency gain is it okay this is the high frequency gain why I keep saying high frequency means I am not looking for lower cut-offs right now BC gain or mid band game till higher frequencies okay see AV 0 means at 0 frequency the frequency gain that may not be 0 till it may be minus DB's if you see your mid band function this may actually go something like this so at 0 frequency gain may be negative value okay but when I say AV 0 dash I call it this value DC is that clear as I said this is my Norman Clature if you are you read a book and they are another Norman Clature which you are reading you can use that as well my Norman Clatures are mine I do not actually I do read books I am not saying my own book at least I see these days but other than normally do not really look into books except for the numbers because if I give a numerical value I will choose from the book because they are accurate numbers but otherwise I really do not solve problems actually looking at the book so I am just telling you these my Norman Clatures are mine over the years I have developed so I use them so now if you see these two poles which I did we have two poles I define two frequencies Omega 0 and Omega 1 as R in CEQ and Omega 1 is RL dash CGD which are coming from the two terms which I just wrote then I get S plus Omega 0 plus S plus Omega 1 if I divided Omega 0 Omega 1 I can take that out and this will be my actual gain 1 upon S Omega 0 plus 1 why it is still giving you minus 20 dB can you tell me why it will be minus 20 dB down because S upon Omega 0 equal to something when I make S is j Omega S is j Omega by j Omega 0 magnitude where how much it will be Omega by Omega 0 square plus 1 under root of that that is 3 dB down when Omega is equal to Omega 0 but by phase wise this is minus sign going so it is going down by 20 dB per decade I am sorry 45 degree per decade is that clear so okay this S by Omega 0 SS j Omega j Omega by Omega 0 equal plus 1 so when I write Omega is equal to Omega 0 I am saying j Omega sorry 1 plus j is 0 is that correct so essentially I am saying minus 1 is that clear minus 1 which means operator is now showing it is a opposite sign signal going through is that correct so it will always be value will be reducing as Omega will start increasing beyond Omega 0 is that clear this is what I think okay all to say we are not done it but I suppose in your theory somewhere we say the all the poles are right now in the left half plane of Sigma j Omega axis minus all of them are in the minus axis or call left half plane I think if I go control part I think it will be too much but maybe I then I will give a talk on what is this root locus technique or what is this so-called Sigma j Omega planes just for your understanding that what is this stability word people are talking about okay okay now in this since you got two poles one for Omega 0 1 from Omega this whichever is dominant one can see from here whether this is higher or this is higher by typical values you will find and will to your surprise you will find say Omega 1 will be smaller than because this value will be larger than this so it this value will actually start dominating that correct this value will be start dominating however I cannot say always because depending on the values of CGD and all C equivalent I calculate whichever dominates will be the dominant which is dominant in the case which one will be called dominant if Omega 0 is less than Omega 1 Omega 0 is the dominant if Omega 1 is less than Omega 0 then Omega 1 is the dominant dominant means the pole where the gain really start dropping fast okay which is the first appearing the second will add another 20 db down but by then already we are gone now okay so the first pole is of interest where the gain starts falling is that clear so that is why you must evaluate which is the dominant pole we are interested in the mid band frequency where it starts dropping and that dropping word we are interested in this value from here it may actually go further second pole is that correct there will be a second pole so this is not a dominant pole dominant pole is the first where gain starts falling okay so we must evaluate which is the dominant pole okay okay so this is how we evaluate the FH or WH in the transfer function now something we missed in this I have already told you other day when I was talking about 0s and 1s sorry 0s and poles if there is a capacitance between the drain and the gate or any not even in any impedance there are two forward paths available which are the two paths I said one through the transistor and other through the capacitance or that to the output and if their phases since they are opposite in phase if their magnitude happens at a given frequency to be same then they will cancel and that is what we say it is 0 okay in this there was a CGD but I did not see any 0 in my transfer function is that clear I only got two poles okay one of them is dominant I figured out but I do not know whether this 0 so assumption here was something as if that 0 is existing much higher value than even the second let us say second pole occurred at 1 MHz first at 500 MHz kilohertz then the 0 is occurring at say 10 mega 100 MHz or gigahertz this was as if my assumption therefore I said okay 0 is of not my value but I have not checked whether 0 is really occurring at much higher frequency what is the problem 0 occurs earlier what did I say other day if you have a pole like this and if 0 occurs then the gain may become constant it will cancel 20 dB plus minus 20 dB it will cancel it is that correct but if this 0 occurs somewhere here this is already minus 80 dB let us say so this is 20 dB plus means minus 60 dB a slope may change but it is still minus 60 dB down it is going now is that clear so the 0 occurrence may or may not affect depends on where that occurs okay in this all evaluation I did I assume as if there was no 0 close to poles is that correct I must verify possibly yes it was okay so that is that is what the Miller's problem was that is what I was saying the Miller the way Miller did it actually lost the connection feed forward okay is that correct please remember what I said by doing a Miller's theorem we actually lost feed forward connections therefore the 0 was removed by me is that clear this was the limitation of Miller's theorem that is what I keep you are asking if it look there is a problem if I use Miller's theorem all the time okay so here is the one see I always explain you fully so here is the one in which I do not assume any Miller's theorem okay I have in this CJ after RG I have right now neglected but you can use RG also CGD yeah because it now it is it does not implicit the it is always gives you feedback part feedback you are taken care but feed forward I are not taken is that clear that I said you two ways the signal gets connected one is feed forward other is and feed forward gives you 0 that is why the two at the drain may go opposite sign so unless there is a feed forward there is no 0 okay feedback I had taken care okay drain to source I get I came back I have one upon GM times RL times I got that back but there is no feed forward term I left okay since I left feed forward the path I did not get my 0 is that so to get now 0 is that point clear 0 I told you just now what is the theorem I said the feed for why it gives this one path from gate to drain direct feed forward the other is through the transistor okay 180 degree out of phase both of them if at a given frequency the two values contribution to voltages at the drain cancels because of opposite sign then we say 0 exists V0 goes to 0 what is the 0 means V0 goes to 0 so it can occur without shorting at a given frequency V0 may go to 0 which is the word we said 0 0 of the transfer function is that clear so this in the remove in putting a Miller's theorem we use only remember I keep saying feedback feedback now this feedback term left feed forward okay and that is why I did not see my 0 is that clear but I removed it number Miller's theorem what did I do I took care of its value into input and output by the end broken the path between gate and drain so the connection between gate and drain by actually using the Miller's theorem broke my feed forward path no connection between gate and if there is no connection between gate and drain there is no question of cancellations of two such voltage contributions so to avoid this situation okay I mean now say key okay do not use Miller's theorem every time this is what my general telling to you people use Miller's theorem so very easily so I brought this example for your days to show that Miller's theorem is not what is a Panacea for every solutions at times your feet power may be very weak and therefore the fair no time 0 occurs or essentially 0 occurs at infinite yeah this situation is fair enough here is an issue feed forward it only takes feedback that is the mean that is what Miller has said and that is why I said you that you always feel much easier to immediately see a Miller's theorem equivalent and saw a circuit because then it becomes very easy to solve okay but in doing so poles will not very much but 0 may not be available to you so here is a solution okay only thing I right now left is CG RG okay this is CGS CGD CDB R0 RDRL okay this is GM VGS so now I write two equations for the two loops okay VGS-VN VGS-VN divided by our signal is one current current in this path okay this path what is the theorem I am applying the net current is 0 at the node G okay net current is 0 at this the next other current is this okay which is VGS CGSS okay GV is the current GV is the current is that okay GV is the current so this current the third is this current which is VGS-V0 into CGDS is that okay so the net current at gate is 0 so I wrote one equation like this I went to this node drain now V0-VGS into CGDS into S this is the current coming from this side sorry this side rather this side is going plus GM VGS okay plus V0 upon this resistance together whatever is current flowing please take it if this is together are equivalent this is this current V0 one upon RL dash plus current in this so CDB bias there is a current here there is a current in this there is a current here and there is a current here is that okay so at the drain again I summed up all the currents and make it to 0 so two node equations I solved and I have two equations available to me as 1 and 2 now do you see here I am not leaving any term CGD feed forward is also I have taken feedback also I have taken is that clear is that clear so this method does not leave either feed forward or feedback it takes care of both the terms and since it takes care of both the terms it will create all the poles and it will also create a corresponding 0 is that clear this is the so I have please do not say that Miller theorem was wrong or something Miller theorem is most times is very good it gives almost accurate results but that means assumption was that 0 values are such that they are too far but if they are not because we do not know what is GM we do not know what is CGI CGD value so if 0 occurs we must know where is it okay it may or may not be affecting our actually mid band all okay but if it happens we must know where that is the trick you should know so if I I may not solve all of it I have taken I I just the rest of the thing has been taken from book actually not this book but I do not know with some I write some terms zeta which is CGDC there are three capacitances here CGD and CDB the combination of these will always occur please remember what is combination CGS into CDB CDB into this into three possible combinations this terms occur in our solving so I define that as zeta and if I use now solve this equation I get in denominator please remember what do I solve from here I again solve V0 by V in and get AVS function I did not I have solved it but I am not showing you okay I am just trying to finally reach here then I see D is equal to S upon omega P1 plus 1 S upon omega P where omega P1 and omega P2 are the corresponding same poles which we discussed earlier and if you see this product of this what will occur SS square upon this plus S plus 1 this is second order denominators SS square terms appearing product of the two means two poles I am confirming these two will always give you a SS square plus BS plus C if the transfer function is has this kind it will always be equal to S plus omega 1 plus some constant S plus omega 2 can always be like this okay so this essentially means I can get from the denominator to pole values is that okay I can get two poles from the denominator of this I am not solving I am just telling you what we did okay however as I said and still not got my 0 so okay I went back from the equation 2 I have got the value of VGS in terms of V0 okay in terms of from the equation 2 please note down this because this is important VGS is minus V0 C is from this equation is same CDS into 1 upon RL that CDS upon GM CGDS GM minus CDS and I substitute that in equation 1 what is interesting for me V is V0 by PNS gain I am looking for so if I get V0 from VGS from this substitute in this then I can get my transfer function gain V0 S by VNS equal to CGDS minus GM RL dash divided by all this just note down this CGDS minus GM into RL dash that is the numerator divided by our signal into RL dash ? SS square plus all that big bracket into S plus 1 do you see that function now SS square plus AS square BS plus C SS square I would have left it to solve for you because I told you how to solve but just to give an idea I said you can always solve this method what is this method is saying solve load an equation or you can use Kirchhoff mesh equation also there are meshes you can solve for mesh also there is no question that has to solve by node only you can use Sigma V or Sigma either of them why I use currents here because there are the current sources I see everywhere so I say it is better if I use at node equations spy is use Sigma I0 that is I is GV I is a matrix G is a matrix V is a matrix okay since it solves I is equal to GV I thought I should always show you their method okay this has a two poles as I say SS square S plus 1 come so it has a two poles I did not solve for you full of it but I just tell you one of the poles which I am assuming dominant okay and I believe this is the dominant I can solve both of them and get but my intuition tells from the values I know this is the dominant okay if Omega P1 is less than Omega P2 then we will say Omega P1 is a dominant pole and this is the value now do you see in our expression which I wrote just now okay RS into 1 plus GM RL dash CGD plus RS into CGS plus RL dash CGD plus CG CDB is the dominant one upon that is the dominant pole okay that is to say at Omega equal to Omega P1 the value becomes denominator becomes 0 and therefore the magnitude tends to infinite okay now if you see my expression our signal into CGS RL dash into CGD plus CDB okay in the Miller's case what did we miss 0 if you see this expression in the numerator CGDS minus GM so at any one frequency S but if you can see Omega Z this term will go to 0 which is called Omega Z which is GM upon CGD with a plus sign please remember 0 should occur this should be minus there it was plus everywhere therefore it was on the left half plane 0 is occurring either on the imaginary axis or on the right half plane positive value okay so a 0 is existing at GM by CGD CGD is typically very very low okay GM is of the order of minus 3 amps per volt with a value may be a magnitude now this is 1 1 plus 1 3db is that correct that is 3db is the log function Nikala log of numerator Nikala so this will be 20 log of this so it will start rising because this will be stronger as the frequency increases this term will become larger and larger so 20 dbk is that correct but at the frequency where they are equal it will be a 0 will occur is that correct this is what the so you should know plus and minus 20 db one which has a 1 upon something will always be minus because minus 20 log will come if it is a numerator plus 20 will come is that correct so this essentially means that there is a 0 exist CGD being very small GM is relatively high typically this will be less than a puff okay less than a puff at least a puff so how much it will be 10 to power 9 typical value may be 10 to power 9 hertz 1 upon 2 pi so something related to hundreds of megahertz please take it what I said GM is the order of 10 to power minus 3 CGD is of the order of minus 12 this is order of plus 9 if I divided by frequency 1 upon 2 pi into 10 to power 9 this is roughly 1 into 10 to power or 1.5 into 10 to power 8 that is something like 18 180 megahertz is that correct 180 megahertz the first pole may occur at somewhere less than 1 megahertz the frequency turns okay so this 0 is that here now why why we were justified even in Miller's theorem because this value was far away from my poles before it went to 60 db down the 0 is not offering is that correct it is 2 orders higher that means till it went to minus 60 db 0 is not offering so I damn care it but let us say my value is high enough all to say I put additional capacitance across CGD from brain to source what can occur 0 will be brought left as much as I want that clear which means it may start actually closer to the pole itself and therefore I may actually make it 0 both equal pole value same as 0 value in that case what will happen the gain the flat band will gain will further start be flat is that clear to you I told you other day if at a given pole I put a 0 then the value becomes constant in the next the this starts falling by minus 40 db but this will always go 20 db so then minus 20 it will start going till that time the gain will become so what will it will improve the bandwidth so this is called pole 0 compensations so capacitance additionally can be put from brain to get to adjust your value but this is not very easy it will actually reduce something some other day I will explain yes but that is that that is actually stable situation it is like a pole now it has a value which is adding to a pole value it will act like a pole then you did you pull it down by j omega term it will come into the denominator if that plus occurs okay only that says it is a GM there is a minus sign between them occurs that is the positive value 0 occurs then only it is a 0 is that clear is that issue clear to you so in this problem what did we try to say you that Miller's theorem was valid even in this case but in real life you should not use that always Miller theorem is valid is that right so what is that solution I suggested to you you just put a network use Kirchhoff law solve the network and get 0s and pose as they come magnitude wise some may be dominant some may not be dominant so it is up to you when I plot the border plot I will see which one is dominating where okay till that time I said forget them the rest is I am not useful to me is that okay so these issues are very crucial for you and this I think is must be understood by you all that by sometimes Miller theorem is valid so what is the important what is the value I am saying if the CGD value is very small then the feedback is dominant but feet forward is not is that correct if the CGD value or the admittance connecting drain to gate or output to input is very very small then the feet forward value will be very very high at 0s will come very very high and therefore only feedback will start dominating is that otherwise there is a feet forward can also start dominating is that correct if CGD is very high it is this value which will dominate not this value okay so is that point now clear I can solve any problem any number of poles any number of zero so I said what was below jitney capacitance on gay with me pulse on gay can I use with jitney capacitance on gay with me pulse on now there is a possibility which I said other day that you may get something like this what does that mean that two poles are identical so you can actually there are cases in real life when you actually get cubes now what does this essentially means for you can think like this a pulver is that clear this pole abhi sr 20 DB a 40 DB a 60 DB is that correct so one method of actually creating a sharper cut off for the filters is to get a transfer function where you may get square or Q terms is that correct your filter the theory what I mean what is the filter I am saying in filter ideally I want this kind of response ideal response yeah everything pass and beyond this no pass okay this is say low pass filter I can convert this close to this by adjusting values says that I may get a transfer function in which three poles are identical okay and if that occurs a very sharp cutoffs can be achieved so if you know Bola can be up to both sharp cutoff chai a of course by doing what we call shebe share filter will look into this maximum flat filter whatever actually we tell her this okay to get poles closer okay so that sharp falls okay so this idea is clear to you so poles and zeros decide up to which signal will pass and below which signal may not pass or vice versa is that clear so thank you for the day