 So, as Prof. Sharma mentioned, it's very important to have a proper bias for an analog circuit. The reason is that because analog circuit usually deals with a lot of specifications and to meet all these specifications it's very difficult actually to design the circuit. Otherwise we could just have a few specifications, say for example delay, power, area. So that makes the design simpler. But in analog we deal with a lot of things. And usually the nature is analog, of course forgetting about what quantum brings into the picture. But generally when we are talking about analog and digital nature is analog. So to get the signals from nature and then bring it into the electronics we need analog front end, we need sensor. And because of this we need a lot of things to be incorporated in that interface to permit us to extract the signal from nature, removing all noises from that signal. And usually the signal which is in the nature is a small signal. Its amplitude is very small. So we need a precise system which is able to extract the signal. So that's why this system should be designed properly with a lot of desired specifications. We want to enter into the details. But what is important is the specification should be long lasting. They should not deviate from whatever we want. So that's why generating a bias for a circuit is very important. If bias point of an analog circuit changes you know that all specifications will change. So that's why stability and tolerance of bias to different sources of noise, different sort of variation is an important issue. So essentially the goal in generating reference current or reference voltage is to generate some reference and then generate all the biases we want from that reference with proper accuracy. And then in this way we can bias the entire circuit. So some of the various sources of variations we have like supply voltage variations, fabrication process variations, temperature variations. So it depends how we design the circuit and how much accuracy do we need. So we want to generate a reference. So sometimes we can generate a reference voltage and then generate a reference current from reference voltage. So these two are actually dependent. So what is the concept? The basic concept is we have some set of reference parameters so we will talk about them afterwards. From these reference parameters we generate some reference current for example and then we generate whatever current we want. So this is a straightforward methodology. A very simple circuit is that if you put a resistor connected to a diode connected MOS transistor and then put them between ground and VDD. So this is a simple circuit for generating a bias. And then the current which is generated in the transistor can be mirrored. You know what is the mirroring? Mirroring is that we have a current in some branch and then we copy this current in different branches. This is called mirroring. Mirror it and give it to different parts of the circuit. So in this way we bias the circuit with a current not voltage. Essentially I would say that the most common approach is biasing with the current not voltage, but we need voltage to generate the current. Another approach is that instead of relying on some parameters which will dictate some specific reference for us and then generating output, let us have a self-biased approach. In self-biased approach, do we connect the circuit to VDD? But actually the current which is generated in the reference circuit is not a function of VDD. It is self-biased. If VDD changes, it does not change. It biases itself. So the second approach is that we generate a feedback. So we will generate some reference current IRF1. From IRF1 we will generate IRF2. From IRF2 we have a feedback which generates IRF1. So you know that from mathematics if we have a system which is having this feedback in this way, so it can be self-biased. And that concept means that we can generate references which are independent of VDD. And then of course the mirroring part remains as it is. So we will look at these two aspects together and then see what are the benefits with the second aspect. Before going with the first simple reference generator, let us just give you an example. This is a very simple circuit, a basic circuit by which you can generate a reference current. We call this current IRF. And then by a simple mirroring, you can generate as much as current you want from it. So this is a very simple and easy method to do it. Now what are the problems? Let us give you an example. I think this is very straightforward and all of you know how the current is generated in this branch. This current will be a function of VDD, will be a function of size of this transistor and a function of value of resistor R. So the parameters I talked about them is W upon L, process parameters R and VDD. So here all of them contribute and determine value of the current. If any one of them changes, the value of current will change. So let us give you an example to get an idea of why do we want a precise biasing. Suppose we have a VDD of 2 volt and we have IRF 10 microamp. What we want is to generate a reference current of 10 microamp. Suppose transistor has been biased in such a way VGS is equal to 1 volt. So this is actually VGS changes. But let us consider VGS is 1 volt. And then so accordingly we will get around R is equal to 100 K to achieve this current. And aspect ratio of transistor will be around 1 upon 6.3. This is just a crude example. I want to give you to get an idea of how much biasing may change. And suppose threshold voltage of transistor also is 0.3 volt. Now suppose if VDD changes by amount of 10 percent, threshold voltage changes by amount of 80 millivolt which may happen in the process variations. When we are going from a worst case corner to another worst case corner. So 80 millivolt is not a very strange value. And suppose mu C ox changes 15 percent. Now what will happen? If you do all calculation obtain value of I, I do not enter into the details. You will get IRF is equal to 18.25 microamp. Does it mean 82 percent increase in the current? And actually 82 percent is too much. Because if you have a bias point in the current of I and now your current becomes 2 I, either your transistor in some part of the circuit may be driven into ohmic region or vice versa, some parts of the circuit may go into off-region. So that is why it is very important. In general of design always we deal with all these variations. So it is not easy to escape from them. So let us see how we can omit one by one. So one way of omitting some of the parameters is to use self bias approach. In self bias approach at least we omit effect of VDD. Because now circuit can be biased by itself. One of the very famous and basic circuits for generating a self bias current is constant GM current reference generator. So as you see this circuit actually has some sort of feedback inherent here. What we do is that here we have a loop consists of VGS of transistors M3 and M4 and resistor R. So this is a loop. This is the second method I showed you in the previous slide. So we will generate a feedback from IRF1 to IRF2 or from IRF2 to IRF1. It depends which one you get as a reference. So this circuit generates a self bias mechanism. So this is the main equation which is valid in this loop. And one more equation is IRF1 is equal to IRF2. And you have relation between IRF and VSG. So you will just replace. So you will have one equation for IRF which is independent of VDD. I do not enter into the details. Just you replace for VSG4 and VSG3 by relation for I instead of VSG. So if you replace for I you will have one equation which determines value of IRF which is IRF1 or IRF2 equal to IRF versus these parameters aspect ratio of transistors value of R. Now suppose we have same aspect ratio for NMOS transistors. So these two aspect ratio of M2 to M1 that of M1 is 1 and aspect ratio of M4 to M3 is M2 and M is greater than 1. So can you tell me why M should be greater than 1? I have kept this condition here. So M is just some variable. I want to develop a relation for this current. And as you observe here at the final relation M appears as M minus 1 square in the relation for IRF. So do I need to keep M greater than 1? It means that do I need to keep aspect ratio of M4 to aspect ratio of M3 to be greater than 1? So look at this relation. What does it tell you? What does it impose on this circuit? So this is IRF2. So IRF2 is a current which flows through the branches. So it is a positive value or also is a positive value. So this term is a positive value. So if you have an equation and left side is a positive value plus some variable equal to some other variable, then what is the result? Suppose I write A plus X is equal to Y and A greater than 0. So what is the relation now between X and Y? So it implies some constraint between X and Y. If I put A greater than 0, so does it mean any value of X and Y will satisfy this? Yes, Y should be greater than X. So here we have a positive term. So what does it say? So it says that right, VSG3 should be greater than VSG4. That is a very important point in biasing here. Otherwise your circuit cannot get biased. And to make it, now look what another equation implies. IRF1 should be equal to IRF2 because aspect ratio of these two transistors are same. M1 and M2 have same aspect ratio. They have same current, right? They have same VGS. And because they have same current through M3 and M4 accordingly, we should look. What is the relation between VSG4 and VSG3? VSG4 is less than M3, but both of them should conduct same current, right? So if we give a less aspect ratio to M4 than M3, then this circuit is impossible to get biased. So it is very important reference circuit itself to get biased properly. So that is why we need to have M greater than 1. So now if you write equations, it is very easy. As I told you, just in this equation, you replace for VSG4 and VSG3 versus IRF. Then you will get this relation. This is the relation for reference current and you can generate. So it is a function of M, it is a function of R, it is a function of mu Cx and this is a function of aspect ratio of this transistor M4. And of course M3 is a function of M4 and M, so it is inherently easier. And because we consider this aspect ratio, ratio of aspect ratios is 1, so we got this relation. Now if you look, there is no VDD here. So at least in one step, we have got rid of VDD effect. And the next thing is that because this M is ratio of aspect ratios. So if we have some changes in the length or width of transistors, because of temperature, because of process, this ratio won't change. Ratio of aspect ratios. So M is almost a constant value. But still if it is an on cheap resistor, it will change with the process, mu Cx will change with the process. But at least here we expect to have less variation than 80% that we observed in the simple example. Of course here I have considered output impedance of this transistor is very high. So that's why in the relation for I, I have just considered a square law relation. No impact of VDS on I. Otherwise this equation won't be as simple as possible and then it will have a function term which is a function of VDD. So that's why it's very important this transistor to have a low output impedance. So one way of doing that is to change this simple common source configuration to a cascode configuration. We can have another modified version of this circuit which uses cascode configurations. And next thing is we can itself play with the value of I. How I affects on the output impedance? Yes, it will affect, right. So how I can control output impedance by the value of current? Is there any relation between output impedance and value of current in a transistor? It is valid, say let us talk about MOS transistor. In an MOS transistor is there any relation between BIOS current or drain current and output impedance? Yeah, there is. So what is that relation? Suppose if I reduce the drain current of a transistor without changing anything else. What do you expect to observe in the output impedance? Any change do you observe? If I reduce current it will increase, right, right. So in an MOS transistor if I reduce current output impedance will increase. So if I use this circuit with a small BIOS current, so means that set I def at a very small value. Even this circuit will show a good output impedance. And actually that is desired because nobody wants to design a reference current with a value of say 1 milliamp. Unnecessary dissipating current. Instead I can design a reference current with a value of 1 microamp and then mirror it. And when I am using mirror there I can have amplification in the consequent stages. One more thing is that if you look there is an interesting fact here that one solution because now we have a closed loop circuit. So that is why it is having a self biased solution for the current. But one more solution exists which is I ref equal to 0 because this circuit can get a stock in off region. Means that all transistors can be in off region, right. Suppose all VGS values can be 0 and all currents can be 0. So this is very important to avoid this circuit to get a stock in that low bias current or zero bias current. Practically it may not happen. Practically because when you have a circuit on a chip or even a discrete circuit there are many sources of noise. And because of that you have some current which is flowing. And actually that helps this circuit to come out of that dead bias point and converges to this bias point. However for the sake of reliability always we should put a start up on the chip. Because if this circuit doesn't work you know what happens the entire chip won't work. Even though everything is correct that's why bias is very important. Of course we do some shortcuts like we provide extra pins. If it doesn't work at least we apply the current from outside and then let the chip work. So that's why it's very important but finally we don't want to keep those additional pins. Packaging is very important size of a case so we don't want to have additional pins. So we put a start up on the circuit on the chip. So start up first inject some current into the circuit. So there is one module another module called the start up circuit. It injects some current into the circuit and then when it starts working after some time this voltage will reduce. This voltage will increase and then this change will drive the start up to be off. So start up will work only if the circuit is not bias point. Means that this node is very high so that these transistors cannot get on. This node is very low so that these two NMOS transistors cannot be on. There is a bipolar version of this circuit that's why it is called beta multiplier sometimes. Because actually this circuit can behave like a positive feedback under some conditions. And then if we replace all these MOS transistors by bipolar transistors, the top of the transistor will get multiplied and then finally the circuit will enter into the either this self biased operating point or it may lead to burning these transistors due to excess current which is generated because of positive feedback. So why does it, is it called constant GM current reference? So here I have repeated the same relation we got for reference current. Now if you want to design for example a reference current generator. So suppose with the value of 10 micro ohm that we wanted last time. So just you will replace the values, you decide about M, you decide about R. You decide about aspect ratios and then you will get the value of current. So there are many factors how to decide about values, we will not talk about them here. But anyway so you can choose and then look at what is the GM of this transistor. I have, you know what is GM right? Delta ID by delta VGS or derivative of ID with respect to VGS when VDS is constant that is very important because ID also changes with VDS fine. So now we obtain the value of GM by the way all these transistors are in saturation region. So now GM 3 will be this and if you look now there is no process transistor process parameter except R which is a process parameter but it is not a transistor process parameter. If you could have R of cheap then there would not be any parameter which depends on the process. So that is why it is called constant GM current reference otherwise not because R itself for on cheap resistors it changes across process corners. Actually this is one of the main bottlenecks. If you could achieve a very almost constant or on cheap then we would generate a very nice current reference generators because we can get rid of these parameters. But this R always generates variation in the reference currents. Yeah but I agree I mean ideally always everything changes but if you look at the amount of change you observe in a discrete resistor it is much less than on cheap because on cheap resistors see of cheap resistor observe ambient temperature. But on cheap resistors senses cheap temperature sometimes it goes above 100. So that is why we get a lot of variation and the second thing is not only the matter of temperature process itself suppose if it is a poly resistor if the doping in the poly changes then the sheet resistance will changes. So it is very difficult to achieve a good on cheap stable resistor. Ok so we have a still sensitivity to process parameters but because I want to turn into the band gap concept here I have considered sensitivity to temperature. So temperature coefficient is a very important parameter and one of the figure of merits for looking at how a bias generator is generating a current or voltage which changes with temperature. So it is actually relative variation. If you get derivative of the current with respect to the temperature and divide it by current it is called temperature coefficient. So now look at like this petro multiplier or constant GM current source. So this is expression for IRF and then we can get value of temperature coefficient. So two parameters are changing with temperature. One is value of resistor and one is Kp. Kp is the same as mu P C ox instead of mu P C ox I have called it Kp which is usually called in the literature it is called Kp. So if you get derivative divide by I you will get this relation. So it is just a mathematical analysis nothing is specific. Again by detail writing detail relations for mobility you can get to reach to this relation. M is a process parameter and this is for a typical poly resistor which we observe 1000 ppm per degree centigrade. Ppm actually is part per million means that whatever you have multiply by 10 to the power 6. So it is part per million. So now one example suppose at T equal to 300 degree Kelvin and suppose temperature coefficient one of the typical values is 3000. Now if we want to design a bias generator which is working from 20 to 70 amount of variation will be 15 percent with respect to temperature only. But still 15 percent is not a small value for many applications. Can you tell me one application doesn't matter it is current or voltage 15 percent variation is too high. Delt with any application. So one example is ADC. In ADC 15 percent is too much for a reference. You will lose many bits at least you may lose 3 or 4 bits out of say 12 with ADC. So it is a very important characteristics for ADC and of course it depends on many other applications. In sensor applications also we may lose many things. So here exactly just the same circuit but what I have done just I have changed everything to cascode to get a better relation for IRF because we need to neglect the effect of EDS otherwise IRF will depend on VTT. So this is the same circuit but just replacing each transistor by a cascode version of that. And you know that this connection is called white swing cascode current mirror. It is a special case of cascode. I don't want to interrupt but just this is the bias loop. This is bias generation for these nodes that we need. And this is that startup circuit I talked about. You know how does it work? Suppose this circuit has entered into that dead bias point. So all transistors are off. When they are off means that these gate voltages are very low and gate voltages of NMOS transistor and gate voltages of PMOS transistors is very high. Now what happens is that because this is low this M15 is off. So now what happens is that this is like a resistor connected to VDD. So because of this this node potential will rise. And because it rises this transistors NMOS transistors M17 and M18 start conducting the current. When they conduct the current so this node voltages will come down. As soon as they come down this transistors will be on. So then this transistors will be on and then this node voltage will increase. When this increases so this transistor will be on. Now this node will come down. And because the nodes comes down this transistors will be off. And then this connection will be stopped. So this is just as example. So what is important is we have always a bias loop. And we need some additional circuitry to bias internal nodes if we are using cascode. And this is the startup. So this circuit will be enough to implement on a chip. And it will work. Of course I should tell you most of the time without a startup it is working. But as I discussed the problem is that still we have effect of process variation and effect of temperature. Of course never we can omit effect of temperature but at least we can reduce effect of temperature. So going one step forward towards generating a very nice bias generator now we are talking about a voltage reference generator. Because if you have a voltage reference generator we can generate current from that voltage also. So that bandgap reference I think many of you know about it, right? Do you know about bandgap? Okay so I will explain from the beginning. What is the concept behind bandgap? Look at this concept. I want to generate a reference which will be a function of two terms. One of these terms is VB of a bipolar transistor and one of them is VT, thermal voltage. Why these two? First of all here there is not any other thing. Second thing is VT you know increases with temperature, VBE reduces with temperature. So if I choose coefficient of alpha 1 and alpha 2 in such a way the temperature coefficient of this Vref is 0 at the temperature I want for example 27 or 25 then I will have a very nice reference generator, right? Suppose this is your temperature axis and this is Vref and this is say 300 Kelvin. Now if you generate a reference generator in such a way it is thermal coefficient at this point is 0. So means that here is the either maximum or minimum value of the Vref. So then you will observe minimum variation around this temperature with respect to temperature. When slope is 0 means that sensitivity is 0 so I will get the minimum variation or minimum sensitivity actually at this point sensitivity is 0 because the slope is 0. So and the next thing is that here I do not have anything specific which will affect the value of reference voltage. We will show that it will not be a function of process parameters. It will be like it will be a function of silicon band gap but silicon band gap does not change as such, right? It changes with temperature but it changes very slowly with the temperature. So it is a good candidate for generating a fixed and stable reference for the entire circuit. So we use the silicon band gap voltage to generate this and why it is silicon band gap it can be explained. So how we can implement this? If you look I can generate VTLNN right here I have written VTLNN actually it is K1 VBE plus K2 VT but how we can generate this K2? This is actually a function of some parameter which are not a function of process parameter. Now suppose I have two bipolar transistors this is VBE of one of them and this is VBE of the second one. You know that VBE of bipolar transistor is given by do you know the relation between VBE and collector current in a bipolar transistor? Do you know? This is a bipolar transistor so this is VBE this is IC. How IC is related to VBE you know there is an exponential relation again here I have neglected effect of collector emitter. So that is I almost in the active region of bipolar transistor this relation is valid. IS is one of the parameters in bipolar transistor which depends on the area of emitter I call it A and the subscript E area of emitter. Now what happens suppose we have two transistors bipolar transistor and both are conducting same current but area of one of them is n times of the other this is similar the situation which happened in the case of constant gm current source we had a loop with a resistor in the loop and there was a difference between these two VSG source gate voltages and because of that there was a difference between aspect ratios. So here what we do is consider we have two bipolar transistors they have same current the only difference is if area of one emitter in one transistor is A in the second one is NE, NA let us use capital N. So NA now what will be the relation for the VBE from this VBE is VTLN IC upon IS. So VBE is equal to VTLN IC upon IS IS is proportional to area. So suppose for transistor one I use subscript one so it will be like this VT is thermal voltage constant KT upon Q IC is collector current is same for both. So VBE 2 will be equal to VTLN IC upon IS 2 now we will have this two. Now if I use this term if I can generate VBE 1 minus VBE 2 somehow suppose then this will be VTLN IC upon IS 1 into IS 2 upon IC right. So this two IC will cancel and then because IS is proportional to A so IS 2 upon IS 1 is equal to N which was the ratio of area. So this will be VTLN N so it is very interesting we can generate a voltage which is proportional to temperature and it is independent of any process parameter right. Because VT is just a function of temperature it is KB T upon Q KB is Boltzmann constant and N is the ratio of area which is not changing with process. We can fabricate a transistor with a given value of area for the emitter. So if I can generate this difference somehow and force two transistors to have same collector current then I can develop this VTLN N. So this is the basic of band gap reference generator and N is a constant value we call this Ptatt voltage this term you may have seen in some literature we have Ptatt current also. So Ptatt means proportional to absolute temperature you see from this relation this voltage is proportional to absolute temperature T. So now coming back to concept of band gap. So variation of VT with temperature is around 87 millivolt per degree Kelvin this is per degree Kelvin it is not shown here. So this is upon K upon degree Kelvin upon this you just correct it and variation of VBE with temperature is almost around minus 1.5 millivolt per degree Kelvin. So if we choose for example at this temperature if we choose these two coefficient to be like this alpha 1 to be 1 alpha 2 L N to be 17.2 the temperature coefficient will be exactly 0. So what we want is to choose this coefficient alpha 1 and alpha 2 and N in such a way temperature coefficient at room temperature or any other temperature we would like to be 0. So in that case that would be very interesting and it can be shown in all cases always the value of reference under this condition this condition of coefficients will be 1.25 volt. If you have looked at many ADCs they have a reference of 1.25 that is actually has come from this they have an on chip band gap generator which generates this reference and they use it for a reference for the ADC that is the base reference which is used for ADCs and when they want to generate a higher or lower reference they will just use a divider to generate or voltage multiplier to generate other values from this reference. This is a very well stable value it does not depend on any process parameter it just is a function of temperature but the amount of variation you may get across say 100 degree centigrade it may not be more than 2-3 percent. So that is a very nice stable reference generator and still nowadays it is used. I mean it is a very well known concept and it works well only that is one interesting drawback nowadays with the scaling. I will be happy if one of you can tell me what you may feel just look at this value 1.25 volt VGS is why VGS nowadays is very low because VDD is very low right. So now see yeah right so what is the problem the problem is that I have a VDD of 1 volt now I want to generate the reference of 1.25. So that is the only problem but there are solutions for that just I will show you one of the solutions. This is a very simple circuit for basic circuit which was developed now there are many derivations of this circuit but look at this basic circuit what we wanted to generate one was VBE 1 minus VBE 2 right we wanted to generate delta VBE as I wrote for you ok. So look at this loop if I put an opamp this opamp forces this node and this node to be equal right in voltage. So then I have a loop and if you look across R2 I have VBE 1 minus VBE 2 I have difference of these two VBE agree clear see this node and this node are same in the sense that they have same potential physically they are separate but they have same potential which is forced by this opamp. So this is a loop right reaching here and this voltage difference is 0. So voltage across R2 is difference between these two VBE. So in this way we can generate that difference and then output voltage is the current through this resistor the drop across this resistor plus this VBE right. So that relation I wrote for you say alpha 1 is 1. So it will be VBE plus alpha 2 VTLNA ok. So how it is generated here? This is that delta VBE so it will generate for me that VT also it will generate a current this current will flow through this and this and these two currents are same. So let us write it for you. So we have these two transistors ok we had some this constraint 1 was to have same IC right generate VBE 1 minus VBE 2 right and then generate VBE 1 plus some alpha into VT. These were three constraints if you want to generate a band gap reference. So let us go one by one how to generate same IC flowing into two bipolar transistors. This is easily done by making R1 equal to R2 right. If R1 and R2 are equal because they have same voltage drop so then these two current will be same. So this will be IC this also will be IC. So this is done we want to generate VBE 1 minus VBE 2. So area of this transistor is n times of this I will show it by 1 and n by the way the same logic which we applied to MOS is valid here. This transistor has more area so it should be connected to R because the transistor which has more emitter area will have less VBE. So then this loop will be valid. So how do we generate VBE 1 minus VBE 2 by using this hopamp which generates a virtual short circuit between these two nodes. So these two will be at the same potential but they will be separate. So in this loop if you write KVL potential across or VBE 1 minus VBE 2 or absolute value I put because these are PNP transistors and one more thing we need to generate this there which will be actually our band gap. This we will do so this is output voltage. Now look at output voltage V out is equal to R 1 IC plus I write VBE 1 because it is a P MOS transistor and what is IC? IC is determined by the voltage across R divided by R. So IC is what is voltage across R is VT LNN right because it is delta VBE upon R. This is actually delta VBE which is VBE 1 minus absolute value of VBE 2 divided by. Now if you replace V out is equal to R 1 upon R VT LNN plus VT. So that relation also achieved. One thing you keep in mind here we have one VBE in the relation that is very interesting and then we generate some coefficient multiply by VT to get that value of band gap keep it this mind. So this is VBE plus some value multiply by VT that is why our reference is above VBE I mean definitely it will be above VBE and it is shown that it will be around silicon band gap 1.2 volt. What is the basic idea here is that we use reverse band gap voltage principle or BVP instead of band gap voltage. Instead of adding a coefficient of VT to VBE a multiple of VT to VBE we will add attenuated value of VBE to VT right. Now we expect to get less voltages. So now if you look our reference will be an attenuated VBE plus VT LNN. So we won't use a multiple of VT we will use VT LNN no multiple just LNN but attenuated version of VBE 1. So now the reference will come down and it is shown that that reference now will be just 200 milliliters. So this circuit can generate references with a value of 0.2 volt. So I have written the relation here I just analyzed the circuit once I wrote the relations and I got this because one thing just as a common advice when you read a paper don't trust the relations which is written in the paper derive the relations once by yourself because there are many cases in which there are some small mistakes even typing mistakes only but that will may lead to some wrong concept or wrong understanding of the relations. So it is very easy to derive relations here even for the first case you just neglect base currents and actually that is very interesting look how now here how it is working. Now we want to have just VT LNN we don't want anything else right so we won't just delta VBE nothing else and then attenuated version of VBE. So this is done by this voltage division right because see this is the output reference and now again if you look we have again a loop this is our loop. So if you look at reference, reference is this VBE plus this voltage V1 and to get value of V1 V1 will be this drop which is a function of this plus this VBE itself. So if you write it just KVLs KVLs and replace the relation for I versus VBE you will get this for the sake of simplicity first you neglect effect of I be suppose I be 0 then these two currents will be same this currents will be same and then you will get this simple relation I mean automatically it will come and K is ratio of R1 upon R2 R1 upon R2. Now again by keeping temperature coefficient equal to 0 at 27 you will get the value of 200 millivolts this relation again will depend on the how these two parameter are changing with temperature the same analysis is valid that is valid for 1.25 volt and is given in all textbooks. So this was a brief lecture just to give you an idea of what is bias generation and then one example of recent work how people are trying to adapt bias generation with a scaling. So any question this one is based on Razavi book that is a very comprehensive reference and it has a band gap reference essentially it has a reference generation chapter in that chapter you can find all this concept of band gap generation with details. One is Bezod Razavi Ken Martin book also is a very good book it has also the same thing. Suppose if you want to generate a low voltage band gap one approach of course is given here another approach is what they do is that in the conventional band gap they use transistors for mirroring currents instead of resistors and now because putting transistors here as a mirror they can mirror this current everywhere right they can mirror it they can have different mirrors. So what they do they mirror the current and then they give it to a resistor. Now what they do is that in the resistor they give it to a resistor and to another transistor what they do is that instead of making that VBE plus VT here they make it outside and then outside they adjust the values in such a way to get a value of a ref less than 1.2. They call it reference based band gap generation current based band gap generation but that actually that is only because here they mirror the current outside they give it to the outside branch. There are other things like when we did the scales so this opamp should be able to handle this node voltage. So common mode input of this opamp should be in such a range of input to be able to handle that low voltage here. So that is why design of this opamp at low voltage also is not very straightforward. So there are again different methods what they do is that they use a resistor division here to change the voltage here and I mean there are many things I don't want to enter into it but there are many patents also related to this band gap reference generation and each one of them there is a claim that now sensitivity even is less because see even band gap also alone may not be able to handle all accuracy we need specifically for ADCs. For design of an ADC definitely we need proper way of trimming. Trimming usually is done by laser and it is a costly process of their fabrication but it is required for all type of ADCs but there is a lot of research going on how we can do all this trimming on chip and make the circuit to be quite robust. But after all if you look at all these things there is a very big issue in the transferring the current across entire circuit because everywhere we use mirroring and then mirroring itself adds a lot of inaccuracy into the reference chain distribution. So it is not only the matter of generating a proper reference it is the matter of how to distribute it across chip and that that itself is a problem. Even an ideal reference generator we are not able to distribute it across the chip. So that's why now by increasing the size of circuits increasing the density we need a larger area to distribute the bias and as soon as we increase the area then we will have more variation from one side of the chip to another side. So these are all new issues that have affected distribution of reference. It's not only reference generation. How to distribute? What is a proper scheme for reference generator or reference repetition? We may have something like we have in the clock distribution. We may have a repeat of a reference generation. At different areas when we want to have supply for a large area. We will create a duplicate of this reference again somewhere else. The reason is that because suppose I want to transfer a current from point A to point B and there is a huge not lost variations. So what I do is that I will transfer it from A to B, A to C. I will duplicate this there and then again I will transfer from C to D. There are many issues. First of all like what is the process we are working with? How much is the amount of variation we get across that process? Yes. How much accuracy do I need? Suppose for example I need say 1% accuracy. Of course 1% is a very ideal value. Say 5%. 5% accuracy. And I know that my process if I go from say if I start moving from point A to point B with the distance of 100 microamp I will observe that 5% variation. So I will stop. I won't go beyond 100 microamp. So we should have enough information. Actually that was a good question. One thing which is very important and usually is not given unless we are in industry is that how much is the performance of the process itself with respect to variation? If I have enough knowledge about the variation in the technology then I can adjust my design. If I don't have then I should go with some estimation. And then when I go with estimation if I am over estimating variation or underestimating variation that heavily will affect on my design effort. If I underestimate variation I will have a fast design but then final performance won't be proper. If I over estimate then a lot of effort I have to assign to make a proper design and then repeat it and compensate it but unnecessarily because after all I have overestimated amount of it. That's why the good knowledge of amount of variation is very important when you want to do proper design. Yes? Yes. Yes. It depends from which vendor you are getting the technology. Suppose you want to work at 113 nanometer channel and technology and you are dealing with some vendor which is giving you this process. After all you want to fabricate your chip by that vendor, right? By that fab. So the information that fab is giving to you is very important. How much information regarding variability fab is giving to you? That heavily will affect on your design. But it is very crucial. Till now the best practice was they would give the corner worst case variation and everybody was trying to design a circuit in such a way to satisfy all desired specifications across all process corners. But now with the scaling and a lot of variability issues this methodology is very costly. It takes a lot of time. You need to consume area and power to satisfy all specifications and so it is very costly. So that's why it would be better to have a better information regarding variability rather than cause. The worst corner actually is overestimation of variation and considering the worst case scenario. 1.25 as we were taking the case of ADC. Yes. If we want to have below that or... Then we should convert it. There are circuits by which we can convert a DC level to another DC level. That is done afterwards. I mean we generate that reference and then we will use that converter to generate new levels of... Basically we start with 1.25. Yes. Whether you need more or less. Yes, yes. That is something which is naturally we get from silicon. So it is preferred to start with that and generate everything out of it. Of course now we can generate the smaller values and then still generate other values that we want. Because when we are adding to the 1.25 we want to have something else. We are adding the circuit. So that requires... But that is okay. See one thing which is not as such important in supply generation at least is that if I can sacrifice area because of accuracy that is okay. Because that is the fundamental circuit which supplies the entire chip. That is fine. But for other modules of course we are worried about area. So that is not... I mean that conversion is not overhead on the design. As long as that conversion doesn't dissipate power. A lot of over overhead on the design which is not usually the case. It might be the case but not in... Specifically if you look like in data converters, reference is given usually to the gate of transistors which is not drawing any current. So we don't need to generate a reference which will drive a heavy load. So that makes the design at least easier from this aspect. But as I told you it is not only matter of voltage level it is a matter of noise. So all these circuits should be low noise. Nowadays. And better accuracy, getting better accuracy from bandgap. It's very important. For the using current method which is using current nowadays people are generating 0.6 volts instead of 1.25 volts. Using that mirroring the current and then give it to an external resistor and then series with one VBE they are generating 0.6 volts. So at least these three values they have reported and they are using. And it is good enough at least for today's applications 0.6 volts is good enough. What about the noise control? Noise is very important. Because suppose you have a reference which is having noise and that noise is not small, say in the range of millivolt. So your noise will reach to the LSP of LSP size of ADC. And that will affect on the accuracy of ADC. So for ADC design specifically we are much worried about this effect. So it should be a very I should call it low noise reference generator. But for some it depends on application. But I would say that ADC is one of the stringent applications. For that we need a low noise. Say for example a simple example of mirror. Suppose you have two transistors gates are connected, sources are connected and just range are different. So we say that if these two transistors are working in saturation and one of them is conducting a current ID, the second one also will conduct current ID. Because they have same VGS they have same VT. And now if you increase the distance between these two transistors their VT now will be different. So even if you forget about output impedance which is one of the sources of inaccuracy still this variation will be source of inaccuracy. And of course I mean that output impedance issue is there. So that's why we never use this simple transistors in the common source. Always we use at least in cascode configuration.