 NWL55JC2 port preparation. Within this exercise we will use a single wire viewer option and let's discuss a bit the basics. So the most of the ARM Cortex-M cores, except ARM Cortex-M0 and M0+, have a dedicated peripheral called instrumentation trace macrocell ITM. This peripheral can be used to send some data from the MCU, so it can be anything which is addressable. So it can be global variable, it can be content of the special register. And the data can be sent over additional pin, which is called single wire output SWO. So this pin is connected to PB3 on the pin out of the microcontroller. STM for that occupy DE toolchain can display this information using single wire viewer. It can be displayed as a classical terminal view, so text display, or it can be displayed as well as graphical way. On a NWL55JC port, which we are using within this exercise, SWO pin, so PB3 is not connected to STL by default, so we need to use a wire to connect two pins to have this functionality available. On next slides, I would present how to do it on NWL. The simplest way to connect SWO of PB3 is to use a wire. In such a case, we need to connect one of the pins on CN10, which we can see on the right side of the board. It is in fact the fourth pin, the left side of this CN10, counting from the bottom of the board. We need to connect this pin with the underscore SWO pin, which is located on the jumpers area within the central part of the board. This you can see on the pictures on the screen. Another option, not temporary, but permanent would be to use jumper modifications. We need to modify two jumpers. We need to set SB8 jumper, which is located on the top side of the board, very close to the CN11 fields, and on the right side of the shield of the microcontroller. This is the right picture, and we need to remove SB31 jumper, which is located on the bottom side of the board, just on the right side of CN9 connector. By doing this, our SWO will be connected to PB3, and there would be no need to use any wires to connect those two pins together. Interprocessor communication on STM32WL55, example description. Within our exercise, we will use shared buffer, which would be initially cleared, so it will contain all zeros. And then within Cortex M0+, we will have a local buffer, it would be 32 components of the sine wave. And within Cortex M4 area, we will have two buffers. The first one would be 32 samples of the square wave. And there would be a user buffer, which would be initially a square wave as well. We will monitor the content of user buffer by copying it, its content to the global variable one by one in the loop, and we'll monitor this global variable using a single wire viewer monitoring, which you can see on the screen. So there is an example of this square wave, which we can see later on the screen. So this is the initial state after the reset. Let's analyze this application step by step. So at the beginning after the reset, we can see the situation like the following. User buffer on Cortex M4 will contain the square wave as it is initialized with this content at the beginning. In Cortex M0+, space, within the local buffer, we've got the sine sinusoidal samples. And the shared buffer contains all zeros. So on a single wire viewer, we will see the square wave data. Once we press either B1 or B3 button, both of them are assigned to Cortex M0+, the sine buffer would be copied to the shared buffer. And after this operation will be completed, IPCC will generate an interrupt that the data has been transferred to the shared buffer, this TX direction. This interrupt will be raised on Cortex M4, and after this, Cortex M4 will copy the content of the shared buffer to its user buffer. It would replace the existing square wave samples with the sine wave samples. And after this operation, we will see on the single wire viewer the sine wave samples instead. After this operation, Cortex M4 will clear the content of the shared buffer and it will send the confirmation that the data has been received by raising the interrupt on RX direction. This interrupt would be raised on Cortex M0+, and it would be the sine for Cortex M0+, that it's possible to send new data to the shared buffer as the previous one has been already used by Cortex M4. In the meantime, if we will press B2 button, which is assigned to Cortex M4, Cortex M4 will copy the content of its square buffer to user buffer, which would replace the sine wave samples with the square wave samples, and we will see again on single wire viewer square wave instead of the sine wave. Short description of the example would like to create. We can reuse one of the previous examples, these with three buttons and three LEDs. When this exercise will use only three buttons, LEDs will be not used. Then we need to add IPCC module and assign it to both cores with interrupt generation. Then both cores will share the buffer located at the end of SRAM area of the MCU. This is in fact the close to the finish line of Cortex M0+, SRAM area. Okay, let's prepare an example step by step. I will use STM32Cube IDE and I will create a new project. So this is my empty workspace and I can use either create a new STM32 project link over here or go directly to the file new STM32 project. So I need to select my microcontroller, so this is STM32WL55JC. It's enough to put on the part of the name and this is our micro. It's quite easy to recognize it because there is a board equipped with exactly the same microcontroller and this board will use within this exercise. So I go to next. Important here is to enable this multi CPUs configuration, as it would allow us to create two projects for both cores and my project name it would be IPCC. Then I press finish. Okay, after a while we can see the pinout. So I would start with the buttons. So first one is PA0. Left button on mouse, then GPIOXT0. Right button on mouse, pin reservation. All assigned to Cortex M0+, then PA1. Left button on mouse, XT1. Right button on mouse, pin reservation and Cortex M4. And PC6. Left button on mouse, XT6. And right button on mouse, pin reservation, Cortex M0+, as well. Then we need to activate pull-ups for those three pins. So I go to system and core, GPIO. And over here, if I would click anywhere on the industry row, I'm selecting GPIO pull-up pull-down, and I'm selecting pull-up for all of those three added pins. Okay, next we enable IPCC. So I go to this IPCC and I'm activating it for both cores. This automatically activates interrupts for both cores as well. We need to do one more thing within GPIOs. I forgot about it. It's to enable the interrupts for both cores on those three channels. External interrupt channel 1 for Cortex M4 and channel 0 and channel 6 for Cortex M0+. Next step is to activate the debug interface. So this is within trace and debug. I just click on it and select JTAG and the trace, the last option, so trace, a synchronous serial wire. So we will use three pins PA13, PA14 and PB3. PB3 is an additional pin, it is single wire output. It allows us to get some messages from the core, which are sent synchronized with the core and can be used to monitor some variables or some content of some registers as well. So we'll use it to communicate with our both cores. Just for the verification, I would just check the clock configuration. So within the clock configuration, we can see that both cores are working on a multi-speed internal oscillator on 4 MHz without PLL, so we'll keep this default configuration. Then we can generate the code for both cores by clicking this icon, this button. There's a warning that it will switch to CC++ perspective from this QBMX1. So I just click Yes. And now we can see that the code is generated for both projects. So we've got project for Cortex M4 and Cortex M0+. Both of them will have its own copy of main.c file, independent one, its own linker files and its own sources. So we'll have two completely independent code areas for Cortex M0+, Cortex M4. But please remember that we've got one common set of peripherals, which are shared between those two cores. Okay, the project generation is finished. Now we can do the code processing.