 The semiconductor technology has 3 driving forces and these are 3 ones which shown here. The first of course is the transistor technology. Transistors are used mostly in logic as well as analog RF systems but apart from these major transitions, transistors we make, there are other 2 technologies which is driving semiconductors now. One is of course the memory technology or DRAM technology as it is called and all of you know how much DRAMs are now available, variety of DRAMs have come, NVDRAM, DDDRAM and many of them they are just variants. So the dynamic memories are very, very strong contenders for changes in normal technology of ICs and that is why there is a lot of different research goes on in DRAMs or memories in particular. And the last but not the least is the current trend for last so many years now is to create a non-volatile memory which is called flash. Flash essentially stands for erase by all together. It is not electronically erased but erased all the bits are erased in one go and one is trying to see that the excess time of these memories are as good as SRAMs if possible. Maybe SRAMs will have to go then. So these 3 different kinds of technologies are current trends for which the efforts have been tried at many years. Just to give an idea what is essentially a fabrication details which is this course is going to address. So I may just tell you, we start with some semiconductor in this case say we are making an enchanel device and because the enchanel device we start with p-silicon then we grow silicon dioxide by oxidation then we deposit silicon nitride and over which we have a photo resist. The word photo resist will be clear to you when I do lithography later. The idea is like if you have seen a normal photo film there is some kind of emulsion coated there it is like a resist essentially. So when you shine light through some object the light does not pass through the object and therefore the rest of the material actually receives light and there are 2 kinds of resist we use one is negative other is positive. In one case if it is negative the resist which is essentially a polymer actually hardens. Hardens means it does not get etched in normal etchants whereas the PPRs are positive photo resist essentially are the materials they are also resins, miscrossing resins and these resins whenever they receive light they actually break their links and therefore etchable. So both kinds of patterns are used one with PPR one with NPR and we will see this is of course apparently it is sees that we are actually using NPR but can be used either PPR and PPR depends on the mask we create. So word mask is very important in the sense the object in the case of photo is equivalently on a glass plate I create a pattern and if I have a darker area light does not pass the clean areas of glass light passes. So wherever the light does not pass this resist below is soft so it is etchable. So I can create a window inside the black region by in the oxide because then I can etch the rest of the oxide or small oxide whichever way mask is used and therefore I can create windows in the silicon or silicon dioxide that is called masking. So there are minimum mask shown here are 5 simplest N mask transistor can be made using 5 mask currently they will say CMOS IC is required 32 to 36 mask so one can imagine the amount typically 1 to 5 million dollar per mask is the cost okay. So you can see if you add a mask you can imagine how much money industry has to invest okay. So the way it is done is that then we actually use the areas which I want something to happen I can protect that or if I do not want that area to be used then I will etch that out. So in this case I have done using the resist I have actually done boron implants and if I do boron boron cannot go through this resist area and the rest places the boron goes and goes down the way because of energy much below here these are called P channel P plus areas one can create these are called channel stoppers. So the first masking is done for what we call channel stoppers we will see this in actual technology then we further do additional by etching this area we do further additional boron implants by putting an oxide on that before so there is a oxidation step here as I said you may not be appreciating immediately but then we deposit poly silicon over it and again etch it. So poly would have been deposited everywhere but only this part is retained by a mask by etching this technique masking techniques so you have a poly gate then I actually implant arsenic to make N plus drain and source resist is good enough for normal implants so we do not etch many times many things we will show you later. Then we actually deposit oxide again thick one okay then create windows for connection metal connection to source and drain into the gate so we open window here put contact metals etch the pattern wherever you want and you get so this lower portion which I show here are actually composite mask this is the pattern actually see on silicon but there are number of mask you can see the first mask which I was doing this area they are maybe I do not know whether the bigger portion of this is the window which I actually opened which you can see this was the area which was blocked so that is the area which is total area is what I first created inside then I did some kind of channel implants this area and then I opened source drain windows okay so these are source drain I opened a contact gate so gate was done by this mask okay and this mask so each mask actually should get aligned with the earlier ones so wherever you want that this to come you must align so you need a process called mask whenever I do is lithography in which I actually three through a microscope and align the patterns okay and then only I expose the light there okay so do this this is essentially very important lithography is the major crux of all processes okay so I did not done this so to then you open a contact windows for mark source drain and gate so you can see here and then put finally the last mask with the metal mask which connects now this is the process step which is as I said a five mass process and later as I say at least I will show you 16 marks standard CMOS process but as of now there may be some processes or some chips which may require as high as 32 mask okay okay so next is so I yesterday already said we are all kinds of process steps which are required to deposit material oxidize diffuse implants in cooperation selectively is the basic feature of all IC technology I want to make n plus certain area so all other area should be blocked and only that should be opened so this is essentially the feature the smallest feature which I can do any processing is called the node what is the number we used to give 33 nanometers is assumption that the smallest whatever dimension I can create is 32 but that is not really true these numbers were earlier when we were working on 0.25 0.13 microns nowadays the gate oxide is for a 32 nanometer process is 16 nanometers for 16 nanometers is only 9 okay 11 it may be 5 so we will see that this numbers are not really matching earlier this was the smallest damage if I say 5 micron process which means the smallest dimension I can print on silicon is 5 by 5 microns okay this is how designers see designers see what is the minimum feature it has so now there is no does not say anything about features though we still keep caring because of Moore's law business 0.7 0.7 so we kept on naming the nodes like this but in reality these numbers have no direct relationship the feature sizes so these are the process steps which is this course is going to look into lithography CVDs PVDs dry etching diffusion implant anneals and characterization people always ask where is the use of ICs so much money is in pump 10 well all of you are working with portable electronics PCs are one wireless based systems like my mobile and others or what is called a handheld system PDAs the basic application is the cost of IC which you create a typical microprocessor may cost around 160 dollars okay Pentium 4 for example with the latest version but older version 85 may be available to you in 160 rupees okay so the question is that as technology advances the cost of chip also increases and this is slightly difficult understand we will say why make bigger things I will get smaller money no it is not because the investment on a process line as I said last yes it may be 8 billion dollars to 10 billion dollars per node so if I see some somebody says shift from 32 nanometer to 22 he is investing 8 billion dollars okay for the next line but if you want to keep the old lines he is unnecessarily spending money so he will actually start charging them also because otherwise that line cannot be sustained okay please remember typical run in a in any semiconductor industry has at least 250 vapors of 12 inch size in one run 250 vapors actually go into the furnaces and so how much heat cycle it must be having to maintain temperature from 800 to 1200 degrees so huge thermal budget is required so much etching goes on so much processing is going on roughly it industry requires 54,000 gallons of water per day just to maintain your fab line okay so the why I am telling you cause because all these processes are good or bad design when I am teaching a design course I keep saying design is as good as what customer want in a minimum money okay that is what the best best is nothing called best because you can always improve something but at the cost if the money goes high no one buys it so the game is what is best for a customer in a smallest amount of money is the best design and best technology okay so never say oh you have to be there you do not have to be if the money is this much customer specs are only this much use as bad as technology available but it satisfies okay this is a third problem in all applications are the liability and this is major worry because if you are using a chip and every third batch it blows then no one will buy your chips so there is a reliability issue it should stand to at least minimum lifetime maybe let us say at least few years five years or four years so the test has to be earlier performed for reliability gravity is defined as the specs remaining same for a given lifetime given time so if spec changes no one buys the chip okay so there are issues like liability which cost actually hell of time hell of a time then there is also a problem in design which is has to be taken care of a technologist is signal integrity you may enter some data which may be say 3 gigahertz signal but internally it is not reaching 3 gigahertz because of the RC RC time constants inside so your whole trick that you are pushing a signal of 4 gigahertz is essentially not inside any may 4 gigahertz there are other problems like there are inductors they may be a lot of transients may occur so one has to take whatever signal you are processing should remain same throughout that chip area okay and that is another issue which is a big job in design which is somewhere related technology because he say I want this this also so some of the things are actually designers forcing technologies to take care because otherwise he will not be able to get a design which works okay there is always a fight between technology and design designers feel that technology is not competent and technologies feel designers do not know what to do so they just give something and expect that we will do it for them earlier times technology was lagging designers but in 2000 may be ahead now technology is so advanced designers are doesn't know I can give you 1 billion 1 billion transistors but you do not have a system which requires 1 billion transistors okay may be 3 billion so what you will do okay so there was a time in my phase of career when technology was lagging people wanted 10,000 transistors we could give only 2,000 then they okay we want this performance we say no no I cannot do better than this but 10 times have changed now designers are at loss to actually create systems which are much more useful cheap as well as then therefore the technology valuation is possible there is another issue in all designs which is taken has to be taken care by technologies is called thermal design you know if you have a 2 centimeter by 2 centimeter or a 1.5 by 1.5 centered chip 2.5 or 2.25 square centimeters and there are let us say 800 million transistor working half of them at least will be termed non hopefully by probability each will be drawing current okay so power supply voltage into that current is the power dissipation. So look at the so many transistors turning on with so much current and voltage products so the net power which it may consume may be watts tens of watts to 40 watts which essentially in a thin silicon layer actually heats the silicon now as soon as silicon starts heating the device properties start changing all most of the characteristics of semi-conductor device is very strong function of temperatures. So if your temperatures rise too much your circuit will fail irrespective whether it was well good design or not even if I had taken care the corners as I say the maximum temperature I expect is 50 but it may reach 65 then what will happen so the issue starts that your designer now tell thermal design has to be taken care mostly by the technology people that the heat is removed faster okay so there are tricks which allows that it is not that it is impossible and then there are two kinds of application which is driving us one is of course is the ultra low power fee applications most of the battery handheld systems actually requires ultra low power device will show you some this how much low is low and of course space is only good thing about spaces they only want smaller things the rest of the thing they allow so you say one chip cost 10 million dollars NASA at least will not say no okay but that is what in their some mission they need so they say okay fair fair enough the performance I want this so essentially and now I am trying to say there are at least digital there are three kinds of circuit which has three different technologies one is low high performance circuits now this high performance means high speed so high speed circuits at the cost of something it cannot achieve anything otherwise so it is okay I will allow some more power dissipation I may allow some more area to you but I want performance the circuit must function at 8 gigahertz and that is it so this is called high performance circuits so only feature for them is speed how fast you can do the second kind of circuit is low power circuits I am kept the speed is very low I may be one gigahertz or 800 megahertz like GPS this our mobile requirements but it should not consume more than so many wax per square centimeter now this is called low power design in which the easiest way to reduce power is reducing the power supply so most circuits we are trying is from say we went from 5 volt 3 volt 2.1 volt 1.8 volt 1.5 volt 1.2 volt 0.8 is now the current power supply we may prefer to go 0.4 but something else may happen so we are right now not teaching but maybe some date will reach so the power second circuits are called low power so their technology is not same as technology for performance there are third kinds which is what most mobiles require low standby when it turns on it should give higher performance okay but when it is not working it should give very low power dissipation so these are called low standby I mean low power standby these are the three different digital circuit technologies which are used in commercial sense so whenever Apple comes with something or Microsoft or Google for Google of course has sold Motorola now they know one may say so they actually figure it out the available in the market what is it doing apart from because you now want some million applications I don't know how can you use all of them but everyone wants on their mobile so many applications each application cost lot of power okay so the power dissipation is a major worry in every sense nowadays except as I say space they damn they have a satellite system they may put fins everything cooling liquid nitrogen liquid helium they may do anything for you but they say performance has to because when the something lands on moon or a Mars it should function irrespective and that is where the money is paid for okay so it may not be silicon it can be mixture it can be anything I only want performance so these are third kind of technologies which are space related generally not known to many because they are normally secret technologies some when 10 20 years when things are already too much advanced then they release 20 years ahead technologies so you realize oh this was what they were doing 20 years ago but those technologies are very advanced but at too much other costs okay so please remember why so many technology studies because each application is asking something else and then you have to come up with this it will meet your specs and it also should be low cost because if the cost is high no one is buying it either okay unless you have monopoly and at least in many countries including US monopoly is not allowed you probably know why AMD surviving because Intel supports AMD which is their competitors okay which is very funny isn't it because if AMD goes away Intel will have a problem okay so Intel will actually see some market for AMD so that they can have unrestricted manufacture okay so this is there is an issue in every sense so technology development is very costly very intensive it takes three years to go to the next node and investment to 8 billion dollars roughly these days and so much investment if you do and this and if the product doesn't sell who will put this money okay of course they do sometimes they fail and then they remove 2500 jobs per year or something okay that's what the quarter three this year has did not show good profits 2500 are laid off okay thank you that's the way it is pink slip as they call why it happens because they expected so much cell they did not happen that's the end of it okay so please remember I keep telling why economics matter because only economics is driving force for us if the money is not generated no one is trying to put money in okay this is life and one has to accept I may like to do something great but maybe in my lab keep it okay if I have to go to industry it should be manageable sellable only then it will go to industry so many of us are so enamored by electron motion including me that we forget that okay I have found something interesting but who is going to buy this one no one because this will take so much cost and buyers would be too so why should I someone will invest money in you but then I'll get papers I may get a paper in nature or some I may get some big laurels fair enough but industry doesn't go by that industry sees when the maturity appears in a process only then it picks up so they themselves may be doing research they also know what they are to do but basic research is normally not done by industry simply because they fear fear that if they invest there their profits go down so they this is how universities survive they fun in universities you do keep doing research out one out of thousand I may pick it up you do it but we survive on that okay ten thousand chip may a chip chala so we never go and tell 999 9,099 did not work so processes correct we have got one chip working okay that's the process in lab but that's not process in the industry in industry 10,000 at least 9,900 must work okay so the game has to be understood that why technologies are always killed by everyone is because whatever they create if it is not you in a field it gives that process goes down okay so we may come with graphic as I show you many other new technologies but it's not going into industry simply because it's not feasible or it is not very great to see that it is financially viable so read papers and you will figure out why so many technologies have come and gone also there are different constraint one sees for example if you have portable device battery is the major cause how it should not of course one of the thing which I suggest you leave all micro electronics and look for battery research okay if you can create a battery which are large ampere hours in a smaller area I think you have a mine of gold with you okay if that is what you can do let's say you have 10 ampere hours or 20 ampere hours in a small tablet I suppose many will rush to you only chase you out everywhere if you create such a technology so all this I see is not worth that if you can create one battery which is can create large ampere hours for you okay so look for fuel cell hydrogen cell make try every other thing like Edison try 400 experiment or 4000 experiment maybe wait okay but that's something boring so people there is nothing great in this and therefore no such research happens in IITs where it should actually we are technology people okay the telecom military of course as I said they actually look for reliability and that's where the money is of course they are ready to pay money for and there are high volume products which are called off-shell products which have actually cost wise like a dealer and no one wants to sell at say 5000 rupees no one will buy even if it is 16 GB or 256 GB so when asked to reduce the price and if you reduce the price the power price is essential in package as I yesterday said chips are very cheap okay it's the package which cost hell so if I tell you give a product of course I don't give this project this is it but if you argue about let's work on a some project on package design say but where is electrical there but that's the problem okay but electrical people feel we should only look for like at least micro electronics where there is no electron what is there you know there is nothing there okay but that's the money money is in package actually think of it some in may say entrepreneurial bansak there okay the problem in technology started after 95 a head when the there is a switch transistor works like a switch they say for logic so if it's turn on essentially the switch is on connected okay the there are few currents which I can say one expect that there is no current from the control side into into the switch okay whichever reason like in case of MOS there is no gate current okay we expect this but it doesn't happen there is a gate current okay we expect I to be zero across the gate but it does insulator are not very good insulators as we thought okay therefore current flows through them because of the high fields we expect maximum current or in as much as current I push from the input to go to output believe that no attenuation will be there but that's not true in fact there is a on resistance which will actually not allow all that current to go okay so another ideal switch we thought that infinite current can go and no current from the control side is only ideal switch in reality when we started scaling devices newer MOS size transistor scheme we figured out the arm current the gate current is not very small even this lateral current which we believe below threshold when the transfer is off should be 0 is not 0 it is in fact very large current these days and because of that ideal switch is only ideal in reality it has too much leakage leakage means what power loss this is unused power loss and that is one reason why most of the low power research is controlling this leakage paths okay to reduce this leakage current because in stand-by mode in specific you can see that the currents are flowing even if it is leakage currents and if they are larger they will drain the battery so you keep your mobile next day morning there is nothing inside okay because of leakage parts unless you power off completely there is no way power shutoffs comes okay so this now there is an issue there is a technology as I say low power technology came out of this because they want this to be as small as possible so the whole transistors had to be differently thought to give low powers so the every technology comes from requirement of a user and he said this is what I want as I say as I start scaling in the case of on currents if a mass transistor the IV characteristics is something like this okay now one can see from here one believes the off current is below threshold is very small but if you scale even this current at 0 VT or small VT the current is very high so off current off current means transistors switched off officially input VGS is smaller than VT but there is a current okay this is where is wearing us the most right now how to actually bring them back to but if you reduce VT this will happen that is the problem we are scaling we are reducing VDD we are reducing VT if you reduce VT the power low power actually off power increases so now here is a case whether you want really low power or you want to off power to be less so design and design means new technology he says you do this I want this so why every time we come back and say that new technology has appeared because someone else is asking I want this then one has to plan device people as to think get models then we use those models create new technologies which will fit into those okay and that is why the research in technology is advancing day by day though much of the industry is not changing very much because I say they want the standard products so the new technologies go ten years or five years ahead afterwards they go into the actual fab okay okay so if you look for data from Intel IBM AMD Motorola loose and many companies everyone has tried and one is trying to reduce the if you reduce the dimensions the current does not remain keep increasing as the scaling law says actually it saturates you can say it saturates which essentially means why scale below 0.1 micron less than 100 nanometer if on current is that we speed cannot be improved irrespective because on current is fixed okay then if I want to increase speed somehow I must reduce the capacitance because CDV by DD all that I have in hand or I fool the circuit saying that oh you still can run faster though my current is only this there are methods called paralleling pipelining this is designers will tell you if I am teaching design course there I will tell in case after I am not teaching so there are circuit methods are now searched because technology says at these technologies currents cannot be improved for the on state okay do whatever it is okay so whenever you do something you have to understand I am giving something at the cost of receiving something so now I say I will scale down everything I put more devices more 8 million transits 800 million transits output but your speed is not improving okay so technology you are reduced to 14 to 11 nanometers but speed is not going so externally something has to be done to improve your speeds okay by speeds I already said video games nothing else this is some kind of status from Intel many years ago this is this is leakage current and one can see 50% of the is already reaching as a leakage path okay so we are worried then later as I say in 30 nanometer down technologies off current was 66% so why do I circuit which is losing power without doing anything okay but that is the game there are also this limits as I say just to show you different devices systems which are available in market there is a operational frequency varies from 1 gigahertz to say 100 gigahertz different systems are there mobile digital AV or computing network routers servers each has different technology because each has done different requirement so when I say technologies are actually looking for the product is that point clear to you why so many technologies because technology needs something idea product needs something so technology is scattering that kind of there is no universal technology okay each kind of applications because like for example cellular works around 899 megahertz or one gigahertz at best so the kind of thing we can say sub-threshold current we want there should be very low because low power I want okay that frequencies are I don't want very high so I may probably able to get something out of it but if someone say I want 100 gigahertz I am low power I am not achieving because then I am going to hire leakages okay so every product has a different line and different companies catered to different products not every company enters every market because that's the way they cannot survive okay a lot of cost at the because of that this is something which in 2000 we tried and I'll show you the latest one we were trying to say that if I start scaling the dimensions the oxide thickness of a mass transistor also scales down so for example by scaling down to say 22 nanometers or even lower the oxide thickness required is less than 5m strong okay half a nanometer half nanometer now if your oxide thickness is half nanometer or lower is called thickness of the oxide or insulator one atom of silicon dioxide will require five is silica silicon layer as a 5m strong dia that is so I cannot have less than one monolayer you want to have reduction lower lower than that so I made a trick what I did is I said fine I can't scale down less than say 10 nanometers of this one nanometer so I did something like this this is my capacitor is my insulator this is my gate this is a standard capacitor this is a mass capacitor the capacitance of this oxide whatever it is epsilon ox ks epsilon 0 multiplied by area divided by oxide thickness so if you scale you reduce dimensions w and l a area also reduces by square law oxide thickness goes linearly by the the ratio we want to scale down let's say s is the ratio so t ox by s a will go a by s square because area you reduce that much by each dimension you can look at it this dimension and this dimension if I scale the area reduces by a square okay so I reduce area but I reduce oxide thickness by only s okay now if I start say oxide has to be less than 5m strong I cannot I know so I said okay area I cannot reduce too much because that is decided by the other currents of requirements so I figured out if I somehow increase my oxide thickness proportion to reduction in oxide I mean dielectric constant of oxide they use proportion how much I lose in oxide and let's say I decide 10 I'm strong as I can grow minimum or maybe 50 I can grow then as many times I have a dielectric material which is that much dielectric constant so let's say I cannot go less than some four times this dielectric material which is four times dielectric constant of silicon dioxide these are called high k silicon dioxide as a dielectric constant of 3.9 we are looking for materials which has at least 12 16 25 maybe 100 because if I increase ox this insulator thickness then I can have a more reliability I can create so many atoms I can put there without worries okay the other problem started if I wear thin oxide which is what let's say it is less than 10 I'm strong this is essentially punch through that means little electric field will allow electrons to go through the thin oxide it is called tunneling so you cannot have too less thickness of material there because it will then short circuit the gate which means I cannot really work on very thin oxides anyway okay there are other problems pinholes and many other issues in oxide of thin nature but this is one problem of this I can't scale down thickness too much and if I can the only possibility was to go for a higher dielectric constant materials so the new technologies are high k dielectric technologies and not silicon dioxide okay this is the only difference which new to come but to create a high k is not very easy because the materials which should stand silicon dioxide is the ideal material in every sense okay it's the greatest material probably IC people think it has a very high dielectric constant it has a I mean very high dielectric strength it can go up to where 10 to power 7 volt per centimeter fields it is unachievable in most cases except fluorine atoms it cannot be etched away easily it is very hard it remains into its it's a melting point is 1900 or everything what you think the best for an insulator it has a band gap of 9 electron volt so no electron can easily go through it all possible goodness was in silicon dioxide much easier to grow silicon oxidize your oxide so everything was in favor of silicon dioxide we still are using don't think I'm being used but the time has come and we say oh if you cannot do less than this what do we do so the new attempt is now to look for what they call high k materials okay and what are the choice we'll see later is that point clear so why high k have come because as scaling goes oxide thickness reached limits now okay so I oxydermen silicon dioxide so we are now looking for new materials it was a predictor as early as in 2001 what will be the microprocessor trend and this is very interesting to show you see 1972 2000 to 2008 what Intel thought and by prediction and by doing design that they will go for 30 gigahertz frequencies with 25 nanometer length get lengths okay oxide of 700 amstrong's 70 amstrong's what essentially they were looking for data instruction per second that's the ultimate aim everyone is looking for we figured out if we do so the heat was the major power okay what is the order has happened in that the power dissipation using the older technology 2021 10 watt per centimeter square was the temperature I mean what it was consuming dense power density which is like a hot plate in 2000 see when we went to the newer technology it became 100 watts per centimeter square which is like a surface of a nuclear the temperature at the surface of a nuclear reactor in 2010 this increased to 1000 watt per centimeter square which is like the temperature at the rocket nozzle okay and in 2016 it may become 10,000 watt per centimeter like a sun surface so the major worries are actually coming from somewhere else okay you may say I improve technology I improve speed but at what cost okay so one has to understand why technologies get limited even if they think to be very ideal when I do simulations I get everything excellent but in reality nothing works okay the reason is there is a gap between what happens and how much you understood that is why research is to be done what is happening and what I did not understand is what is major effort is going on okay so just to give you this heat is major worry so that's why I say what for packaging which can remove faster heat you are your money okay the another problem came in technology now is as I scaled down all the parameters did not remain constant over a wafer or even on a die or even on a transistors okay so for a if you have a 12 inch wafer each die may be 2 centimeter by 2 centimeter let's say there may be 10,000 million transistors or 10 million transistors there the parameters process parameters like thickness of everything which I thought should go everywhere is not everywhere same so there is a variation going on it's called variability so there is a variability on every parameter I do the net result if I see and this is a old technology graph from Intel I have my own my student I work recently so for a 0.1 micron 0.18 process they are measured thousand samples they figured out there is a threshold shift of 30 millivolt in a 0.8 1.2 millivolt doesn't seem to be very big but in a 0.8 and this 10% which will go there may be 0.6 60 millivolt 100 millivolt 10% variation is expected now and if that happens my threshold will be already everywhere so all chips will be working at different speed different power dissipation sometime logic may even fail analog gains will not be obtained in some chips they are working some chips they are not working my design is ideal for everyone but it's not working so now the question is how to take a design designer should take care in the process variation which will appear irrespective what I do okay so now there is a earlier designers used to be computer scientists in most cases electrical entered little late and they always used to look down this e student e people or technology now they had to come to our base and say please tell us sir what can we do that's the time okay because unless they understand what's happening they can't design okay so now it is a co-design goes with both computer scientists and electrical chemistry civil everyone sits together and actually see what a chip can do best possible for a given technology so this is something a new that's why we have always been teaching micro electronic independent of everything whether you like or you don't like we teach devices we teach technology which is systems we teach design why because we believe in 2005 onwards everyone must know everything okay see earlier older technologies if you have an inverter the path delay was known the reason was if you plot the probability of getting one delay let's say propagation delay tpd it was almost constant okay at a given value okay but now is Gaussian so what BT I should use I don't know what delay I'll get I don't know so if circuit is performing differently a different point of the chip and at this so what we do now in design is we look for what we call the slowest path called critical path and actually design for it so I know in somewhere I am over designing because that's the unfortunate but at least the least one will work better so lot of money is invested to get critical part designs okay lot of area goes lot of parallelism has to be done but that's the only way variability can be handled now okay this is what I said as I scale down many things I cannot do either by economic or by physics this is called red brick wall can't go and as I said humans are very smart new technologies will appear and I already appeared these are called nanotech CAEN is called self-assembled chemically electronic nanotechnologies and also in lithography we are working on technology called extreme ultraviolet UVs last eight years there is a effort all across the world to design a system of UV which we are not able to one think of it what is this you it has come the smallest feature lithography can produce is they given by its wavelength okay optic says it is less than wavelength you can't separate because there will be a diffraction around so you want to separate two lines areas so we must have wavelength which is of the order but we are made very nice gains we are the lowest of the wavelength we are using is 193 nanometer UV okay 193 which is still 2014 also we are working we are trying to see it goes to 10 nanometers then I can make 3 nanometer device so I am trying to reduce this so we are trying to push the energy is equal to a C by lambda so I am trying to see whether energy can be pushed okay and if energy is pushed lambda will actually go down so we are looking for optical lithography okay even now ultraviolet which has a wavelength of the order of tens of nanometer not 193 but as humans are ingenious I mean genius they actually have figured out even with 193 people are made 11 nanometer transistors for their issues their cost involved they are reality issues but this called multiple water based newly lithography techniques which we have worked however it is cost so they are working 8 to 10 years on UV and I know many come you know universities are fewer in industries I know many of them who are working and they every time they meet they say or next year but this next year syndrome is very bad because when the next year appears it become present year so the next year okay so never reach next year because next year become present again next year so last 8 years UV has not come but if it comes this 5 nanometer is achievable very easily this is the progression we started with 90 nanometer with gate length of 50 and by 2004 we already reached 10 nanometer gate lengths 22 nanometer node today we are working on 16 nanometer mostly and 11 is of course possible it has already shown it's working 7 also has worked so I don't know at then where it will go 0 probably but this is what is the way progress is done so for each of them there is a different technology constraints and they are to be solved and that is how the new technology new known means new technology after electron wavelength will decide how best features you can create that's what I just now said 10 nanometer was initially possible we are looking for one nanometer now let's see whether we can just look at this 5 nanometer gate length CMOS is a real nano device okay it has a length of 18 silicon atoms okay you can see a count and in 2000 itself 3 itself this device was made okay so it is not that one is not able to make lower technology nodes but if I made millions of them only 2 3 may work maybe good in IIT but no industry buys it actually okay so the not that technology is not known but reliability is the major cracks which is not still achievable okay IVs have worked everything looked to be good switch a good switching technologies there is another problem which is called okay maybe this as you scale down the thickness of channel I mean this also gate thickness one can see that we always thought electron cannot normally cross the they have to have energy enough to cross but there is a possibility of tunnel okay because a variety of effects 3 nanometers you do it will just cross okay then there is atomic distance 3 amstrons what else 2.61 is the minimum bond length that's it so you can't put less than atom otherwise what we'll do however all seven done but no one knows the future today what I am saying in 88 90s when I was teaching I said something which is proved absolutely wrong by now so today if I predict something in another 10 years 20 years it will be proved absolutely wrong so I don't want to predict great future but there is something I see fundamental limits 0.8 nanometer for example has only three atoms distance for pointed nanometer means three silicon atoms so we are really looking for numbers which are countable in quantum mechanics we have large number and therefore statistics was allowed if I have one two three how can I how I will say okay this electron moves with this velocity so what is quantum in it you can say it is the effect is because of quantization but actually classical mechanics can be applied I have one electron this is the mass this is the field it should go with this so now the issue has started physics is also okay if I go down to this all device people talk too big is that valid now your model may be good but whether it is valid so there is an issue coming on even in physics now whether it's good enough to have models which will work for less than nanometer than nanometers so we are now in the limitation do you believe this or do not your choice okay that I say there is one solution is the higher dielectric constant how do I make high k I figured out there are certain materials high which are higher dielectric constant and also they actually fit into silicon technology that's most a compatibility they should have and upsets they should have good dielectric constant very thermal in stabilities so we figured out half-nium oxide is ideal candidate for many years even now most of the silicon chips coming from Intel ti are using half-nium oxide maybe little nitrogen they're called half-nium oxide right but that's what the new technologies they have me and my colleagues in Tokyo Institute they have been working earlier than me I just go two months touch hand there I am also part we are working on new material then of course that was so new third material has appeared lanthanum oxide now lanthanum has a higher dielectric constant than half nium but it has compatibility with silicon process is not very good but it has a very we don't need much thicker in interfacial layer between silicon and silicon dioxide I mean lanthanum oxide otherwise you need a buffer in between so most of the research in last five seven years I was involved in Japan was on lanthanum we also there group is also worked on European Gallaudium Einstein and all kinds of high materials which are unknown to us from the periodic table only when you see oh you see oh these are also materials so we started looking many of those their oxides we should be first thing they should be good dielectric okay so good dielectric should a good dielectric strength reproducible technology wise and compatible to CMOS silicon process that is major so you have very limited research but we are still working American also was tried failed it's very leaky as I said there is a word we use called EOT equivalent oxide thickness silicon dioxide is major thickness so 1 nanometer EOT is for silicon dioxide equivalent to this multiplied by dielectric constant and that is equivalent oxides so even if dielectric constant is higher we divide by equal to silicon dioxide and find what is equivalent thickness so we started with 1 nanometer and current this is around 0.2 nanometers also can be possible for EOT's 11 nanometer process first half of 2015 or 2016 will be actually on production we hope so only I only can predict this is what high case looks like a actual device which was made in TIT and we have a metal gate instead of silicon gate which also is another change in technology and this is a high K gate based chip design this has a small 4 bit microprocessor which has a bank of SRAMs this has a EOT of 1 nanometers we have worked on 0.48 okay and it gives good IV characteristics that's that's what the importance is we are the way Intel works Intel has been working on process which is called one of the major interest in high speed was if you look at it since the most one of the most important thing in current is I is proportional to Mu in MOS transistors IDS is proportional to Mu C ox okay so the speed is limited by available mobilities so in silicon at a given high fields typically it may be around 600 centimeter square per volt second is the highest mobility one can get in a MOS structure one army may get even 400 450 best device may be 600 1200 is 1300 is this actual belt material but at the surface this is the only possibility because of scatterings now if I want to improve this I must somehow see scattering be reduced and if scattering is reduced I can certainly all I have a different material silicon instead of silicon which has higher mobility like gallium arsenide 8500 so I have at least six times higher okay but then the issue started coming something like this if I velocity is normally mobility times the electric field if I plot this we believe it is something only linear but in reality most semiconductors actually show something like this or if not following saturates okay which means after certain electric field irrespective what you do the velocity is fixed current is Q into V and to N number of carriers Q and V is the current so if we saturates that's the end of it okay so how can I increase the current by increasing electric field because I get saturated so I must somehow have a technology or somehow have a material you still remain here so I increase the field I must get higher currents okay and therefore mobile or mobility itself should be high enough slope is something like this okay if that happens then I have higher speed circuits okay so once Intel is trying or I have been doing last 10 years they figured out mobility varies with strains okay if you know you are a mechanical engineer first year some way we are learned young some odours and many other start simple thing there we said that says proportion to strain and if it exceeds that certain value which is called from their permanent strain appears okay so we figured out that if I have a strain material in one direction or the mobility where carriers are going in that direction can improve okay so if I put instead of normal silicon the source drain made of silicon germanium then it gives a permanent strain because silicon germanium lattices are not same lattice constants so there is a strain and they give larger mobility along the lateral directions okay this is essentially called compressive strains so you have a large mobility in P channel device for n channel what they did that instead of normal silicon dioxide covers they actually put nitrides and they give transfers sorry the tensile strength in the material which actually improved for n channel device the mobility in lateral directions so now the new technology they have is not new 10 years silicon germanium here and silicon nitride at the top they are actually making mobility is much higher compared to what the limit was 600 we can go at least 800 to 900 now or even 1000 so these are look these are only technology which we figured out we can do this okay however if you want higher than go for other materials look for silicon I mean silicon carbide you may look for silicon nitride silicon nitride based on this carbon nanotubes refined based tubes all kinds of newer processes will be required if I want much higher mobility is then what you are now getting and the whole research based on this so there is a search for new material for gate new high key material new channel materials keep working every year new technology appears new different for source drain so even if you say that so much is known still there is so much to do okay so don't think that oh it's all over it's nothing is over till it is over they're facing nothing is over till it is over okay so till it is over is too far okay maybe few other slides I'll show you in the last what is going to happen technology progression we went from berksy mass we went for fully depleted a silicon SOI silicon on insulator devices strain silicon we are looking for high gates this is called double gate FET which is very first better mass transistor created we can make third few more gates similar it's called try gates or double triple fin gate or multi-fin gates which is what Intel is working so these will give better performance compared to because there is a problem which I never said when I scale down there is a effect called short channel effect because of that mobility actually is reduced so whatever you are trying to achieve actually it is lost simply because and there is a possibility of tunneling in the oxide because of short channels now because of this problem of scaling we are looking for near technologies in which these effects can be minimized even if I scale down and these structures which I show showing you essentially takes care of that okay this is berksy mass this is fully depleted silicon on insulator strain silicon double gate triple gate silicon germanium heterostructures then now we are also looking for germanium transistor back to what we were early in 1960s 40s we are looking germanium again okay it has more advantage but germanium on silicon not only pure germanium we are looking for nano wires we are looking for nano tubes we are looking for single transistor devices we are looking for spin devices which are magnetically controlled so there are number of devices under which may have two nanometer kind of structures and we actually do very high speed performance very low power performance but why we are not reached so fast they also can have optical devices made out of that so the problem there is all this cost and reliability if you can make systems which are highly reliable low cost only then this may go into fab of a company but effort is on and I think there is no reason why we will not be able to reach and the most optimist there are two kinds of people you know as I think many people know if the glass is half filled say an optimist say it is half full a pessimist says half empty it is a matter of your way okay this is the carbon nanotube which is what it looks like it is a hexagonal structure and there is a new material a new nanowire has appeared which is based on graphene graphene is the one form of a carbon which has a hexagonal diamond lattice okay and because it is one of the hardest material right now available on the earth okay so one is looking for graphene as the new material for interconnect between either interconnect or between instead of normal carbon nanotube we are trying to put graphene films there okay it is suggested electron behavior in circuitry made of ultra-thin layers of graphite known as graphene it suggests the material could provide foundation for a new generation of nanometer scale devices that manipulate electrons as waves and that is most important electrons are not no more particles they will act like a EM wave okay and that is what we are looking for and therefore we can make photonic systems out of this material okay because we need photons okay so that is something what is coming this is the major feature of people who are looking in devices the band structure of graphene is very funny there is no band gap like semi-conductors there is no overlap like metals okay but conduction band and valence band meet at one point at 1k okay so you can control the current motion only when you reach that k so that if you are away from that no current if you are at that this momentum you get current on and off okay so graphene can now be also looked as a switch device which is very recent and people are looking for it look at the normal band gap of silicon is as a band gap of 1.1 EV between conduction band and a valence band there is no there is only one point where it has common point 2004 to scientists and regime and no slow both from Manchester University won the Nobel Prize for their graphene research before that carbon is known for 200 years earlier or maybe earlier coal is known many many years devices people also know as early as 30s or 20s microphones were used with carbon films so it is not that carbon was unknown okay but it took almost 180 years before graphene based devices were thought okay so someone has to even whatever people say now Newton could see that apple falling where apples are still falling something else is also falling or we don't care but Newton cared that okay so same way things are still happening you are still chance to win the Nobel Prize this is what it is this is a normal mass transistor and this is graphene as a small film below so there is the electron move through the graphene area their conductive is very very high typically it could be infinite also in ideal case so huge currents can actually for no on resistance okay so it can be very high speed device this is what is being tried so we are working for a I don't know whether you are so far now there is a micro band which goes around 100 gigahertz micro waves or millimeter waves then we have optical range which goes around 1000 microns and about okay infrared and above there is a in between band which is called Terahertz band and it is not being used by anyone actually and this is the band which graphene may allow okay and that is why this material is now ideal material for photonics ideal material for semiconductor based research and ideal material for EMBase theories so this material probably may actually revolutionize our thinking so new technologies are coming last but not the least compared to graphene there is another example we are trying can I replay what were my problem when the carrier go from source to drain they scatter and therefore mobility goes down if I keep a vacuum no interactions mean free path is infinite so all carriers will go if I do this then the vacuum tubes are 1906 I am bringing back okay that's what they did okay so I am now trying to create a vacuum tube in a semiconductor okay how to create this vacuum here is a game which is not so easy but possibly yes okay and therefore tomorrow you may see a solid state vacuum tube okay which is the okay we will move further there are many quantum dot devices very applications this is interesting many of these devices which coulomb these are called coulomb blockade devices they work on tunneling there is a lion and there is a human being of course now you can say leopard okay there is a barrier there is a barrier and maybe we have made a fencing which was very small or probably has cut many places which are reasons so lepers couldn't crime for some years one or two years leopard did not come to our side because the barrier was too big for them what they did some humans help them and cut the wires make a ditch so now they can cross across this barrier without climbing and they can chase you okay this is tunneling based on this the new devices may come which are called coulomb blockades the advantage is when they cannot go upstate when they can go on state switch very fast tunneling is a very high-speed phenomena so one expect very high-speed transistors coming out of coulomb blockade devices last one a female is a very famous physicist he made what I want to talk about is the problem of manipulating and controlling things on a small scale because they used to have always macro scale physics always used to work on macro scales so why cannot we write entire 24 volumes of encyclopedia Britannica on the head of a pin why don't think like this okay that's micro or nano structures okay this is Finman's idea in 59 we are still working for him okay by the way he was a famous novel narrative and very funny person very interesting person they say the last part is there are some molecules which can self-align in solutions or by applying light these are called self-aligned structures okay so you can see there are some materials you can inject the atoms will come and self-aligned no lithography you decide where they will sit there okay so something may appear of course success but again large numbers is not a success the problem in lithography can be solved or not solve is the major cracks etching it should be dry or H that okay so last but not the least I may say limitation of CMOS in 10 years we are looking for 8 electrons per bit manufacturing cost 50 billion dollars per fab line I said 8 now it may become this noose loss scaling to end questions we don't know however humans are great we are now looking for a brand new world which has come from one professor Nathan from Berkeley you can see every kind of system can be built on silicon or substrate okay you have a CMOS devices we are silicon germanium hetero junction devices we are fiber optics connection we have LEDs silicon LEDs we are silicon germanium optical waveguides we are silicon germanium optical detectors we are quantum dot based devices okay all in one okay all in one so any kind of system you think probably is doable if only you apply your mind and time okay the interesting this will be shown on your my my website so one last word for you do not believe a textbook statement or a researcher statement blindly including me never give up as no one knows future there would always be a solution think think and think all wait for the time when someone else will think for you that's most of us do that so as much as you can think probably there is a hope many slides were taken from various people various sites so I acknowledge all of them you are Hiroshi is my close friend he gave me many slides shaker borker from Intel gave me slide press alone strong highlights marsha they also gave their slide so these slides are as per permissions and they are not shown without their permissions thank you