 So far we have done crystal growth, we have done diffusion, we have done the integral circuit lab facilities, what are they? And we also looked into last time the thermal oxidation which was the major activity as far as IIT Bombay microelectronics group is concerned, we keep working on MOS, MOS, MOS or name like that MOS, okay. So let us look into now further and we have started last time something called lithography and why that is the most important process, lithography, litho stands for some kind of sculpture or some kind of image, 2D or 3D image or 3D picture or 3D material or a statue or anything, litho, generally made out of some metals or stones or something. So lithography, reprinting what you see on somewhere else is called lithography, okay. The major, most of you are, I do not know how, nowadays with the cameras available you do not need to do what I am now going to say, when in my, not really childhood, when I was young enough, we used to have a camera called a box camera and it used to work also, black and white, simple pinhole and it used to flash something. So how is it acting? So same process which we do on a photography probably is transferred in the lithography here, okay. We are trying to take an image and transferring somewhere, okay. So now this is like in photography what is that, you have a film which is coated with some emulsion and you, that emulsion film is inside your camera, you press the shutter, it opens for a while given 10 seconds or lower, depends on the resist you have there and as the light shines on the emulsion, part of the emulsion is converted into, this is normally silver sulphides or silver chloride which is emulsion plates and silver is reduced to silver and that becomes hard and light cannot pass through silver, okay. So the way we do it there, then when you develop the rest of the emulsion goes away except the silver part and that is the image. So if you are thinking this is the portion where light did not come there, so we say that your human image has come there. Similarly similar procedure, you expose and you develop, you actually have to stabilize, so there is few more things you have to do. So this is a photography which we have been doing, Aegis, the company which actually, the person who actually did this has a name Stanford, he is not same Stanford, a Stanford University man but he has a bold patent for image this and the first photograph he took was a running horse, okay, that faced him the patent, okay. So they can imagine what reality could be, okay, still now we are following it. The only difference now we have, instead of an emulsion plates, we have some kind of a pixels which are made of CCDs or some other kinds, diodes or buckets and actually light shines on that, okay. So whenever light shines or does not shine, something happens on this charged storage or not storage and that is the image it stores and since charge is the one which we can easily recognize in electrical, so one can convert into so much charge one and so much not charge zeros, so one can digitize a picture. Earlier we used to analog, okay, now we can do digital pixels, so large number of pixels, how many get exposed, we will decide the size and accuracy of your image. I didn't tell to this what I said is done in lithography, okay. So word which we used last time was photolithography, e-beam lithography and x-ray beam lithography. Of course x-rays will never come, probably only will remain in the textbooks, first it is very costly and it actually affects the silicon devices, so normally say radiation effect it gives, so normally x-rays are not preferred and its mask is very difficult, you need a leather mask, it is tough to handle. There is a fourth one which I did not, ion beam which may or may not come at all, okay. However e-beam lithography and photolithography will continue to work for us, okay. We will see both of them, even now for the at least 28 nanometer technology nodes or even 22, we are still working on photolithography. Now this word is slightly not clear to you but soon it will be that what is this feature has to with lithography or photolithography. If you see any light shining through a lens on an in object, so the way it is that normally a convex lens if you are keeping a source of the light somewhere closer to focal point then it will be parallel beam will come if the parallel beam appears, it will focus at the focal point, so this simple optics is still known, okay and we still use that. So now we say that apart from the lens being what it is that refractive index of 1.45 but it has a curvature, it has a dia which is coming from a sphere, this lens is cut actually, so there is a dia associated with it and there is also word called radius of curvature, okay. Now these terms are very popular in optics, okay. However we will require some of them if not all of them, there is a word called numerical aperture, there is a word called mean time functions, there are many terms, Rayleigh's fringes, Fresnel fringes, all these optical terms are required because light will behave as it say, it will diffract, it will have estimation, it will have all 7 possible aberrations. Now we want to avoid this because smaller the image we want to create, smaller is the aberration I am expecting, is that clear? So sharper image I want and a smaller image I want that is what the node is asking, you go from 65 to 45 you say 0.7 time I will reduce everything. Now if you reduce the dimension the image also has to be accurate even at the 0.7 times, okay and you go on further to 45, 32, 22 and may be 0 later. Now this progression of technology node essentially depends on how good is your lithography, the word which we use often there is resolution, okay. So before we start something I may just show you what is resolution, this is called the smallest pattern which intermediate circuit may actually require it to print on silicon and there is another one very close by and this is separated by some distance S, let us say this is W, this is length. So I want not only W and L to be transferred as it is but also I want separation between two patterns also identical, same as if there are multiple such patterns they should be separated identically everywhere by same amount and W by L should remain constant throughout for each of patterns. This is what I am expecting at the end of the day but if I reduce the dimensions the problem right now I am waiting is this is called resolution, separation of two lines or two patterns, this is called resolution. How good you can resolve two lines, how close you can bring they still remain two separate lines, this is called resolution. So one of the major feature of lithography is how to improve or how to get at least the available these resolutions, okay. Because on an integrated circuit these days you may have 1 billion transistors on a 2 centimeter by 2 centimeter chip or may be slightly less 2 by 1.5, 3 square mm, 3 square centimeters. Now 1 billion transistor will require huge number of interconnects, huge number of transistor areas and they will have a smaller patterns everywhere. In general the digital designers of sorry the designers actually provide the output of a VLSI design course is these patterns, okay. This is what we actually design there from the circuit simulation, from the system simulation to RTL to VHDL to finally to circuit simulations and layouts, the layout is the one which is your last output which is called the pattern generation. Once the patterns are available you transfer all of it and you transfer it the word is called tape out. So you actually create the patterns on it actually earlier used to have MAC tapes and since we used to send the MAC tapes to a file house, so we used to call it tape out. Now no one sends it, it is a serious transfer data even on an internet, okay and therefore there is no necessity of sending CDs or DVDs or tape or anything, the data is just transferred, okay. Now this essentially is what called tape out for a company. If you go to any company which has a design company then generally a white board or like nowadays there are screens like this, better companies and they will keep showing how many pressures they are and for each of them they will have a tape out date. All engineers can go like here 120 do not 124 never show up, it is okay there also no one forces it to come but that tape out date cannot be missed or in some exam date cannot be changed, okay same way, okay. So that you come anytime then 24 hours does not matter at the end of the day group must give you the tape out, okay and there has to be a lot of verification and lot of designs goes on. So this is what essentially we are trying to emulate here that tape out if you have to create I must create patterns. For example, I do not know we do not have colors in VLSI normally the layout actually explained through colors because each layer like diffusion, implant or poly or each are given some colors so that I can actually do what I really want to show. So for example if this is my p region diffusion done which are my source drain diffusion may be p plus and if I intersect this by a poly which is not this is normally green and this is normally red if you have a layout editor somewhere on a screen you can see a pink line or pink this intersecting the this. Now this is a transistor, this is your gate, this is a source and this is a drain or source drain are identical then it can be S and D. Now this is the one can say the pattern which you are seeing is essentially plan but what goes into silicon is something like this maybe I should show you little differently. This is my source drain and this is my oxide and this is my gate. Let us say this is N okay this is N substrate p plus p plus this is also p plus. So if you see a cross section in a wafer I see a transistor in this but if you look at the plan then you can see this poly which is the gate and maybe here is a metal for source drain but right now I am not showing. So corresponding to this there will be a diffusion line which is from here to here and which is intercepted by oh sorry I changed the color but does not matter this this is my source drain, this is my channel length and this is my channel width rather it should be other way links are normally smaller compared to widths. So this is the plan and this is the cross section and nowadays since electrical engineers do not learn drawings so they may have some problems but one can still visualize okay. So mechanical drawing was a company's course in all BTEC programs earlier. Now of course even mechanical do not have so why should we have okay. So interesting things are happening they say everything can be done by simulation so why do it? You cannot simulate your food inside if that can be done that is everything is solved you have to still earn money to cook food eat food do everything which is reality but when it comes to doing something we say you can always done by simulation. So if simulation works for everything then it would have been okay but it is not true. So let us learn what is reality. So if this is the plan which these are two masks in fact this is one mask and this is the other mask. Mask means selective area of poly selective area of diffusion or implants are essentially possible if I protect one area and do the other process therefore these are called patterns which acts like a mask for the other process. So a designer essentially when he finds out W by L through circuit simulation or many other simulations or that he gives me W by L's okay then if I want to interconnect I open a window somewhere here in the source drain I can open a window I can open a window and gate and then metal can run so another mask will be required okay. So if I have to do selective area processing I must generate patterns which are masks for next step. Now this is what designer will give me this is what technology has to do is that clear. So what are we expecting whatever designers have done should get transferred on silicon as it is because you have used that simulations law of simulations to arrive at this value for circuit performance. You say I want this much speed I want this noise margin I want this fan outs you have designed everything on that basis and now you say okay each transistor has these W by L these are the connections and this acts like a circuit. The process has to follow what it is okay. If process cannot follow then this circuit performance will be different from what you designed and this may happen. So what will you do? We will see the actually before actually committing on silicon what we do is whatever pattern we create interconnects for all of them we extract back the circuit from the patterns we actually create the circuit back and resimulate and if the initial simulation result do not match with extracted one we tweak our circuit data and again keep doing till this within the errors extracted result is same as starting result starting data. This is then transferred to silicon you thought oh simulation has been performed back extraction has been done so it should work that is only the computer added tool has shown it will work when it comes to silicon it does not bear the way you wish it. So how does this technology people tell designers that okay unless you follow certain rules I cannot guarantee what you are saying I can transfer these are called design rules okay that is what technology people give their constraints and these are available to designers to follow during their pattern generations. If you follow them then hopefully silicon people will say okay I can now make circuit to your spec possible okay there may be still errors may be one more turn around may be required before I get out of everything but that is the cost involved okay. So please remember what is the overall procedure we are looking into and since we are from design to patterns we are trying to transfer this transfer is the major activity in whole integrated circuits. Typically a CMOS process may require as many as 16 mask minimum which is what plumber and Griffin's book has shown but may require 24 to 32 mask depending on additional features you are creating okay. So these many masks so what is the problem you can see from here this pattern of say gate and this diffusion area there has a limit which will come how much distance minimum you should keep how much is the age to age you should keep these are design rules but when you really transfer them they do not follows equivalent rules okay. So how would they follow and how much is tolerance you have which is acceptable okay this is what we are really looking into process that how much tolerance I should have. Now the problem is alignment there will not be a single transistor there will be millions of transistor for example these are something so I want to open a window here I want to open a window here and there are n such everywhere but these second mask should get inside on the last pattern okay this is called mask alignment. So we are worried about the first mask I print so one image I can see when I print the second mask for the second process I must see that the next pattern sits where I expect on all the million transistors or billion transistors on chip okay and there will be on a dayfall hundreds of such chips so each such chip will have each such billion transistor each everywhere the six that those patterns should get inside that is called mask alignment. So you need a mask alignment system in which you can create multiple chips at a time that is what because cost goes by number of good chips available per wafer and therefore one has to make the reliability so strong yield is so high that you can make some money okay. The typical lab as I said you for this 14 nanometer lab has cost 6 billion dollars to Intel recently last year and even though it is not over they are still trying to make up EUV systems which may cost another billion dollars so it may you can imagine how much money they will pump to just go to a process which will have 11 nanometer circuits why do they are looking for 11 because they feel if I can pack more transistors on a chip larger systems I can build and a larger system more likely to work better than the distances apart reliability wise and therefore more money I can generate. So that is the investment because you are going to buy all kinds of electronics in next many years and that is their whole hope that every 10th day iPhone should be iPhone 6, 7, 8, 9 because if that happens and you keep buying only then the apple will survive otherwise Apple will be bound up in no time okay Apple has invested so much money it will not be there if you do not change the phone you do not stand in the line in the night whole night to get iPhone 6 God knows why but that is what people do okay. So is that interaction clear what is that we are planning and what is that our effort is and why we are so much worried about transfer of images on silicon okay. So selective area is all that I am processing I am looking for and maybe one figure I first show you and then maybe I will show you the actual something I will show you. So for example okay this is lithography this is very simple CMOS transistor the way we start is we start with a p substrate this is to avoid this I have made it three dimension even books gives it so it is not very novel or something this is three dimensional figures so please remember MOS transistor is a 3D device okay though patterns are 2D's but in reality they are 3D devices. So normally what do we say it this is length X maybe this is sorry this is X this is Y and this is Z so all three dimensions are required to actually model a MOS transistor then we do lot of physics we say okay one is longer than the other so in electric field is die down after some time so we use two dimensions okay but that is only a matter of decisions okay. So what we do is we start with a p substrate and create two regions one is called n well the other is called p well okay. Now one can say for n MOS transistor I need p substrate so it was already available but their doping are not very much what I wanted with normally I will start with a very low dope vapors and then I will create n well and p well areas to make my p channel and n channel device so p channel device will come in the n well and n channel device will come into the p well. Now these two are normally implant regions so one process will be do is next time after lithography is implants now one can see there is a thick oxide shown here some interesting features of oxide which I did not do last time I thought maybe processing time I will show you how this upper lower thicker oxides are grown okay very interesting method this is called local oxidation of silicon so we will see that. So we need now first mask to create this must be in which p well will be opened area where p diffusion will implant will go at that time all other regions should be protected is that clear when I am making a p well I must close all n sorry I am making n well I must shut every other region so that impurities other than n type can not go anywhere. So first mask should be to well mask okay n well mask then I will put another mask which can be a very interesting thing we do it is called minus mask whatever n well mask I can use n well minus mask which is complementary mask for that and I will use that so it will open p well but rest of the areas will block so we would say n well is blocked and I get p wells once I make p well I will again block n areas and actually do gate first I can do gate both side together so this thin oxide I must open windows I must put some way thin gate oxides on both regions to make gate for both n channel and p channel. So I will deposit poly so I will restrict poly only in the gate the rest area poly should go away okay then I will implant source drain so when I am doing for n n n type transistor I will do say arsenic or phosphorus and at that time this area must get blocked okay only n should come here when I will do p well p channel device this area should be blocked and only p impurities be allowed in so there will be 2 masks just for making source drains okay same will be diffusions on polys as we do okay then we require contact so we must open contact to source drain source drain also to poly somewhere we will show you so we need contact opening where silicon will be made available for metal to connect but the way I deposit metal it will go everywhere again the process is universal I cannot say selective depositions are very different so I will deposit everywhere and selectively edge the rest which is I do not want okay that is called mask so rest area should get edged and some areas do not get edge is what mask will allow you is that clear so then I can open windows here here here I will put metal on this and H out metals from the contact this regions one metal here one metal here one metal here and this 2 metal may connect to each other and I will form a CMOS the way we do it in general for every process step there is a resist sitting on a wafer okay there is a resist now what is the resist is the word which we are photo resist as the word for photolithography will use now this is the mask from the mask patterns this is the image which is sitting on the resist layer let us say some patterns are sitting on the resist layer but this image must transfer below through the resist thickness is that point clear there is a thick layer of resist the patterns are sitting here because your mask is sitting here now this light may pass through and allow on the top surface this image to be transferred but I want all the way it goes to full thickness of the resist and whatever dimensions I had there should remain as day I go down okay this is the actual challenge for lithography the image at the surface of a resist is called aerial image so from aerial image to silicon image it should be as good as possible and there are many problems in the resist when it does not allow aerial image firstly from the mask to aerial image there will be some errors and from aerial image to the silicon image or silicon surface image is even different okay how good you all three match is your expertise and the cost involved on actually making as good okay so this is essentially a lithographic process so first thing is you must have a pattern which will have some dark and this region will show you this little later and once we shine light the dark portion light cannot go the clear portion light will go some resist will get light some resist may not get light and once the resist property I will use some resist get hardened some resist get softened will see that little later is that okay so this lithography is a pattern transfer from circuit simulator to layout layout to mass plate and a mass plate to actual silicon surface or silicon whatever the layer actually we have okay this is a image transferring and there are so many places where things may not work to your advantage so the tricks of the trade in design I mean process is how would you match all of it okay and the cost keeps increasing how better you try to do it okay now this is an issue which probably has been bugging Gordon Moore since ages what Gordon Moore thought that lithography will always match my thinking which probably it did for a while many years actually it is a 0.7 times the dimension reduce so lithography should be able to resolve at least 0.7 times whatever value earlier and therefore I can print the same what earlier I was doing 0.7 times that I can still print next time I will come another generation I say 0.7 times so lithography should keep pace with whatever Moore was thinking okay Moore has always thought I had 40-50 years okay but lithography could not match initially okay because that is was the crux of the problem that lithography could not match Moore's this then he said 2 every 2 years and he said every 3 years now he may say every 5 years he is still surviving so can do another Moore's fifth law okay so this tricks have been become because lithography was becoming a bottleneck at the end of the day okay so you are talking of say 7 nanometer process any optic 7 nanometer is 17 Armstrong 70 Armstrong's the smallest wavelength of a light which you can use even if you are deep ultraviolet as you say maybe 1000 Armstrong's okay or 500 Armstrong's okay but you are talking of something now 40 nanometer 70 nanometers 7 nanometer 70 Armstrong's so the wavelength of the light is certainly much larger than the dimensions you are now looking for so all kinds of optical errors will come because you are trying to resolve a line 2 lines or dimension of each line to be same with a light which is orders higher in the wavelengths okay but then the human mind is very great the number of lithography techniques which probably still matched it and we still will show you a graph at the end or maybe here itself if I have to show you that okay before I show this where is my I do not know I do not have maybe but so okay so this wavelength of the light was a major crux okay how smart you can go so the 7 nanometer I would have expected 3 nanometer lines so the accuracy is great but 3 nanometer 30 Armstrong there is no light actually okay or even 70 nanometer 70 Armstrong is a so what we thought then that the wavelength is proportional to hc by lambda is essentially energy is that correct if you are talking of photons yeah this is photon energy so why restrict photons I say I use electrons which has a little higher mass compared to photon photon has no mass so I say okay I will use electron beams okay then my wavelength can reduce because there is a mass involved now with electrons so I will be able to create higher energies and therefore lower wavelengths so electron beams could be lower wavelengths than normal light photon wavelengths okay so the lithography which changed over was from photolithography to electron beam lithography if you further want to reduce this you must have mass higher so you make ions for example which will have higher mass so then high energy ion beams can have even lower wavelengths much lower wavelengths and since they will have much lower wavelengths I can resolve even better lines but x-ray with heavy mass will also impinge on silicon atoms of similar size and will remove from their position itself and create low mass in this circuit so x-ray lithography is all I mean this ion beam lithography was thought and then given up okay it is not that it is impossible now we are looking for what we call plasma immersion something and we will maybe time permitting I show what is current trend people are trying there are also interesting word we will use these days one is the there is a word which will come in optics called numerical aperture and one cannot improve numerical aperture so you put everything in water okay to improve your numerical aperture it is called immersion lithography then you do multiple lithographies so you can see one here one here one some combination of lithography techniques I mean multiple exposures can create patterns of much smaller so there are multiple prints phase prints immersion lithography all these are techniques which will will not do so much detail but that is what 2012 onwards is now looking into the problem is many of them are not successful and now the ultimate what we are looking for is extreme UV lights okay extreme is typically I am looking for 10 nanometer wavelength UVs and 100 Armstrong's are kind of that and the machine may cost a billion dollars and so far not a single company is successful in manufacturing defect free even I mean Intel is trying Lemar is trying even IBM has started given up it is very huge cost and very little returns at the end okay because how many people will really require 7 nanometer chips that is also a market issue okay should I invest so much that the microprocessor market will bump and if it does not then what will happen this money will go west okay so companies always worry about how much is the market available so how much investment one CEO does a machine and the company goes for and 100,000 people are removed okay that is the way industries work okay so please do remember that your job is always at the chopping block any day any company can release thousand people in a day okay that is called your gaming is one area where actually technology is not what the hype required in most games we use excess speeds okay you are looking for high speeds there are methods of improving high speed without actually doing great lithography but you can do paralleling you can do pipelining you can do many games in the gaming itself okay so yeah I mean human mind is always thinking different which is good okay now what is lithography looks like here is a figure taken from Semtech, Semtech is a combination of it is a company which is funded by many companies including IBM and many others Texas and they do research and those who are the participant in Semtech program if the technology is developed by Semtech it is given to every one of them no free of cost because they are already invested so in a way free of cost back so these Semtech companies are very important people who actually keep developing newer technologies and they get funding from variety of companies and they patented them for only those companies okay so you can see from here the way it is I will come back this to gain there is a exposure of light there is a master pattern which is called radical, radical is a image which is 4x, 5x time the real actual dimension you are looking for so x is the actual dimension 4x, 5x earlier in my time we used to have a 10x size so we used to call radical as 10x now it is 4x or 5x so one only one transistor pattern only is first taken and then repeated n times wherever n is called step and repeat we will see that then this is then through optics I said this pattern is transferred here through a resist okay and one can these are the number of mass you can see there are 7 mass steps shown here in which patterns are getting aligned one over the other okay. If you want to see a simple thing you actually quote a photo resist on a wafer let us say I want to develop this image so I have a mask which has only this much pattern and I shine light, light does not go through this area wherever the mask is kept and the others exposed to light the resist becomes soft wherever light shines the resist remains hard wherever light does not shine it is a positive photo resist and in that case the etching of the rest area is possible because the hard resist does not etch means come back to it. So you keep transferring images one after the other over this using mask this is essentially lithographic and you can say as I say these are only 7 mask process shown here typical n mask minimum requirement is 4 mask to 6 mask generally 6 mask even in 4 I can make an n channel device okay I cannot make a p channel device in 4 mask maybe I will read 5th mask but typical mask set required now maybe as high as 16 minimum per c mask and can be as large as 36 mask for some special requirements okay. The actual dimension of the image which I showed you sorry let us say this is the dimension so I will expand this 4 x times 4 times and I will put that as a pattern and when I reduce it I will get x below is that correct I start with a radical which is earlier it will be 10 times now it is only 4 or 5 times so it is called radical so this is called radical okay now radical is larger version of a pattern whatever you want to finally okay so it may be 5 times that the reason is because light there will be a optics problem so we first start with a bigger dimension and user length system I reduce it down to a actual dimensions is that clear is that clear so this is reduction okay the first is a reduction second is repeat we will see that how to do it is called step and repeat okay we will see this word again if you are writing with electron beam you do not need if you are lighting with mask or if you are doing a optical mask yes you require 4x reticle accuracy when the light is required in the electron beam generally you can directly right okay we will see this okay you do not confuse it with that is done only on silicon wafer is that clear this is mass generation what we will do is first create an optical mask we will come to it and that use it on a every time on silicon I am right now creating a pattern on a create a mask itself can then use that mass to print on silicon is that clear direct writing what he is saying is only done through electron beams and not through optical beam yeah people are writing but laser writing can be done for a smaller dimension chips and for a smaller area you can do if you do repeatedly it itself gives a lot of errors and heats up the vapors okay so those who have worked on a lab they immediately can guess what can happen they are not probably may not appreciate but they are issues which are lab issues okay things do not work then we discard it okay so this is at the end of the day you can see you start with a single pattern and one over the other you keep doing and you get in multiple chips on a single wafer it can be a 20 by 20 it can be area of 100 by 100 depends on the size of the wafer and chip size if you are to a centimeter by 2 centimeter chip 4 centimeter square even if you are 16 wafer we may not have more than 40 by 40 area okay now this depends on the size of the chip you are using and depends on the wafer size you have the number of chips per wafer one can decide okay only once we used to have 2 mm by 2 mm square so 4 mm square chips are very small even an RF amplifier presently which may use 90 nanometer or 0.13 nanometer process may require area 4 mm square so even now the companies actually sell the cost per mm square I want to fabric they say okay 4 lakh per mm square or 2 lakh per mm square but if you talk of a processor that mm square will blow up and then the cost may become in crores okay lakhs will not be there so normally analog RF chips are smaller component chips and they can be actually get fabricated out of individual transistor making and therefore they are mm square based costing okay typical cost which we get it through academic discount is 1 lakh per mm square at either in Germany Austria or other Austria microsystems or in micron or in TSMC which is costlier okay. So all this process are essentially where processing is done nowadays has nothing to do with the designers okay once you create your pattern tape thank you very much okay then the technology people these are called fab houses or foundries if you are foundries you can work for anyone okay anyone who pays I will give for you but many companies Intel for example does not believe in giving many of their masks said to any other company even TSMC they gave only Pentium 1 after they have started Pentium 4 okay so they are not very happy with release of their process to anyone okay or release of their data and therefore Intel has its own fab Apple does partly own fab partly does with Intel look at their own competitors but Intel does not mind because their processor part time some processor part is made by Intel for them now earlier Apple has its own processor so everything now it is Samsung which is taking it so every company has a deal with someone who gives cheaper actually buys from them okay these are called IPs so can buy IPs and make everything so typically IC processing has to be realized in this that designed to practice is not same and how much accuracy you can build is the cost in the process you put okay as I said you the fabs are very costly extremely costly in fact and unless the product is shelf product what is shelf off-shelf product derions microprocessor they are general purpose anyone can pick up from the shelf but if I am making a specific game I cannot make million games or maybe million at best but I cannot make trillions the whole by that because someone else is making is another game like Sony may have its own playbook station and others may also have a box will have a Microsoft will have another its own one so now these people will not let them know okay what what is the process of this so they may have their own processor designs processor technologies Sony has his own process labs only for gaming purposes okay TI have this sorry Toshiba is his own labs but many Mr. Vishi has closed because they are actually tied up with now Toshiba so many companies which are good fab houses have actually folded because they are no business now to support okay so many companies micron has come global founders have come but these are the new companies and when they will fold God knows okay okay so this is typically what IC processing we are looking into okay is that point clear so something here this is all interaction through why mass are very crucial and mass printing is very relevant in all IC processes if that does not happen well every other process is useless okay that is where the failures are actually okay so how good you transfer patterns is the crux of all the IC manufacturing okay so if you go to a lithography place in an any fab it is the cleanest environment which you have to have for example typical clean room may have a class 10 or class 1 clean room but the lithography room should be subclass 1 okay now that is because any particles you are just now shown the figures if any particle sits okay here which is larger than the gap you are putting this may not allow to resolve that okay so now it either may short depends on the way mask is open or short the surface now this is very peculiar of lithography so when I do mass processing and mass printing that area is the cleanest area in the whole fab house and at a given time very few people are therefore actually allowed in because as I see if saying if I move in a lab 1 million particles I move okay one hand 1 million okay so I am worried about how much people I should allow in a lithography system okay so that is the cleanest environment and normally since you are locking of wavelengths light exposures so the light there cannot be white right because it has then all brush alum all wavelengths available so it will expose the resist even before you do so it should normally has a yellow lights and some have green lights now so some particular wavelengths are used which have nothing to do with the resist wavelengths okay and this is the color of that which normally does not expose any reason why it light is the worst because it will expose white means it has all ultraviolet to deep infrared large infrared so everything can be any kind thing can be exposed out so the clean room is very crucial and lithography is much more crucial the success okay okay so if you understood what I was trying to hit on okay so integrated circuits could only be realized due to the most important process called lithography and as I say it can be either any kind of lithography. Now is transferring image or as it is Moor's law was essentially based on improvements in lithography improvement roughly and this is something which you have to understand the one-third of the cost of IC manufacture actually goes in lithography because 30 mark 24 marks actually the cost is making a mask and successfully putting on a wafer is the major cost so one-third of the cost of a chip or one-third of the cost in manufacture actually is attributed to lithography okay these are the numbers which I do not know the plumber has given but these are the actual numbers from the labs since I have worked in labs I can tell you what a kind of numbers they say lithography is the technique of transferring layout patterns on silicon or silicon dioxide or any other surface and allow selective etching as per the pattern this is what lithography is all about is it okay basic I have talked so much general today and did nothing so let us start doing something is that okay everyone so there are three issues of lithography one of course is a mask design so first is mask has to be available to do something so I must design the mask now design may come from designers or I may come from anywhere but I need a design which mask has to be created then second is the mask fabrication to transfer it to process lab I need a mask I have to create mask so there are companies which only make masks they do not actually move further processing so you give that that tape and they will generate mask for you okay and then they will send it to which your company you wish okay like SCL, SCL does wafers from outside mask from outside chip from outside and sell in SCL's name okay do regards and the last part is a wafer printing at the end of the day I must transfer that pattern from the mask to wafer so there are three issues I already talked about mask design from a circuit performance of an IC we realize all process level mask and they are then used to selective area processing layouts are generally given in the GDS format which essentially represent the coordinates of each pattern there could be 16 and more number of mask patterns before they could be used these patterns are made first on mask plates these are called mask plates this is of course the designers issue this is how designers end up their job okay so my job starts from the mask plate how to create mask okay so this is VLSI design group this is sometimes separate group which makes mask or normally same company can do and finally the process of CMOS or any other mask or any other semiconductor technologies which may or may not come in next 30 years but can be worked okay I might have told you earlier also Gallium arsenide was a material came with a bang in 1960s okay and there was an effect called gun effect which everyone thought may fetch an over price actually and it just what I should say petered down in next four five eight years no one remembers gun now okay and my PAD unfortunately was on gun diode why I thought so because everyone was telling this is the material of future gallium arsenide so I said let's do something in gallium everyone was talking silicon I said lower within six seven years I realized that gallium arsenide will remain material of future because whenever it will come it will become present and it will go to future okay so it never came except professor my students and others may keep telling oh okay the reason is the obvious yeah it will take enough time for them to mature a technology which silicon has matured in 70 years so obviously it is not easy for them to mature a technology up with cost so I am not trying they will never reach but by the time I don't know whether integrate circuit will survive then only by virtual thinking oh do this may happen okay from a cat to use we create layouts and then use back extraction to get circuit schematics circuit simulations prior and after layout simulations are performed and they should be matched for where the layouts are to be checked for design rules that's why I brought the sheet because whatever what are design rules I said it are the technology constraints which a designer has to follow during layouts and they must be followed because these are the constraint otherwise at no time designer this can be transferred these are called design rule checkers some new layout generators layout simulators have built in DRC what does that mean so if I want to draw a line next to it where it's violating the design rule then it will not allow you to it will start shouting so it it's built in this but this is not true in spite of all DRC cleared the vapor may still have design rule violations okay that's the fun part okay all companies have this issue DRC ran and chip did not okay so they are the design rule violations okay so I will show you I am not teaching design course otherwise I will show you how this design violations come in spite of DRC checks okay so mass making system uses a micro soap like a systems which transfers images on photo emulsion plates sometimes this photo emulsion plates could be metal plates also we'll see them these are called hard mask and one single pattern of the circuit needs to be replicated to a large number of chips on the wafer thus we need a system which is called step and repeat we expose here for the next chip this for the next chip this okay so this is called step and repeat so mask itself is created by process called step down from 5x to x and keep repeating on number of chips you want to make as many mass patterns you must create okay so this system which is which makes mask is a already I have shown you one of them but maybe another figure I may show you hand drawn by me is it okay so mask are actually created through a step and repeat system or camera it is also called a step and repeat camera we are actually using a camera slightly better version or microscope sometimes okay so many of the lens system which we use there are convex so concave together parallel plate convex lens there are many lenses properties which people have tried to get what avoiding the aberrations okay so there are many methods optics allow you miss those who are in optics you know when you try to solve one some other estimation will increase so you reduce that the diffraction pattern will every pattern will increase so something happens so minimum of all okay yes yeah you are right but that another mask is normally created from the CAD system itself on the pattern which is in the which modulates the beam is that clear no you did not get it I have an image on the on the screen which is coordinates I know so I can modulate the source of the light with this areas what I am trying to say is the following this is very you are you are great but of course you can create a mask by electron beam first and then use that ahead but the way it is for example I want to create a mask on this let us say this area I want to fill okay so I have an image somewhere in the computer so when I expose the light it start doing something like this it exposes this much is that clear on the emulsion plate itself okay the way I do it is something very interesting if this is one you may the exposure okay 50% I do the next is shifted by 50 so it overlap the last image though I do not want any gap light should be everywhere when I reach the last for example this this is the next scan is 790% down and you start exposing again what is this scan called raster so the raster scan the image is transferred on the emulsion plate okay you are right is that okay this is what exactly it does it receives the data from the cat this and actually modulates this light source of electron beam depending on what kind of mask you want to create okay and dot through a focusing system can actually expose the whatever emulsion below all emulsion this is a quartz plate which is has a emulsion coated okay these emulsions will see what are those emulsions but peculiar typically emulsion must receive light and sharp darkens itself so when I develop those portions will be retained the others will be etched okay. Now if you are using electron beam the deflecting system is electromagnetic your plates electrostatic plates and magnetic plates so I can actually move the electron beam anywhere okay X and Y okay and therefore can expose exactly where I want so electron beam lithography is great because it exposes exactly where you want and to exact dimensions you want because it has a smaller wavelengths okay however electron beam system is very costly and individual chip if you have to do it expose it it will for a wafer it may take months so it is very costly. So what we do is we create a mask out of electron beams and use that as a optical mask for further work okay direct writing is also possible and the wafer itself I can like pain I can write patterns by electron beam okay. So 100 chips are there 400 chips are there for each pattern I may actually program it it will do everything like this for all chips it may take 8 days to do this kind of work so it is very costly okay. Whereas what we will do is we will create a mask plate using electron beam possibly for a better features and then use those mask plates for optical lithography okay this is what we will be doing. So through this system a camera system which shown here a there can be light or electron beam source there may be some focusing system if it is electron beam it is say electro focusing systems okay electron lenses can be created and we can create focusing you can add reflecting systems and you can expose lights on the emulsions. I wrote already the step system whereas 4X and 5X initial pattern is reduced to X in the repeat okay step may as it is we create 5X image what are actual pattern size we actually expose 5 times the why we want to do this because accuracy in 5X is more likely to get further optics okay but when I reduce I will have another problem of reduction so error probably may multiply or may cancel depending on my expertise okay. So typical system which we may do repeat system is you may add a source and you have created a mask which is set here there is a condenser lens light for example shines through these are electrostatic lens whatever it is wherever this dark portions are there light does not pass very clear portion light passes through light passes through here does not pass through here then you actually there is a reduction lens system which reduces to X dimensions and expose on the baffer okay. Now this repeat system then I can do a step step can be done by X Y or it can be done by beam itself beam can be moved from one position to the other okay. So either it is beam shifts or it is actual X Y motor control okay you give a stepper motor so much steps it will move okay. So there are number of ways initially we used to have mechanical systems so steppers nowadays it is all electron beams so it automatically scans okay. So a typical first problem is to create a radical okay so we can create radical so these radicals are first important thing and then they reduce X times 1 upon 5 times 1 upon 4 times to X image okay. People have tried but there are more errors than higher okay you can do it people have tried this called this is what multiple imaging was trying what you are seeing we are exactly trying on that okay multiple exposures okay. If you have done implant in your lab right now in your lab you must have seen the number of implants can create any profiles. So same technique was tried but this is not Gaussian and since the patterns are not Gaussian the overlaps are very difficult okay that is the problem okay Gaussian everything is fine variance is known I know how much peak values are so I can adjust my energies nothing happens here okay. You can look into the variety of books this is given very well in the Plummer's book so there is I hope if at least some of you have Xerox copies of Plummer or Plummer's book itself or some still still believe this is good enough and may rule at the end carry out the first thing in a system which we require to do anything is called light sources what kind of light source I need as we scale down the technologies we are actually going to 7 nanometers now so we will have a smaller features and one need shorter wavelength beams is obvious two possible sources of lights are used in exposures in lithography one is called mercury atom beams the other is electron beams as I say X-ray beams ion beams are still away and hopefully will remain away for photolithography light source is normally so much common you know this whole arm good mercury sources all halogen all these tubes are essentially has a mercury vapors and they act like a source of light which has a wavelength from ultraviolet to not far but little ahead of infrared okay if you know the what in the water purifier we are actually shining UVs it is a simple UV lamp the use of this photo lamps have slightly different kind of this along with mercury some catalyst are added to improve the efficiency the electron beam lithography is normally like a electron source like a CRT tube cathode ray you actually heat it and electron copious emission of electrons can be generated and then beams can be formed by electrostatic lenses electron lenses as well as deflecting systems so it is equivalently done there as well now there is a problem which is wearing must the light sources use lamps which are which has a vapor pressure of the order of 20 to 40 atmospheric pressures these since the pressure is very high it creates plasma inside plasma means state of ions electrons non neutrals together is called plasma and why we need plasma because I need high intensity beams of light so I must create plasmas now which and this plasma radiates the spectral lights which we are worried we are interested in just to give an idea 40,000 degree Kelvin is the plasma to electron temperature the temperature of the actual gas may be room temperature but the electron temperature is as high as 40,000 Kelvin's okay that is why it is called core system the energy is so high that increases the KT but it does not increase the environmental or ambient temperatures so it is cold that is why cathode emits and so this is mercury vapors using a plasma mode you strike the gas and once you strike the gas you create mercury vapors plasmas and these plasmas I repeat has electrons photons and neutrals and since you are applying it and a problem for those who have done BE and also have not forgotten basic electrical engineering power area strike so what happens after strike happens 99% people do not know how actually operative works think of it and that is what I would like you to know okay last few minutes in olden days whatever mercury lamp we used to use has a 2900 to 4000 UVs available okay we used to use those lamps nowadays we have two spectral lines UV sources which are two specific spectral lines one is called G line which has a wavelength of 436 nanometer or 4360 amstrons the other is I line which has lambda of 365 nanometers which is 3650 amstrons please remember these are standard spectral lines which are used in lithography okay both these G line and I lines sources were useful till we were working on 0.25 micron nodes okay 0.25 even 0.1 at people are successfully done but below 0.18 or 0.25 these lines are not good enough okay because the dimensions are now smaller than the wavelength you are actually using in order actually okay so we will see what else alternate to plasma bed UV system one can use lasers okay axiomal lasers with high with a very high very high brightness double high typically in a axiomal laser you have either a krypton or some other gas argon or nowadays even calcium fluoride is used so krypton plus NF3 and when you shine when you apply energy it forms skier f and krypton fluoride actually releases protons when ionized okay now krypton fluoride gives a wavelength of 248 nanometers okay so it is good for 0.13 to 0.25 microns as I say some people are tried 90 and successfully then we went to argon fluorides which has a lambda of 193 nanometers and we are also now looking for fluorides alone krypton fluoride is 193 if I use only fluorine then it is 157 nanometers I did not write it but you can write okay maybe I have a figure I will show you so we started with G line 436 I line 365 then krypton 248 argon 193 which is the most standard line used in all wafer fabrication across the all industries 193 nanometers okay this is some kind of a Sankh Roshan number right now 193 our effort is to go below that is why I said extreme UV we want to go to 10 nanometers at the end of the day so that the dimensions could be as accurate for 7 nanometers okay problem with e-beam says something like this you may create a mask but finally you will go on the optics so the problems of optics will remain okay mask may be accurate if you create a optical mask and use it optically further it is much more so no more than 0.25 we actually use optical mask below 0.25 you just need uh electron beam mask created mask okay and then use optically since we have not done that with though part so I am not telling you okay so please remember very currently material science a fluorine or calcium fluoride here is for optical lithography this is the what we call normalized dollar per megapixel per hour uh for year whatever is up to 2010 they are shown so that is what exactly it is g line 436 i line 365 krypton 248 argon 193 fluoride 157 and calcium fluoride one is believing may go to 112 okay so I am not sure just numbers I read uh the other day from semen and engineering book journal but one doesn't know I am not sure of that number okay so over the years can you now see this is the mold slot kind of you are trying to reduce and you are trying to match light with wavelength of that but you can't do 193 nanometer even this 157 is not guaranteed so you are light of 1930 Armstrong's or 193 nanometers and your dimensions are what now few nanometers you are talking are 7 nanometers 10 nanometers the light wavelength is 193 nanometers so how do I still get resolutions of my choice okay that's trick and that's most important optics optics has advantages and therefore disadvantages okay so we'll next time when we first we look into different photoresist and once we look into photoresist maybe electron beam resist and and everything as I said this is given not exactly as I showed in the plumber's book plumber has many papers in diffusion and and in lithography so his work in the lithography is well known okay Stanford has one of the best lithography system in 80s and it has the worst system in 2014 okay they haven't got money so that's it okay so we stop here today