 last time there are some very problem is say let us say let us say I have a function fx versus x and it has nonlinear relationship I have a function fx which is nonlinear with x and if you see very carefully let us say I fix a value of x0 here and I take a slope here at this point so for a small variation between say x0 and x0 plus minus dx if I see linearity maintained then I would say the output will be proportionately linear at these points exactly linear therefore proportional equally saying x0 is your DC value and plus minus dx is the AC signal so AC signal does not make Vgs minus Vt currents currents are essentially DC current which is capital Vgs minor proportional to minus Vgs minus Vgs minus Vt around which AC signal just superimposes therefore it does not change the status of the transistor just because small signal over its on that is that clear last time someone was asking a small Vgs changes what will happen that is our assumption that in the range in which I am looking for small signal or plus minus dx as the word I use and not x then I say in that range the x0 remains as if constant at around x0 and therefore currents are only proportional to DC in the case of defam for example I said if you are small Vg Vgs 1 Vgs 2 it is essentially Vgs 1 plus Vgs 1 this is Vgs 2 plus Vgs 2 and if the transistor is bias to Is by 2 on this side then Vgs 1 is equal to Vgs 2 okay so DC is essentially the capital Vgs the signals are small Vgs 1 Vgs 2 which we difference we call vid and some average of the two we call common mode so do not get confused every now and then that small signal to last signal unless stated otherwise in a all this is nothing to do with this circuit in a circuit for example the AC value does not change the bias point is that that is the assumption we are making it is that clear that AC values are small enough and therefore they do not change the DC operating points okay that is how we solve all our circuits if that also keeps changing then there is no question of we then with then the signal analysis will call out large signals that means signal is varying large enough all around and maybe linear or non-linear we do not care okay then we will solve according but when I saw a small signal circuit I essentially say DC operating point is fixed around which AC signals are superimposed and therefore do not change the operating points is that clear this far because last time some query came so that once for all be clear to you that there is nothing called small signal varying the DC operating point okay so the ISS by 2 remains as the DC values that okay okay this is general this is nothing to do with what we were doing last time but just to tell you that in future do not get confused between the two words and for example just for the making that point clear and you need not write all of it here because this is just copied from Smith and sometimes miss book this is just because that there are the issues well thought maybe I will discuss last signal operation for which we discussed last time we say VGS 1-VGS 2 and someone asked how is equal to VG 1-VG 2 yeah it does mean essentially saying that sources of the same potential so the difference of VG and VGS is same I mean they will be same in choice of biasing we assured that is was guaranteed by us that both transistors are on are in saturation then we write two currents IDS one if you have the circuit diagram maybe I can quickly show you already shown you this is ISS this is minus VSS if needed this is RD this is RD this is my view one this is my view 2 okay this is my VGS 1 this is my or VG 2 you can keep VG 2 or VG 1 this is what the circuit I am talking about as of now this is a typical different which is shown here which you have a circuit already on your paper so I calculate assume right now lambdas are zeros I told you already if you add a lambda term what creates the problem the current becomes nonlinear because there will be a VDS term will start appearing in the out other side 1 plus lambda VDS then it is a nonlinear equation and numerically can only be solved okay otherwise analytically I am not saying it is impossible you can linearize the nonlinear terms but how much to linearize also is a game so right now assume that lambda is a zero as far as analytical calculations are concerned we will use lambda not 0 for what purpose for every other purpose I may say lambda 0 but for one thing I will not assume lambda 0 for calculation of R0 because 1 upon lambda ID is essentially R0 otherwise I am saying R0 infinite okay which is not really true R0 is finite okay all other things assume lambdas are small enough and can be 1 plus lambda VDS term is 1 so I get the currents in the 2 arms IDS 1 and IDS 2 write the equations as they are then I will take a under root of this IDS 1 under root of IDS 2 so I get beta n dash by W by L beta n dash by W by L VGS minus VT VGS 2 minus VT okay thus under root of the 2 saturation currents of the 2 arm of the M1 and M2 okay this is for M1 this is for M2 okay so why I am trying to do it I am trying to do some maths on doing this I want to get some this value related to VGS once I already made an assumption that we are already said that VID is VGS 1 minus VGS 2 are equal to VG1 minus VG 2 so I am trying to go back to that value is that I just make under root of both the currents and got these expressions how I already said VGS 1 minus VGS 2 is VID because we already said DC values are equal all that is saying is AC signals so this is still small signal V ID is that clear this is still small signal DC is canceling okay so I just one minus ideas to is beta and I W by VID however we know the net current is ISS so ideas one plus ideas to is ISS square now this term I square so I get beta n by 2 W by L at introduce inside beta n dash into VID square I expand this so I get ideas one plus ideas to minus to ideas one ideas to square of this expansion which is beta n by 2 into VID square but this sum of ideas one and ideas to is ISS so I substitute ISS minus to ideas one ideas to under root of that is equal to beta and VID square why I am trying to do it a second it will be visible when I show this please note down what I say I just take the currents to under roots subtracted and squared again okay nothing great no mass worth thinking okay why I do it is the next slide will show you so if I now substitute I go back into my ideas one term and ideas to term using the expression which I just got I can prove that ideas one is ISS by 2 plus minus beta and ISS VID by 2 1 minus VID by square this is a quadratic equation solving and this is what we do okay so by this I can get this current and this current ideas one and ideas to did I get the point I just resubstituted the last equations which I got I got to ideas one ideas I can solve this equation now and using this I can evaluate ideas one and ideas two in terms of ISS beta and VIDs two equations I got for ideas one and ideas two now one interesting feature from here you can immediately see you write these two equations and see what I have the way I have written them okay if you want in between terms all yourself this is given in a said aspect book okay so the point I am trying to raise from these two equation is if VID is 0 what does that means VID 0 means that essentially I am saying common mode we are received is that correct V in 1 is equal to V in 2 so VID is 0 okay if you are do 0 that is this term is 0 I get ideas one is ISS by 2 ideas 2 is ISS by 2 okay so what does that is essentially saying when there is a common mode signal or that means there is no AC signal as if running through equivalently saying half the current will go to the M1 and half the current will go to the M2 that is what we started with and this provable that half the current moves in the one arm the half the current goes into the other arm if you are at the same inputs are given which is obvious if VGS 1 is equal to VGS 2 both will draw equal currents that current is the ISS so half of current will so even this equations essentially is trying to tell that they at VID equal to 0 but if VID is must now why these conditions have been brought I want to know how much VID I should be allowed for such condition to meet okay please note down this is one interesting condition which we got ideas one is ISS by 2 ID then VID is 0 however each current is ISS by 2 which is ID 1 or ID 2 which are cannot be time dash by W by VGS minus VT square which is beta and Vov square so I said ISS by beta n sorry is equal to Vov square and then I substitute again IDS 1 ID 2 in this form okay so I get VID by 2 be Vov VID by 2 Vov VID by 2 be Vov just substitute this ISS by beta n equal to Vov square back into same expressions and you get these two equations no no no for that I got the relationship between Vov excess voltage which is a DC excess voltage okay we are now looking for that sort of keep but I am keep telling you do not confuse between ACs and DCs this is a DC current I am talking about ISS is a DC current is that is a AC current okay so do not confuse every time and now okay so if I must say by these conditions when again we say earlier we said VID 0 but even when VID by 2 is Vov IDS 1 is IDS 2 is ISS by 2 that means even if VID is equal to Vov under this equation is one you have a relationship IDS 1 that means again DC currents will flow okay now this essentially I did in case VID by 2 is much smaller than Vov that is capital VGS minus VT please remember capital VGS minus VT is the DC value is that clear if VID which is your AC signal is much smaller than Vov then you can expand that expression and ISS by 2 ISS by Vov into VID IDS 2 is this since this content AC plus DC small AC current is proportional to VID is that point clear so under what condition linearity was held for AC that the small signal VID must be much smaller than capital VGS minus VT is that point clear the day when I started with you an expression this is the condition as long as you are in the DX range linearity is held is that correct if you increase it because the curve is nonlinear one cannot guarantee that these are expressions can be used but the condition is if you have a DX variation which is VID the small AC signal which is much smaller than the DC value then we say the AC currents are proportional to the difference signal so whenever you bias by ISS such that at half the current flow that is M1 M2 identical RDS identical biases will be same at that condition ID small AC currents will be proportional to difference signal this is what so condition under which this was true when VID is much smaller than the DC difference is that clear this issue is very important again why VIDs are not very large because even with the large signal we got the conditions can only be linearized when we say VIDs are much smaller than UVs that means the AC signals are much smaller than DC values at which you are biasing is that clear this fact we did in bipolar earlier mass earlier small signal small signal when we say small signal is a condition in which linearity is maintained why you are looking linearity because for an amplifier common any common source common emit any kind of amplifier what is the thing we always say gain is constant that is GM is constant and to do this we must have linearity is that clear to make it linear condition must be met is that clear to you so this is not really the solving part of this is not that we need to do this which is just to prove my point that you cannot have large signals with linear zones is that clear as the first slide shows if you show your signal from here to here you cannot say they are linear GM the slope is varying all through okay slope is varying all through so in such cases outputs will be proportionately nonlinear terms will appear and whatever term you wish you can pick up from them but essentially no linearity can be guaranteed is that clear this issue is what makes interesting all AC analysis away from the DC analysis okay yes see the total AC currents are much smaller compared to DC current that is what I am keep telling that variation there is a small enough to the net current will be only the DC current is that clear to you because the average value the way it is 1 plus 1 minus average is 0 at net current at any given average time is only ISS that current this is the way it is calculated instantaneous current yes ISS plus small hi but average current is always ISS this is the net current AC plus DC subtract DC currents is the small AC current AC current is proportional to AC difference signal which means linearity is guaranteed to this region and to do this you are meeting that the AC signal difference must be much smaller than the DC difference voltage is that condition clear essentially VT is very small so essentially seeing VGA should be much larger than the input signals is that correct VGS which is biasing the transistor capital VGS should be much larger than the signal which you are actually amplifying is that clear that is why amplifiers are small signal amplifiers is that clear they are called small signal amplifiers yes your view will matter where it will shift the idea is that in this region where VGS minus VT is holding the linearity is holding that is how we started with this assumption if that that the curve goes away essentially what you are saying is true but any point wherever I fix it around that I can assume linearity is that but if that signal expands then I am not sure whether it is linear or not any point on that along that small signal will always look as if linearity is holding even if it is nonlinear as far as the total curve is concerned any DC point is that clear as long as you are in saturation any point as long as this value is higher than the signal you are using linearity for that region is holding for you obviously that condition the time we started all transistors are in saturation is that clear okay so our interest is I keep saying you is not that we are not interested in large signal amplifier some other amplifiers later we may see if time permitting they are called large signal amplifiers they may operate in class V or class C or class AB operations but today we are only looking for class A operations so we want to do a small signal analysis of a differential amplifier a typical define as we already have discussed has 2M transistor M1 M2 whose sources are connected and they are given a source current of ISS okay right now I am assuming RDS are equal but in reality this is not a compulsory condition they can be RD1 and RD2 as well but for the simplicity I am assuming that load voltages on both sides are equal please remember this is not a compulsory condition okay but much easier to solve you can solve without that and you will get nothing great will happen even if they are separate now here is the method I give you two methods to solve okay the first method is called method of superposition okay so there are certain things in which please look at the outputs of those two or VA1 and VA2 please look at it this is V in 1 and V in 2 are the inputs VA1 and VA2 are the outputs at the two drains of M1 and M2s okay now we say the method of superposition what does it say assume V in 2 does not exist or V into 0 and get VA1 VA2 value with reference to input of V in 1 okay then say V in 1 does not exist and say if V into exist then what is VA1 VA2 and add the true is that correct this is called method of superposition so we start with this condition where I already given you steps steps one set VG2 V into to 0 this is the first for superposition I say once input signal is reduced to 0 so we only talk AC equivalent circuit DC part right now we forget ISS we just ground later now if we solve the only talk AC equivalent circuit and we say this terminal is grounded please remember this circuit is now shown here with ISS not there okay this is an AC circuit no DC values are shown there okay this is V in 1 this is your VO2 this is your VO1 that is called this point Vx and Vy because many books call Vx Vy so I thought maybe if you read per say any book which has a node X and Y written here you may as well use this I am not sure which book but maybe one of the book because we normally use Vx Vy so I thought maybe you might have okay so this is your M1 this M2 transistor please remember from here this is DC so we go here and this V into is grounded is that point where M2 gate is grounded M2 gate is grounded is that clear M2 gate is grounded V into is 0 okay then you have RD and this is your view is that okay the new DC part this circuit will show you this is grounded this is just to show you how it can be slightly tilted nothing great please remember if there is no DC value there is no currents anywhere is that correct is that point clear DC is unless there is a biasing there is nothing can happen okay but I said I am only looking for AC equivalents okay so I am removing DC part for solving okay now I can see from here very interestingly I want to find VO1 and VO2 with reference to input of V in 1 this is what my step 2 which is what my I am looking for that means I want to be in terms in terms of V in 1 so the next step we absorb that if you see carefully you see only this amplifier first RD M1 input V in 1 what M2 is doing for it where M2 is connected to M1 at the source of M1 so essentially if there is an equivalent resistor of M2 seen here how will it act like it is source resistance degeneration of common source amplifier with source degenerate is that clear so I then say okay why not I evaluate equivalent resistance here okay for M2 and then say okay I have one amplifier with source degeneration okay this is the trick I use is that point clear this M2 high is seeing some resistance for this M1 okay I want to know how much is that resistance which I will call source resistance of M1 and if I know that then I say okay it is a common source amplifier de-generated here can you know those correctly yes RD by RS equivalently is the gain of a common source amplifier with source degeneration is that correct or essentially GMRD upon 1 plus GMRS is the gain for these amplifiers is that clear so we will just calculate these things this is not given in said that this is mine so one thing that will be exactly there how do I calculate this resistance this is a method which I repeat only tell you but I repeat this time once and next time I will never use it okay I show you right now how to evaluate the source resistance seen by a man okay yeah because M2 is still as source to that instead of this RD I will use RD2 there okay just see my equivalent circuit and you will find this one no I am not saying it is a AC ground there the reason why I am not calling because there is a voltage here right now which I do not know how much is that because of signal I am getting a signal voltage here there is an AC signal going on there that cannot be ground there is a current flow there is a resistance drop so there is a drop going on so I cannot call it ground there okay but this is a DC current so what path infinite resistance is that clear so your point of view even if it is taken it does not hurt no current in that arm okay okay please look at it this is for my M2 I am doing this is essentially I am doing for M2 the gate as is grounded please look at the M2 with gate grounded common gate okay let us say between gate and source there is a potential V1 between gate and source there is a potential V1 shown like this corresponding to the output of that will be at the drain drain so side GM2 V1 GMB V1 shunting R0 this is the equivalent of a transistor is that okay this is the equivalent of a transistor you may use GMB or you may not use GMB okay R0 and finally from the drone of that is the non clear the resistance RD is not connected to the source but to the ground is that correct RD is AC ground at the VDD okay so this is the ground at the VDD okay please remember RD is not connected here RD is connected to the from the upper side to the ground R0 is between drain and source but RD is not between drain and source because source is not grounded is that clear so if you now say I apply a potential VX at the source okay and say IX is the current which is entering here what is VX how do I find the resistances I apply voltage source okay and find what is the current flowing out of it so VX by X is the resistance seen at this terminal is that clear so apply VXRX and the net current out of this should be same as IX because there is only this is the loop where is the loop please remember loop is completed through this path that is why it was grounded is that clear is that clear since IX is moving and this is open circuit so no current can go in this side only current can go through this and finally comes out at IX and flows so I wrote now for this loop equation IX RD is this drop plus IX minus this current oppose IX is this current minus this current GM plus GMB times VX now only thing you have to understand VX from this terminal and this terminal is ground please look at it this terminal and this terminal is ground so between these two terminals what is V1 value minus VX is that clear this is again what I say you is this loop is now connected this V1 is nothing but minus VX so VX is minus V1 and therefore the current through eyes this is IX RD times IX minus GM plus GMB VX into R0 essentially what I am saying current through R0 is IX plus these two currents times V1 so this is that current through R0 I repeat I just show you this current is through R0 plus drop across this plus drop across this is your VX please look at this voltage is drop across this plus drop across this drop across this is IX RD okay so this is IX RD drop across R0 the current through R0 R0 is IX minus these two currents GM plus GMB times V1 which is like this into VX substitute that here and solve for this expression so VX by RX is RD plus R0 just solve this how much is the value I suggested you this RS should come is this R source of M1 just makes from VX by IX will get you RD plus R0 upon 1 plus GM 2 plus GMB R0 this equation say VX by IX yeah VX here we have here VX okay solve equations so VX by IX will be equal to RD by R0 1 plus GM 2 plus GMB into R0 is that okay what is this value this is the source resistance as seen by M1 is that okay this is the source resistance as seen by M1 so if I get my R source for M1 expression modify R0 upon GM 2 plus GMB plus 1 upon GM 2 plus GMB yeah same expression a normally RD is how much tell you how many how much typical values of RD will be I said you many days 10 K to 40 K okay not more how much will be R0 typically 100 K to tens of mega ohms depending on lambda and ID okay so typically RD by R0 are very very small RD by R0 are very very small so this first term is relatively small is that correct RD by R0 is small enough compared to GM 2 by GMB so we say this term is neglected so we say GM 2 by GMB and let us say GMB is also very small compared to GM 2 then it is source is only 1 upon GM to the of your life-long K linear that we will see a common date and from the source are you want to have impotence of that it is nothing but 1 upon GM the resistance seen by common gate transistors to the other end is only 1 upon GM is that clear the full value I already given but general values will be ID will be much smaller than R0 and GMB will be smaller than GM so we say it is nothing but 1 upon GM 2 this is your circuit now I am looking only for transistor M2 is that correct this transistor I am looking for equivalent up so this circuit please remember for this resistance series coming from here is that correct so if you use that then my expression is this is the blood which is grounded for M2 okay this is my source where I am applying the source voltage VX okay corresponding the transistor will have GM 2 V1 and GMB V1 as the current sources at the drain side drain source side shunted by R0 and this I will do is going to the ground through VDD okay and then I calculate solve the equations Kishoflan nothing great in that and gets the value of I will do by as a GM BX by X and that is the value which I am interested in just for the hook of it GMB is the value of trans conductors appearing because of the substrate bias okay why because of the substrate bias is that clear GMB may be present if there is substrate bias GMB may not be present if there is no substrate bias in general we put it if there is no substrate bias that is between the bulk and the source if there is a bias minus reverse bias then there is a additional depletion charge appearing because of that that will change VTs and their corresponding value changes GM is that correct okay in our case gate was grounded okay and because of that through the drain it was getting grounded finally okay so because of that that was shown you can use VGS as the value and which will come V1 later as the 10 will because this value is nothing but the value which you are looking which is VGS okay so I got this view so is that okay please remember the equivalent circuit of my Define on the left side with V1 is now RD with a source resistance of 1 upon GM2 is that you know how long I will do by 1 upon GM1 plus 1 upon GM2 essentially it is minus GM ID upon 1 plus GM1 RS which can be also written like this okay now that is the one super position say it will take me now I also need to calculate V2 now you can say that M2 start looking the circuit again M2 is a transistor M1 this paper input high yeah as a output I am talking the M2 transistor now sees as if it is driven by a source follower of M1 okay okay I repeat now you can say that M2 is driven by M1 as source follower and how you check if not I will explain you like next time if that is so I must say I am M2 whose gate is grounded already which has a view to and it is driven from M1 side of a source resistance of our TV and a source voltage of them means voltage source of VTV and that means M1 is the equivalent of the source for the voltage or the equivalent resistance is the evidence equivalent for this okay clearly we can say VT1 is nothing but V1 because that is the input available to you and RT1 is nothing but 1 upon GM of M1 parallel R0 but smaller so neglected so if I now found out for this view to please do it again yourself I repeat this is as if the M1 is represented by now equivalent of voltage source feminine source plus its feminine resistance the feminine source for source follower will be same as input which is V1 and the resistance will be essentially 1 upon GM of that transistor remember parallel R01 will appear here but that R01 is higher so we forget so we are 2 by VO2 is as far as this is concerned GM2 maybe you can call it R02 but R02 is R01 we are going to say later yes Hada amplifier gain Nikola may be VO2 by V1 if I do some mischief correctly I would say this is also equal to 1 upon GM1 plus 1 upon GM2 represent Rs by 1 upon GM1 this is 1 upon GM2 Rs are much higher divided by GM2 ROs everywhere please remember divide by GM2 RO2 on the denominator and collect the terms smaller terms neglect here so this is RD upon this so what is this gain at the second terminal but this difference to input at M1 VO2 at reference to V in 1 I will have what we calculate VO1 by V in 1 so the difference gain is how much what do we what do we call difference gain the VO2 V1 minus VO2 divided by V in 1 is the difference gain same currents are same voltage is this is plus minus of minus will be just develop that minus 2 please remember same value has come there for me with a minus sign okay so minus of minus twice minus so minus 2 ID upon this if you say GM1 is equal to GM2 is equal to GM then this is nothing but minus GMRD is that correct different again be same amplifiers it now are GMRD but this is on the what what is the step right now use only using so that means V1 KLA same equivalent gain at a GMRD minus sign why minus opposite of that okay can be say now same thing can be repeated for V into identical situations okay so how much we can get for that we are 2 minus V1 will be similar value okay and then the net gain will be how much subtract karaoke the 2 GM minus 2 GMRD will be the gain of a difference amplifier calculate VO2 by VO1 or VO1 minus VO2 by the same technique for the other on now okay this is one method this is not the best method I will make the method I am going to be current work quick hey correct hey kidney you have to verify but otherwise it will give you very quick results but there are conditions to do this okay this method is called half circuit analysis yeah please remember this is very few people get I am not sure just take the head said I might have given in the appendix as well you have a lemma here a typical circuit is shown here okay which is called symmetric circuit please remember this is not necessarily given in said R Smith but may be given as I have 2 devices D1 and D2 shown here for example this is my D1 this is my D2 okay 3 terminal devices which receives inputs V in 1 and V in 2 has I1 I2 currents and the net current is of course I1 plus I2 is IT now this symmetric circuit has something condition we are now putting and that is very important let us say there is an equilibrium value of V in 1 called V0 not output please remember I am not talking about output output is V0 is the equilibrium value average value and V in 1 changes essentially what I am saying if this is your average value V0 the V in changes by either delta V in or by minus delta is that correct this delta word is a small that has to be understood V in value as the average value of V0 at times it goes plus delta V in at times it goes to be there only two values therefore it can take V0 minus delta V in or V0 plus delta V in as the two values it can pick up okay please remember the game is this condition in symmetric circuit is this this is what defam allows okay if there is a change in this by delta V in the change in V in 2 is minus delta V in is that point clear if 1 input rises by some small value the second input must go why this condition has to be made V in 1 plus V in 2 by 2 is common mode and V in 1 minus V in 2 should be same if these difference and common mode signal have to remain same any change here must be opposite change in the this is called symmetric circuit is that point here change in V in 1 if it is plus change V in 2 will be equivalently minus change in V in 1 is negative then change in V in 2 is positive they go always so that the sum total is always equal if you defy different subtract from them both will cancel and you will only get V in 1 minus V in 2 constant is that point where V in 1 minus V in 2 is always constant you increase and decrease as the difference will always get cancelled okay then by this lemma says if the circuit still remains linear that is GM's constant then the potential at this point P node point P does not change is that point clear the potential at this node P remains VP will solve this problem which you are asking okay I repeat if there is a three terminal device which receives signal which is if this increases this decreases this increases this decreases by same amount then this voltage does not change okay this is what lemma is all about now we will show you the lemma proof equivalently saying if there is a feminist equivalent resistance of D 1 side is V T 1 and RT 1 is resistance this is node P for you which has a potential VP this is V T 2 RT 2 for the M 2 side and let us say I is the current flowing from this side to this side we also assume RT 1 is equal to RT 2 for simplicity we can prove otherwise but just to show you here I wrote VP is this voltage minus drop across this and this voltage is ITR 2 minus this minus I sum this two equations to VP is V T 1 minus V T 2 if RT 1 is equal to RT 2 but we also know V T 1 minus V T 2 is V ID which is V ID by 2 is equal to VP now you can see from here what did I do V T 1 plus delta V T minus of V T 2 minus delta 8 para a come the first real one increases by delta V T the other one decreases by delta V T the difference between the two is V T 1 changes from V T 1 plus delta V T V 2 to change a V 2 to 1 delta V T delta V T delta V T will V T 1 minus V T 2 will remain and okay so what is this point I am trying to say if this circuit is symmetric and this word is symmetric is now shown here and that is what essentially means you look at your defam you look at your defam for AC on your left on your right you are symmetric circuit is that clear so I can break that point I can say I have two circuits independent one on this side one on this side and each source as if AC is grounded as if then I can solve gain for this gain for this and then I say okay if I get V X V by for this I can always get V X minus V Y by V GS this is called half circuit analysis what is the condition I made I told you circuit should be symmetric okay some way that is mirror of this you should be mirror of this if that is so you can break the circuit and if you can break the circuit I can independently solve the two circuits okay that means VP is constant symmetry is only possible if VP is constant that is what I meant okay if that is so for this transistor please remember this is V GS 1 now condition is please remember the first case V GS 1 what is V GS 2 will be best for symmetry minus V GS 1 that is a condition you must meet okay if that is so V X by V GS 1 is minus GM 1 RD parallel R01 V Y by minus V GS 1 is minus GM 2 RD parallel R02 GM RD okay I raise parallel to RD so R01 R02 so V X minus V Y upon 2 V GS 1 is equal to minus half GM and RD plus some of the two why I am using this to both side can you think is that they are equal then that 2 will appear 2 GM RO RD RO will appear so 2 I want to cancel from there okay just tricks so if I say GM 1 is equal to GM 2 is equal to GM R01 equal to R02 and RDS are same then this become 2 GM RD parallel RO 2 to cancel so minus GM RO parallel RD which is V X minus V upon 2 V GS 1 okay all to say which is nothing but V X minus V Y is V GS 1 minus V GS 2 which is nothing but please remember 2 V GS 1 can be written as V GS 1 minus V GS 2 because V GS 2 is minus V GS 1 so 2 V GS is that clear why did I get these are equal because I say V GS 1 is minus V GS 2 okay so I wrote V GS 1 plus V GS 1 and the second V GS 1 are not as minus V GS 2 so it is V GS 1 my but this is nothing but your difference signal is that correct this is nothing we were difference voltage V X minus V Y is the output difference output so this is the gain of a different how much is that gain minus GM times RO parallel RD and if RO is are larger than it is minus GM RD is that correct this is called half-circuit analysis similar thing we can do for now the question is which is many people ask me so I normally show you some just symmetry as example the code then you will appreciate what I said let us say V in 1 is not equal to V into that by minus sign or whatever it is okay okay so here is the condition if you say V in 1 is not equal to V into a such what you thought earlier I can now play interesting game this V in 1 is broken into two voltage sources V in 1 by 2 and V in 1 by 2 plus minus plus minus series connected then I can put two urban sources in of V in 2 but 9 half opposite polarity plus and minus is that clear that we know source V in 2 is no source but I still put it plus V in 2 and minus V in 2 by 2 same thing I play in this side V in 2 by 2 V in 2 adai adai kia or V in 1 ka plus minus kia half of is that clear trick sign I think I have never seen name at corona so I score half of kia is score half of V in 2 ko laya but opposite rakhha is go V in 2 ko half of kia in ka V in 1 ka half half opposite me do you think something is visible from here if you see this circuit I can now see I mean one minus V in 2 by 2 ka signal me leg up ko this minus this we are divided to you do not ka me leg up V in 1 plus V in 2 by 2 okay is ka matlab yeah hey these four circuit for water sources are actually not changing anything what is given here is that point here just divide half half half a couple same series me reko a ko opposite reko and they are same now but using this I can now make a fun of this circuit and I can solve independently now this is equally same there is a voltage source of V in 1 minus V in 2 by the V in 1 plus same argument is opposite side V in 2 minus V in by 2 and V in 1 plus V in 2 by 2 is ko us again Khelai minute yeah difference a maybe minus up look at V in 1 minus V in 2 with a minus sign V in 1 minus V in 2 with a plus sign okay and since this V in 1 plus V in 2 is common to both I connected them here and put it down of is I am killed over here is I am killed can you now see this is V ID by 2 and this is minus V ID by 2 so if I am got requirement I am not able to meet Karadiyan Khelai this is V ID by 2 this is minus where I am not equal I still made it somewhere look as if they are different inputs but what is the additional term appeared the common mode term appeared now okay common mode term appeared now okay I have to say if you have drawn the circuit do not think too much they are just some of the two are same as V in 1 and V in 2 no difference whatsoever okay so now we say please remember I can rewrite saying V in 1 is V in 1 minus V in 2 and plus V in by 2 and V in 2 is this so this is my different signal this is my common mode signal up yeah that is a thing I have one different signal killer game Nikolay or superposition Karaday common mode killer game Nikolay or fear game co some Karaday is that method clear I have two signals difference mode signal common mode signal I will get find the gain for both signals by and add them by superpositions okay if I do so I get V 0 is V X minus V Y which is V 1 minus V 2 which is the difference signal is V in 1 minus V in 2 then V 0 by V ID is half GM parallel a way to parallel expression and if GM 1 is GM 2 equal to GM R 1 R 2 V O by V ID is GM R D parallel R 0 which is my difference gain is that correct which is my difference scheme if the source is ideal the current source is ideal what is the common mode says actually common mode means signals are same at both ends is that correct so V of 1 will be equal to V of 2 so difference of V of 1 V of 2 will be 0 so what is ACM common mode gain 0 because V of 1 minus V of 2 will be always 0 if V in 1 equal to V in 2 is that clear if the inputs are same and the transistor is in I mean circuit is symmetry both outputs will be same that means if outputs are same then difference is 0 so ACM is 0 so what is the gain finally you got even using when the condition was not made minus GM R D it is not compulsory that they should be that way even if they are not equal kinds they can be made equal kinds what does that essentially means in case ACM is not 0 then the net gain may be not be same is that clear in this condition we are showing that the source is ideal the resistance across current source is infinite okay is that clear DC current is flowing that AC is R is as if is infinite if not then there will be some potential will appear there and that will modify then the ACM may be positive and then you will have to actually get the gain of AVM a DM plus CM as well is that correct for ideal difference mode signals whether equal or not still can be same GM R D okay but for non-ideal what is the term which will case when it is non-ideal case what is the term we are looking for I want to know what is the ACM value with reference to ADM how much it is whether ACM is 0 then I would say the ratio of ADM by ACM is infinite okay this is called common mode rejection ratio ideally common mode rejection ratio is infinite okay what does that means at no common signal will be transferred only different signal will be amplified is that clear however in reality if ACM is finite the CMRR will be not infinite but maybe 10 to power 3 4 or something 80 DB 100 DB or 120 DB scions okay now we want to find if ACM exists how much is the real value now if the current source ISS is not ideal what does that mean not ideal means what is the current ideal current source the shunting resistance is not infinite but finite okay non-ideal means RSS across the source is not infinite okay a check current source to score both those cow put impedance is infinite okay but it is not true in that case now look at for the common mode what is happening V in CM which is equal to V in 1 equal to V in 2 due to symmetry VX VY is V1-VO2 so VX-VI VO1-VO2 please look at it the way I am now doing these voltages are same so I connect you say no VX is equal to VI so I connect same potential in a Apne Volana symmetry have VX is same as VY symmetric circuit VX is VY signals are same symmetric outputs are same the difference may be 0 but difference is 0 by shorting I am making VX-VY is 0 is that here different between VX and VY is 0 so I short them okay I have common signal to both gates V in CM and they even RSS now if you look at this circuit carefully these two transistors how do they look to you please look at the circuit one transistor is this other transistor is this both are getting same input range are connected source are connected can they transistor is the parallel may have sorry this is say M1 and M2 is the equivalent resistor transistor over M1 plus M2 in a cast cast equivalent how is do we write current for each let us say linear or any beta into beta N into W by L everything else is common so if I add the current passing through this plus current passing through this what is the total net current twice which is equivalent is saying the transistor a equivalent current is twice the width of that one transistor is that point clear if you have a transistor of 2W instead of 1W this is 1W this is 1W each is carrying equal currents together we may say you have one transfer which carries which has two twice the bits is that correct so we say an M1 and an assuming and VT is are same everything else is same betas are same then we say it is only twice the bits okay so the transistor has twice the width is that clear this is called equivalent transistor what is it called equivalent transistors in parallel to transistors are in parallel their bits sums okay so this is essentially this circuit done reduces to okay can you also see this are also parallel this is common this is transistors which is equivalent of twice the width of all M1 M2 transistor okay now it goes all Garmin pass on a method is key tricks key okay M1 M2 being in parallel we saw bits are equal W1 W2 2W ISS by 2 is ISS we are GM equal to this GM M1 M2 is this GM 1 is GM 2 is this so the GM is 2 GM you wanted to prove I wanted to say it so I showed you it is provable also right expression for GM's please remember these GMs have been calculated on what basis for each transistor for defam the current is how much DC current ISS by 2 please remember this is never to be missed that only makes symmetry otherwise it does not make any symmetry okay so GM of the new transistor is how much twice that of individual assuming others are all values are equal okay I just showed you substitute there and you get 2 GM is that is that point clear okay so common source amplifier with source degenerated by what resistance RSS you have a low how much is load I do by 2 source resistance RSS GM is now 2 GM okay so then via by V NCM common mode gain is minus GM RD upon 1 plus 2 GM RSS please remember 2 GM Purana GM get why so 2 GM RSS which is equal to essentially if you say GM is divide career one is this is larger than one GM GM cancels so it is sorry RD by 2 RSS AVCM is it now finite because RSS is not infinite so I do by 2 RSS is certainly not 0 or not yeah not 0 but some finite value so the common mode gain is now the ratio of the load resistance okay oh sorry I also made a mistake what is the mistake I made okay okay so you are like 2 GM into that is correct thank you thank you very much I made I had some wrong thinking okay so I should write like this okay so what does that mean if I want to improve a term which is called CMRR AVDM by AVCM which is the ratio of difference gain to the common mode gain and since it is finite and you want to keep as high as possible what is the condition I should meet I should be small or RSS should be high as much as possible so jitna achha current source of create current a with my common mode rejection ratio higher yes but now it is not a difference output we are looking we are looking only for the common mode outputs but that is what we said it will get rejected at the end but not fully that is what I am trying to say each is now we have one which is not which has a finite value in fact that is what we are saying otherwise we would say common mode would always get rejected independently now we say all of it is not rejected may be small but there may be a common mode outputs along with what we are saying difference is that point clear is that point which is not neglected now perfect difference is still same is that point that is ADM DM is still independent of what CM is doing it is that correct but earlier we said RSS is infinite so we are always saying ACM is 0 we say it may not be 0 yes this is an individual only we calculated equivalently is that clear that is what we say AVCM is not 0 now which means there is a finite common mode rejection ratio which could be as high as 100 DB to 125 I do not know how much is 741 you measured so what how many things you monitor for open doing input resistance output resistance and CM are of course there are few more PSRR and other but they are little more higher order anyway we will do open open is define is what did I say start the day one different is the first stage of open so we are now trying to see once you understand is that correct and the game stage I will put it a buffer and then we call it as operational amplifier so the first input stage of a open is a difference amplifier and that is what we first looked into okay is that okay before we quit there are we may do this analysis next time but this is a very interesting things in real circuits a different amplifier may never will have a resistive loads what is the reason why resistances are not used in integrated circuits area so it is very poor I took a little 40 K resistance may take 2 mm by 1 mm area so no one is going to put in an opamp char resistive a baki kuch nahi so we will always use resist transistors as resistors okay so here is the 3 kinds of loads which we use in the case of difference amplifier and therefore opamps yet I have come on my difference is what is M5 is giving when I giving a VGG voltage which is some voltage I adjust what is this M5 connect this will give me current source so I can fix a current source by adjusting VGG is that correct I can fix the current source by adjusting VGG but there are two transistors M3 and M4 there are two transistors for M1 M2 they shown here M3 and M4 whose these are all N channels as of now but they can be P channels some connection will be modified when we say both are N channel devices the gates are common and gates are connected to the drain VDD what is the when I say gate of it N channel transistor is connected to the drain what is the status of that transistor permanently saturated because VGS is VGA sorry VGD and VDS is same okay therefore VGS minus VT will be always smaller than VDS come what may that correct VGS please remember this is my VGS this is my VDS so same potential is exist across this so VGS minus VT will be guaranteed less than VDS is that okay therefore M3 M4 will be always in saturation so what is the typical value of such resistors will be transistor in saturation resistance jada hothaya kam hothaya do I saturate hodaya IDV SR resistance kya that a very large or 0 not so it is a large resistant of course the value can be adjusted the word the current which I pass and length W by L side use for M3 M4 okay I can change the resistance values okay this is called normal active mode load if you send me a P channel instead of N channel then the gate connection should have gone there like this they should go to the source side is that correct they should go to the isa Allah Allah of course go with the diode connect no diode connection it can be called but this is what essentially is diode connection okay this is if I put this is essentially is a diode connection this is drain this is so this is gate for a P channel okay this is called normal active loads I can also instead of directly going to VDD which is VGG 1 and if it is VGG 1 if I put a VGG and M5 acts like what current source so M3 M4 acts like current source okay acts like current source so this is called current source loads as soon as I put a VGG there and I adjust that value I can fix the current in M3 and M4 okay so I say it is current source loads okay this is called current mirror load this is the connection which all analog opams will use this is the kind of loads all opams use is this connection clear to you the glot is connected to only one side of the drain do you recollect mirrors let's see our mirror what did we do in mirror is that correct this current is mirror to this as soon as I make this connection gate going to the drain of this side I am making it current mirrors now okay currents in this arm and current in this arm are mirrored now is that correct current in this arm is same as current in this arm mirrored mirror also will have output resistance so the output resistance of mirror is the equivalent load for M3 M1 and M2 is that clear this is the third kind of load which I may use an almost 90% of opam loads are current mirror loads is that correct the only disadvantage of this is it only gives single ended outputs is that correct there is the other terminal is anyway connected to the gate okay so it gives you only single ended outputs okay so it has a it is a different both single ended outputs why did I do this what did I tell you in opam what should be the next stage there will be a gain stage how many inputs it will expect from you one input is that correct so I created a one single ended output out of this the next stage is going to be a single ended amplifier here gain stage I need an input now okay so I created an input out of this okay this is the typical defam input a difficult defam stage which is the first stage of an opam yeah disadvantage is many a times I am really looking for difference gains in this there is no difference game is that correct okay so maybe I will give you a figure which may be interesting to show you up to last time in the manner that I thought of opam may have a big figure Maria Majida yet they input is that clear two inputs two outputs okay normal in opam unless difference outputs are required you will prefer this is that correct because in this the gains may not be very high in this the gains are typically of the order of 10 to power 4 to 10 to power 5 and open loop gain of a defam if the order of opam is of the order of 10 to power 4 or 10 to power 5 80 dB to 100 dB gain is available to you open ended why open ended there is no feedback open loop I a real circuit because I use one and a lot of our be the cover key a input you have been gay is co ground karen gay or yes a which this is under feedback now so we say V0 is minus R2 by R1 times now it is independent of what the opam itself now this is something interesting I repeat I will come back to this circuit by doing this circuit the output is or gain is independent of the transistor or opam parameters so for opam at all on up you can see that we will meet again