 Hello, and welcome to this presentation of the STM32H7 comparators. It covers the main features of the ultra-low power comparators and gives some application examples. The two comparators inside STM32 microcontrollers provide a binary output which indicates if the analog voltage on the plus input is larger than the voltage on the negative input. It allows the MCU to react when the analog signal crosses a predefined threshold. The comparator continually monitors voltage in contrast to an analog-to-digital converter which operates in sampled mode. The comparator can be used to wake up devices from sleep, low power sleep, and stop modes. Note this is not possible when the internal reference voltage is switched off. Comparators can benefit from the flexible configuration of comparator properties which can be locked for safety reasons. Another safety feature of the comparator is its ability to generate a brake signal for timers allowing you to safely stop the generation of PWM driving signals. The two integrated comparators can be combined into a single window comparator. The analog properties of the comparator include hysteresis or a trade-off between speed and power consumption which are configurable. It offers flexible interconnections of inputs and outputs allowing a threshold selection of several external and internal inputs such as DAC outputs or internal reference voltage outputs. The comparator output can be connected to IOs using the alternate function channels or internally redirected to a variety of timer inputs such as enabling the brake event for fast PWM shutdown. The user can create cycle by cycle current control or input captures for timing measurements. This slide shows the general block diagram of the comparator integrated in the device. The comparator's power consumption can be adjusted to have the optimum trade-off between the speed and energy efficiency for a given application. There are three modes available, high speed, medium speed, and ultra low power. The high speed mode is preferred for power conversion applications, for example a motor control design. While ultra low power mode is the right choice for battery powered applications where reaction times are not critical, for example in PIR sensor monitoring. The comparator can stay active even if the rest of the system is suspended and the clock is switched off. The comparator can trigger an interrupt on the rising, falling, or both edges of the comparator output through the EXTI line. The output can also be connected to the CPU's nested vector interrupt controller or NVIC. The comparator can trigger an interrupt on the rising, falling, or both edges of the comparator output through the EXTI line. The output can also be connected to the CPU's nested vector interrupt controller or NVIC. The on-chip comparator remains active in the following modes, run, sleep, and stop modes. In standby mode it is powered down and must be re-initialized for use if returning to one of the higher powered modes. The on-chip comparator configuration capability allows the user to select the best performance point for the targeted application. It replaces the external standalone comparator thereby reducing the bill of materials. The purpose of the window comparator is to trigger an interrupt if the analog voltage goes beyond the defined lower and upper voltage thresholds applied to the inverting inputs of each comparator. This event can generate an interrupt through the EXTI line. The two non-inverting inputs can be connected internally by enabling the wind mode bit and therefore save one I.O. for another purpose. Comparator output values can generate break input signals for the timers on input pins using GPIO alternate function selections incorporating the I.O. open drain connection. The purpose of the break function is to protect power switches driven by PWM signals generated by timers. The two break inputs are usually connected to fault outputs of power stages and three phase inverters. When activated the break circuitry shuts down the PWM outputs and forces them to a predefined safe state. Please see the timer training slides for more details. The comparator can be used in the cycle by cycle regulation loop for monitoring the peak value of the current flowing into the load. The purpose of the blanking function is to prevent incorrect current regulation tripping due to short duration current spikes at the beginning of the PWM period. Short current spikes caused by activating the power switches can produce false pulses on the comparator output marked by the blue color on the diagram. These pulses need to be masked by a blanking window to avoid false fault detection. The blanking window waveform can be generated by one of the timer output channels. Both comparators have identical electrical parameters and configuration options. The difference in input interconnections are summarized in this table. For the difference in output redirections please refer to the product data sheet. This is a list of peripherals related to the comparators. Please refer to these peripheral trainings for more information if needed. Thank you.