 So tools for FPGA development. So my name is Brahim Amadi-Sharif. I think everybody knows me, I think. And my colleague friend Joyce, and this is Hackerware 5.0. So I thought I'd give some small presentation on the development tools available for FPGA. And at towards the end, I had some few slides about the growing popularity of FPGA on all sorts of different domain. So I find this graph on the FPGA market. Only $2,000? No, no, billion, billion. So in the world, there's basically different vendors of FPGA. Xilinx is really the biggest one. I will show some slide later. Altera was bought by Intel. And afterwards, so these are the really two biggest FPGA manufacturers. And afterwards, there's MicroSemi Latisse. Quick logic is not as known as the others, but I think it's probably because the chip they're making is mainly for maybe communication or specific military applications and the others. So a total of, I think it's $4 billion. It's basically billion dollars. And the whole thing is usually growing, growing. FPGA is actually more and more popular. So this is more or less to present more of the marketing aspect and the value. So for those who don't know FPGA development lifecycle, so you have your requirements, design, specification. You write some RTL design. Then you go through synthesis, place, and route layout up to the FPGA. And like any other development, you have a lot of feedback going backwards. It's quite an intuitive process with some simulation, logic simulation, post-layout simulation. And then here is a sort of a graphic that has this V shape, the software and the hardware aspect from the verification, design, implementation, and then the other side on the hardware. The issue here is that you are developing some software sort of language base that actually map into hardware, physical blocks, and ultimately gates and hardware thing. So this is quite an intensive type of cycle of development. So these are the tools that will give this PDF later available on the site or something like that. So we have Xilinx. So Xilinx has IC and Vivado. Intel, FPGA, Altera has Quartus. Two others which haven't really used much, but they are quite popular because of the small, quite low-cost FPGA now is the Lattice and the MicroSemi. So the Diamond, Sweet, and Libero. And then two tools which are becoming quite popular because they are open source, free, et cetera, and have this sort of open source community behind is Verilator and Yoursis. So I will go through these two slides for this. So Xilinx has this tool called IAC, Design Suite. So all the way up to the Series 6 and early Series 7 of the FPGA of Xilinx, IAC was the tool that is used to basically develop all the FPGA stuff. So you have a classic tree of your project with different, for example, X2, et cetera over there. Maybe I need the, no. You have a laser. Basically, you can select which FPGA you want. And then afterwards, you have the different process that you can basically specify. Oh, yeah, yeah, yeah. Oh. Come on. So you have the FPGA here. You have the code. So can someone recognize this code? What sort of language is it? OK, you get a pretty shot. So beginning, you have this upgrade. And then you specify, let's say, a process beginning, waiting for, and then you wait. You have a specific thing. And the whole block here. And then you have some signals, Y, which is just one bit. And then you have all the debug here. You can specify things. And then you have tons and tons of aspect that you can, more or less, like a Visual C++ ID. And in the case of IEC, here you have the implementation. And you also have the simulation part. So you implement. You test how things run. And afterwards, you have to do a test bench when you basically specify the, oh, my god. Oh. Oh. Oh. Oh. Oh. Oh. Oh. Oh. Oh. Oh. Oh. Oh. Oh. Oh. Oh. Oh. Oh. Oh. Oh. Oh. Oh. Oh. John Green. So you end up with an error. If you are very good, you don't actually get this one. Warnings usually. TCL. This is the shell to run and then find new files. So this is the sort of, oh, OK. You have to press populate. Press, OK, OK. I'm good. So if you want to try, you can download this webpack. You register to Xilinx, and you can get the webpack. Has Xilinx evolved in the FPGA technology? OK, so I can show here. There's also a chip scope to actually verify signals, et cetera. And you have all sorts of plug-in, but more like part of the tools. The macroblades being this small risk processor that you can instantiate to actually run stuff, the simulator, embedded IPs. Next. And then when you actually move to Series 7 or Zinc, which have an ARM core, you're using Vivado. So this is the most recent tool. So they rearrange things a little bit with this one. They analyze the synthesis implementation. And then you can actually also have a tree with all the different signals that you can have. And then really, FPGA is about designing your blocks, synchronizing things, try to maximum the bandwidth of the different blocks. And then at the end, make sure that things clock at the right position and try to get the maximum of your resources, really. You have a lot of IP integrator here that you can also get stuff from Xilinx. Then you have your test bench in Verilog here. The analysis RTL has this nice rendering. Once you actually have your code, it can roll these nice blocks and things connected. So I would recommend you to try to use Vivado. The most recent Series 7, Spartan 7, and also Zinc are quite cheap, like $100 or $200. So this becomes... $100 is quite okay. It's like a Raspberry Pi type of thing. It's like that one, the pro version or the... Okay, so you can have the... It's still free. You can still have the free version. And the resources are limited. But usually when you buy a more expensive board, you get a license that actually allow you to generate a bit. That one there is the pro version or the under version? This one? This one is the normal version. There's no difference between... The only difference is when you select... In the project, when you select which FPGA... Yeah, the IP blocks you will have... The idea is that actually if you buy a very expensive FPGA, you will have a key that allow you to actually generate the bitstream for that card, so actually you're not... So this is the Vivado and HLS. There's also high level synthesis, meaning that you can write C code that actually will be converted in VHDL over very long. That will be... So it could also be easy for you to write stuff in C. However, don't expect your massive C code to be converted properly. It's tend to be filters, FFT, or functions like this. So if you really have some area at the beginning, when things are not initialized, it turns out in gray, in red. And at some point, if the signal is actually undefiled of this conflict, it will show it on the graph. And within the code, you can also have some sort of printf or create files that you can create a log. So usually you develop something, you have some test vectors that you fit into your block, you have the results, and then you can use all the tools outside to script. Okay, good question. In some of the Vivado, you can also look at where Vivado put the different... sorry, element and also calculate the path with a certain delay because down the line, the shortest path is what you want to minimize so that you have the maximum speed for all your circuits. So you can really go down to the very lower level, specifying which pin goes where, et cetera, et cetera. Next. As you may know, Intel bought Altera for $16.7 billion in 2015. So this is the big move of Intel buying the number two in FPGA world. And now everything is called Intel FPGA. So mainly focused on IoT and also data center, basically. That's the move. So then I will let my colleague to continue on this path. Okay. Okay, the Intel's version of their design simulation 2 is basically the quarter design suite as you can see here. And pretty much it's quite similar to, in my opinion, it's quite similar to Xilin's ISE and all that. So you basically write a code and can do things like your simulation. So you can see the waveform simulation of your module and all that. And you can do, and in quarters of pretty similar to Vivado or ISE, you can do things like your chip layout, your simulation, and things like that. So yeah, it's pretty similar. Anyway, most of these tools like for lattice diamond for their IS40, FPGAs and things like that. And even micro-semi-liberal is just pretty much the same thing. What you're just doing is that you're just designing your, you just come up with your design calling to requirements and then you synthesize a plan layout and then test everything. And then you verify that everything works out both in the, both when you synthesize your very lot of VHDL code and if you're using an FPG with an actual hardcore processor, you verify that the software also works. So yeah, generally that's the design set. I'm pretty similar for most of the tools anyway. These two which I have personally used very later, what it does is that when you write your very lot code, you can take out your very lot code and write a test bench in C++. You can spit out a file in which you can use GTK Wave to actually show you get the simulation data and all that and it is free for everyone to download it, but it does need a bit of setup and configuration to get it working. And of course there's things like a U-SYS open synthesis suite which I'm not personally using so I can't really talk about it. Yeah. And I guess I have to hand back to Ryan. So for U-SYS, it's really that they really want to have these sort of free tools that remove the tool from the commercial vendor. So if you go back, go back by one. So they're really trying to map, for example, they have this mapping of series six. So they are trying to generate all sorts of bit stream from examples and afterwards reverse engineering the format of the bit stream to be able to generate themselves. I mean, they have the tool. The person who's in charge of this is called Clifford, John Clifford I think, and he's very active in open source and that type of thing. So next. So FPGA is becoming more and more popular. So the first thing is that it's used to prototype ASIC and then there's actually a few topics which are becoming very, very much popular. Risk 5, deep learning, even cryptocurrency mining these days and Internet of Things, which is more like the low power aspect. So ASIC prototyping, it's really more of the same verification than as a synthesis. Physically out of the ASIC, we really look at the gate level where the FPGA, we have actually have blocks. So the FPGA have already some blocks, but down the line you usually use the FPGA development to prototype for ultimately making the ASIC. An ASIC will actually use less power and also get clocked faster than the FPGA. So usually it's the preparation for that. Next. So some of the interesting development is this Risk 5 and one of these guys called Jay Gray has this massively parallel risk accelerator when you actually can pack 1,680 risk 5 into one massive FPGA. And down the line it's basically a small little router that make a mesh or some sort of network and then each of the box, as you can see some memory and then the... So you have this sort of a switch and then you have really those buses is really to move packets of data into those little parts. It's called like a processing element and each of them can have some memory processing and then some switches. It's about splitting the big algorithm into small processing element and basically maximize the whole thing which is more or less what is done in the GPU when you have like thousands of small cores which do things in parallel. However, this one you can program which instruction you want, etc. So there's this ability to have a very customized processing unit. And this is actually some of the example the code is provided so you can also basically try yourself a lot of those developments. And then if you are really top of the range you get from Amazon AWS an F1 16, so you have a PC switch you have access to these two Xeon and then you end up with eight massive FPGA boards so those people who are using this they tend to have this massive AI algorithm or video processing and then they use AWS to pump data through some internet somewhere and basically here you have really a massive massive system that basically can implement what you want. So it looks okay like this but you still have to connect things together, etc. So it's not straight forward. But this is sort of the top of the range and the guy is called Gray. So this table this is actually from a GitHub so you have a lot of repositories from different so Sci-Fi is really one of the newer companies who is designing those RISC-5 as a chip so you have the sort of Arduino size or Raspberry size small board and then you have Zurich University so you have RISC-5 with a different like 32-bit 64-bit some of them have compression some of them are integers some of them are float some of them have all sorts of add-on and a lot of them you can actually really get the source code dig, learn, modify, compile and try to see how it works into your so this one for example the PicoVR this is quite a sort of Clifford Wolf that's the guy who's doing the RISC. Next. So deep learning I'm sure you've seen this now is that there's a lot of FPGA-based cars which are accelerating a lot of the AI push now so as much as there's a push from the GPU side with NVDA or AMD having those GPU-accelerating AI Xilinx and a lot of Intel I think this one is Altera-based while also developing those cars to actually implement some of these deep learning one of the advantages of those cars is that you can also have some communication like 100 gigabits Ethernet so if you have your GPU card you also have the limitation of the PCI but you cannot feed Ethernet data where here if you're doing financial training the data feed can actually come directly to the core of your thing and on the line you always they always compare like teraflop the number of logic elements and then you have DDR4 and HBM all sorts of innovative memory and technology so Bitware is one of the interesting and this is Intel. Next. Because I'm an Xilinx fan Xilinx basically unveils architecture really for your inference so you really get proper chip with a huge amount of DSP capabilities, huge amount of RAM on board and plus for DDR4 basically there's four like memory slots and they're really comparable to some of the NVDA, V100, P100 type of cards however they consume quite less so there is this sort of balance between having a GPU which is more generic there will be a pass at some point where people learning GPU coding will plateau in a sense from a performance point of view but those FPGA you still have to learn the tools to actually implement some of the stuff so there will be a plateau where to synthesize automatically some of the blocks that I use in the GPU Next. Funny enough, the crypto mining which used to be on those little Spartan 3 little babies becomes racks of basically Xilinx cards I'm not sponsoring any of this I think the return of investment is always very low now I think whichever you take GPU or but you will see people creating those rigs now the whole issue is that the bit stream that must be running here is not open source so actually people will try to make you buy the cards and also get you the bit stream for this so this is something that ultimately there's a sort of a shift slight shift that the GPU can be replaced by FPGA especially for some crypto currency which are hitting the sort of CPU the sort of arithmetic part and where the memory is an issue and the memory aspect in FPGA can be actually programmed so that this can be pushed higher so it's called the memory wall in a sense you get to a point where the maximum bandwidth of the system is actually is the limitation of your processing and then the last one is the IoT it's coming some of the this is just a paper from Archipoli the issue is that you can really have some very very ultra low FPGA IoT calls and ultimately they run on really the sort of micro semi igloo FPGA so we will see more and more M3 small cortex M3 or M0 M1 etc which will be implemented in FPGA which becomes a small prototype for small chips for IoT and you have to you have to realize that the FPGA has this possibility that you can instantiate some I2C some SPI interface so you can actually really modularize your design in the way that you want having multiple camera having different type of input so this is a lot of micro electronics conference are more and more basically publishing those and there's a lot of aspect about the power techniques to actually reduce the power on those things the university in EFT Zurich have I think it's called is very low power Rix 5 also so you have a lot of technology that has been developed like this in terms of people trying FPGA the tools are usually a couple of gigs the machine to be run usually you have a 4 gig or 8 gig machine none of the tools apart from the open source one really explore multi core so it doesn't matter if you have an existing core Vivado I think has limit of 4 core so you cannot really run 100 cores on those tools however memory tends to be the sort of limitation on the thing ok thank you very much