 So, today we are going to cover in this lecture junction field effect transistors and I should make sort of generic command before we begin and that is this like these lectures are actually not sort of full-fledged you know classroom lectures and that is because you already know many of these things. It is essentially to present a way maybe a different way to cover some of this material and in a way it sort of explains it also illustrates the philosophy of teaching that we follow here in IIT Bombay and we thought everybody could benefit from that a little bit. So, teaching is we always feel that teaching is not really about you know getting some giving some formulas and say here is a formula and then mug it up and write in the exam you will get marks that is exactly the opposite of teaching that is what we believe and therefore, we want to do things in a different way and hopefully at least some of you will be able to follow this in your teaching. So, teaching we think is like more about you know thinking and not just thinking yourself, but also making your students think and for that to happen the student should feel that there is a link between what he or she has already learnt in the past and what he is going to learn he or she is going to learn today. So, that is something that we always keep in mind and that gives the students some confidence that he or she also can you know understand the development of a topic and not just sort of mug it up and write and get marks. That is the last thing that is of importance. So, let us I will talk about JFETs in this particular lecture and of course, let us begin. So, before we even get down to the structure of junction field effect transistor the students should really know what is a transistor I mean what is the basic job of a transistor and that is illustrated in this figure. A transistor is to differentiate it from a diode or a resistor it is essentially a first of all is a three terminal device. Second there is a conduction between source and drain and that conduction is controlled by the gate terminal. So, that is the sense of transistor action and then of course, you can have various transistors there are field effect transistors there are bipolar junction transistors the field effect transistors are of various categories and so on. But, essentially the idea is this there is a resistance not of course, it is not a constant resistance between the source and drain and that is controllable by a voltage that you apply on the gate terminal. So, this is something that we feel must be step number one in sort of illustrating transistor any kind of transistor that there is a the current is going to vary between source and drain on two counts one is a drain voltage itself and the resistance itself is getting controlled by the gate. So, the drain current is going to depend both on the gate voltage as well as the drain voltage. So, just like I said a field effect transistor as a gate terminal which controls the current flow between the other two terminals that is the source and the drain. So, in simple terms and that is why that is what must appear before any equation appears in simple terms of an FET can be thought of as a resistance connected between the source and drain which is a function of the gate voltage that is that is the basic operation of a field effect transistor and what do you do with it etcetera these are questions that will come later in applications digital circuits analog circuits whatever you all right the pointer. Now, as I said the mechanism of the gate control would be different in different devices for example, in junction field effect transistors as we know it is p plus n p n junction that controls the resistance. In MESFET it is a short key barrier that controls the resistance between source and drain MOSFET it is again controlled by gate, but there is an oxide and there is an immersion charge and so on high electron mobility transistor similar to MOSFET all right. So, FETs can be used for both analog and digital applications in each case the fact that the gate is used to control current flow between source and drain plays an extremely crucial role and that is why you must have these transistors and a diode for example, will not be able to do the same job no matter what you do because it is a two terminal device and it has its intrinsic limitations ok. So, now we proceed to the structure of a junction field effect transistor and this again it is better to show three dimensional view first. So, that the students get an idea of what a real structure looks like and then you can go to a cross section directly jump to a cross section students often get confused they do not know what it looks like in 3D all right. So, here is a figure that shows the transistor in three dimensions there is a it is like basically a rectangular it is it is a cuboid you can say there is a source terminal at one end drain terminal at another end and the gate terminal is actually the both the top and the bottom these are connected together and that is the gate once the student gets this picture clear it is much easier for him or hard to understand the cross sectional view all right. So, next we go to the cross sectional view and that is here in the cross sectional view it is important to show the P plus regions. So, what we have here is the channel or the conduction channel is n type silicon that is marked over there and the device I you can see if you should explain to students that it is actually a symmetric device there is a there is an axis and think the symmetric around that axis. The channel width or the this would not be called width this would be called the channel thickness is 2 times a where a is each one of these dimensions and is 2 a because of a grain symmetry all right. So, what happens essentially and that will be shown in the next slide is there is a depletion region which will reduce the channel thickness and so on. So, even this is the little little more complicated than what the basic the very very basic device structure should have and that is because it has got these neutral regions near the source and drain and it is it is best not to confuse matters with these neutral regions in the beginning. So, let us represent the same cross sectional view with a simplified structure and that is here. So, here we do not worry about this source this regions near the source and drain but just truncate that and of course we can add that later fine. So, this is the structure and that is as I was saying this is a simplified structure in which we do not worry about the source and drain regions. The purple region here is the P plus region and the channel region itself is n. So, there is a P plus n junction at the top as well as a P plus n junction at the bottom. So, that is the basic structure the more the important things here is the doping of this n region or the channel region the lengths from source to drain and the channel thickness which is called 2a here where a is half of this that is and it is 2a because of the symmetry alright. So, let us go to the next slide ok. So, the important things to take from this slide is the entire region between the top and bottom P plus region offers a resistance to current flow and the resistance will depend on Vg and that of course we want to see. So, again make things as simple as possible first and then make them complicated later. So, that the students get a feel for you know the basics first and then get an idea of how things are in real life right. So, the very simple case that we can first consider is when the drain voltage as well as the source voltage are both 0 ok. So, that is the first case we will consider ok and that shows this particular situation and maybe I should expand this. So, that you can see it better ok. So, let us concentrate first on the gate voltage equal to 0 volts and as as somebody was pointing out I should go slow now. So, let us take Vg equal to 0 volts and in all of these figures note that the source is grounded the drain is grounded in this particular case gate voltage is also 0 volts right. So, what is what is the situation at 0 volts we have this P plus region the purple one next to that there is a blue region and that is the depletion region right and this is very important because some textbooks actually do not point this out ok. So, there is this purple region which is the P plus region and next to that there is this blue region which is the depletion region and even note that even if your gate voltage is 0 volts there is still a depletion region and that is because of the built in potential between the P plus of the P plus n junction. So, there is it is not as if you have a gate voltage of 0 volts the depletion region is not there it is not at all like that and very often some of the textbooks I have seen do not make this very clear and that can be confusing ok. Next to that and of course, they both the top and bottom are symmetric. So, that is one thing that must be noticed as well next to that there is a light blue region and that region is essentially the n type silicon which has got electrons ok. So, the depletion region does not have any electrons or holes or extremely small number which is insignificant. So, they do not participate in conduction. The light blue region is actually of importance also is of interest as far as conduction from source to drain is concerned because that is essentially neutral that means it has got as many ions as there are electrons and electrons of e to move. So, that is really the region of interest and the dimensions this A of course, is the half channel thickness that is fixed this W is the depletion region width that will obviously depend on the gate voltage H is the width of the other thickness of the neutral region again half thickness of the neutral region. So, this and of course, H and W are both dependent on the gate voltage such that H plus W will always be A ok. Let us go to the next next figure the only difference between this and this is that the gate voltage is now made more negative. So, here is 0 volts here is let us say minus 1 volt. So, as a result what has happened is the depletion width. So, the junction is now more reverse biased and the depletion width has increased and therefore, it has eaten up into the channel. So, the thickness of the channel that is available to you has now decreased. So, that is very clear in this figure and so on. So, once the student understands this point it is easy to go forward and if you increase this gate voltage or rather make it more negative. Obviously, you are going to get more of the depletion region and less of the channel region and of course, at some point what is going to happen is that this whole channel is going to disappear because the depletion region the top and the bottom depletion regions will just simply merge with each other and that situation of course, is called as the pinch off situation ok. So, essentially the point is that as the reverse bias across the junction is increased by making V g more negative the depletion region widens as we have seen here and the resistance offered by the n region increases because now you are the width of the n region becomes smaller and smaller and therefore, the resistance increases and that is essentially the operation of a junction field effect transistor. So, that is the mechanism by which the channel resistance depends on the gate voltage in a junction field effect transistor. Finally, when the reverse bias becomes large enough the depletion region consumes the entire n region and that is little bit away from this one when all of this depletion region will just be one and the channel becomes pinched off and the voltage that corresponds to that particular situation is called the pinch off voltage and that of course, is a very important parameter for a GFET alright. So, now let us get to this pinch off voltage let us see how we can calculate that and again when you are teaching in the class you can say the formula for the pinch off voltage is so and so it is not a very satisfactory thing to do because the students will always have a lingering doubt in their mind where did this come from and they will think that it has just sort of fallen from the heavens and you have to just take it for granted or what and in fact, it is not like that at all it is very simple to derive and therefore, it is always a good idea to derive it in front of the students so that then they develop some confidence that things can be derived and not just mocked up very important ok. So, how do you derive this let us in this slide. So, what is the pinch off voltage basically it is the gate voltage for which this H becomes 0 or in other words this W becomes equal to A that is the pinch off voltage. So, if you know the dependence of W on V G just equate that to A and you get your pinch off voltage that is simple as that. There is no reason why this should not be derived in class in which it must be derived in class so that students develop a better understanding ok. So, what is W for a P plus n junction? So, the depletion region actually extends both into the P plus region as well as the n region and if it is P plus that means is much the P region is much more heavily doped than the n region and therefore, it is a fair assumption to say that all of this all of the depletion region basically is in the n region and not at all in the P plus region that will be extremely small. So, we just ignore that part and we say then that the W depletion width here is given by this P plus n junction expression and what does it have? It has got epsilon for silicon which is 11.7 times epsilon 0 then it has got the built in voltage the built in voltage will actually depend on the doping of the P plus n region the doping of the n region. This is something like 0.8 volts 0.9 volts 0.95 volts and so on of that order V is the difference is the potential difference between the P plus and n. In this case your P plus is sitting at V G and n is sitting at 0 volts because your source and drain everything is at 0 volts. So, that is what V is. So, V is simply V G in this case Q is the electronic charge and D is the doping density of in the channel typically 10 is to 15 10 is to 16 per centimeter cube. So, it is a simple matter now to put this W here and then find out what V G is and that V G will be the same as the pinch off voltage. So, then we substitute this W here and that is it and then you get the pinch off voltage equal to V B I minus let me just zoom on this. Then we get this V P equal to built in voltage minus Q and D A squared by 2 epsilon. So, problems with some of the text books they say that assume V B I equal to 0. Why? Nobody knows I certainly I do not know why because it is not really negligible compared to that term as we will see. So, that is a silly thing to say that ignore V B I and you should not say that Q N D A squared by 2 epsilon. So, of these Q and epsilon are just physical constants you really cannot do anything about that, but N D and A squared are in the control of the fabrication person. So, when the device is being fabricated you can control N D or you can control and you can control A to get the desired value of pinch off voltage and note that this dependence on A is rather strong because of the square here whereas N D comes with the linear dependence. Let us go to the next slide. So, now in the next slide we have a sample calculation of the pinch off voltage. This structure is the same as before we do not need to zoom that. So, here is the formula is just reproduced. So, an example and this is always I am showing this because it is always a good practice. Whenever you give a formula in class it is always good to put some numbers so that it helps the students to get these things fixed in their minds. Then they can connect these formulas to actual numbers and it really helps a lot. Not only the numbers it also helps them to think about the units of each of these quantities and that is very important. So, let us say in this example we compute the pinch off voltage for an N D of 2 10 is to 15 per centimeter cube A the half channel thickness of 1.5 micron and the built in voltage given built in voltage of 0.8 volts. So, let us go further. Now the reason this is actually a simple calculation but the reason I put this in this slide is to illustrate the units of each quantity and it is very important that the units are used consistently. So, that you do not end up with you know 3.48 million volts or 3.48 micro volts and so on and that can happen I have seen that in answer papers. So, it is very important that you bring this point out very clearly in class. So, q 1.6 10 is to minus 19 coulomb and you should actually ask the students to tell you what q is and if they do not know the value of q they should leave the class and know the value of q and come back may be. So, q is something that everybody must know epsilon 0 8.85 10 is to minus 14 farad per centimeter that is something that everybody should know 11.7 is the epsilon for silicon something that everybody must know and these are all constants basically and. So, what is what are the variables 2 10 is to 15 per centimeter cube that is the doping density and 1.5 micron now this is very important we need to convert this of a micron into centimeter. So, that the units work out well and that conversion is 10 is to minus 4 and then you should actually show this in class you have centimeter raise to minus 3 there centimeter squared here and this is there is a per centimeter in the denominator. So, all the centimeters will actually cancel you are left with coulomb divided by farad coulomb divided by farad is coulomb divided by coulomb by volt and that is volt. So, if you do this in class in this way or an equivalent manner then students actually begin to develop an appreciation for all the units and do not make mistakes later on. So, all this comes to 3.48 volts and the built-in voltage is 0.8 volts and so the net pinch of voltage therefore is minus 2.7 volts in for this device what does it mean? It means that if you apply gate voltage of minus 2.7 volts this channel will get pinched off and you will see a very large resistance between source and drain that is what happens at pinch off. Things are of course different if you apply a drain voltage and we will come to that later. So, let us continue we will continue with I think some there may be some questions, but we will take them at the end all right. So, the pinch off voltage in this particular case is minus 2.7 volts and as I was saying the built-in voltage as a built-in voltage of 0.8 here is certainly not negligible compared to this 3.4 3.5 volts right. So, therefore, there is no particular reason there is no good reason to ignore it although some textbooks do that and that is not proper. Let us go ahead and this is exactly what we said if a gate voltage of minus 2.7 volts is applied the channel gets pinched off that is the resistance between the source and drain becomes very large. So, that is that was with the gate drain voltage equal to 0 and now we need to consider the more general case of drain voltage not equal to 0 right and we took this vd equal to 0 case earlier because it is much simpler to handle and also gives the students a feel already of the pinch off voltage. So, the pinch off voltage is something that you should that can be taught even before one talks about a non-zero drain voltage because it is completely independent of the drain voltage. So, let us go to this slide let me zoom a little bit and just explain these figures first. So, now here what we have is there is a certain gate voltage which is constant and we are not going to vary that from this figure to that figure to the next figure, but what we are going to vary is the drain voltage. So, in this particular example in this particular figure the drain voltage is 0 volts and source voltage is also 0 volts. So, there is nothing there is all points in the channel are sitting at 0 volts and there is no change as you go from x equal to 0 to x equal to l it is all the same. You notice that this depletion width as well as the channel thickness h they are also constant that is irrespective that is independent of x that is because the drain voltage is at 0 volts and this is the case we have already seen in the previous slide. Now, let us supply a small voltage let us say 0.05 volts that is 50 millivolts at the drain. So, what happens now is the reverse bias between the gate and the source is the gate voltage is some value let us say minus 1. So, this will be minus 1 minus 0 minus 1 here between the gate and the drain the reverse bias would be minus 1 minus 0.05. So, it will be minus 1.05. So, here we have a reverse bias of 1 here you have a reverse bias of 1.05. So, the drain essentially it is sitting at a larger reverse bias as compared to the drain as compared to the source. As a result what happens is the depletion region near the drain end is wider as compared to the source and that is basically what a drain voltage will do. If you keep increasing the drain voltage the depletion with the depletion region width at the drain will increase and of course, the source width is not going to change because the source we are not changing the source voltage. The gate voltage remember is a constant let us say minus 1 volt. So, this keeps on increasing and therefore, the channel thickness near the drain will keep on decreasing and if you plot the potential between from source to drain along let us say this line that would look something like this. So, it is at 0 volts here it is at 1 volt here that is because you applied a 1 volt drain voltage and it will vary in some manner we do not know what that form is, but it will vary in some continuous manner between 0 and 1. So, it is always good to show these pictures to students explain to them qualitatively what happens and then come to equations. If you jump to equations it basically just becomes overhead transmission for them alright. So, let us go to the next consider an n. So, this we have already discussed in this. So, it is important to note that w and h are now functions of x in this figure let me expand it again. So, what we are saying is this w and h are both. So, the w here is that much w here is that much and similarly h will change. So, w and h are both functions of x now depends on where you are in the channel, but w plus h will always be equal to a that is what we are saying here. So, the important point is that since the p n junction bias at a given x is v g minus the potential at that particular point that is shown in this figure approximately the drain end of the channel is sitting at sitting with a larger reverse bias than the source end and therefore the replacement region is larger there and therefore the channel is thinner. And now let us derive the I.D. equation as I said it is always good to derive this and this derivation is a little more involved, but certainly something that you can do in class and you should do in class. So, that the students have some confidence in how things are done. So, let me expand this figure I hope after expansion is showing up already at your end. So, it is the same as same figure as before I am in addition we have shown here a cross section of the device. So, that the equation derivation becomes a little more clear to the students. So, this is w that is h and if I just take this line over there and look at the cross section of this device this light blue region actually is the region of conduction. The region next to that the blue region is actually useless as far as conduction is concerned because it is just a depletion region with no carriers and of course, next to that is the p plus n p plus gate region. So, the important area for the drain current calculation is just this light blue area and what is the area the cross sectional area of that area there it is 2 h that is this dimension times z where z is the device dimension in the direction perpendicular. So, let us begin. So, consider a slice of this device that we have done here the current density at any point in the neutral region is assumed to be in the x direction that is very important and that is a crucial assumption that must be made and this is of course, a very good assumption and that is because normally this length is much larger than this a here the channel thickness and that is why this assumption is quite good. So, what is the current given by it is given by the usual drift term and the diffusion term and in this device in the junction field epic transistor the doping density everywhere is the same and the electron density is roughly equal to the doping density and therefore, the electron density everywhere in the channel is also the same and therefore, there is no derivative this d and d x is just 0. So, the diffusion term drops out and here you just get q times mu n times n d times the electric field and here of course, you have to be careful with the science. So, e actually is minus d v by d x, but I have just put d v by d x there finally, we will introduce all these signs correctly. So, we have neglected the diffusion current since n the electron density everywhere in the channel is roughly the same that is equal to the doping density and therefore, d n d x is 0 when you differentiate this constant electron density you will get a 0. So, what is important in this figure note that only the neutral part of the n silicon conducts that is the light blue region since there are no carriers in the depletion region. So, the depletion region depletion regions are essentially not contributing to any current at all. So, at a given x the current i d is obtained by integrating j n over the area of the neutral channel region that is this region here and in this device v this j n is actually the same everywhere in this area and therefore, the integral simply becomes the current density times this area. Go over the slides later on and see if you have any doubts we will go through this a little faster. So, that is what it is. So, there is this j n which is integrated over this light blue area and that area is simply 2 h times z and then what you see in this bracket is nothing but j n and that is this. So, this j n has been substituted right here that is it. So, i d at any given x at any given x let us say at this point is given by 2 times q times z times mu n times n d all of these are constants q z mu n n d all constants times a times the electric field there p v d x times h, h is nothing but a times 1 minus w by a you can show that by from the fact that h is basically a is h plus w and this will follow from there. So, let us look at this equation somewhat. So, what it says is the current at any point x in the x direction is some constant times d v by d x which depends on that particular x and multiplied by 1 minus w by a. Now, this factor is also dependent on x because w itself is a function of x and we know that is i d at this point is the same as i d at this point. So, what happens in this device is that this d v d x and this 1 minus w by a these 2 terms basically go on adjusting as x is changed such that their product remains the same and that must be the case because we have the same current throughout the device. So, all these things are good to know for the student. Next so what do we do next now of course we do not like this d v by d x here and we do not like this 1 minus w by a because w is also a function of x. We want an expression for i d which is independent of d v by d x etcetera. So, let us see how to do that and that is done by using the fact that i d is actually constant from the source to drain right. So, i d is just a constant and therefore, if I integrate i d as a function i d d x from 0 to l I will simply get i d times l. So, I can do that on this left side and I can integrate this also with respect to x and when I do that this d v d x d x will give me integral with respect to d v with respect to v and I can replace the limits instead of putting limits on from 0 to l on x I can put limits on v the channel potential from 0 to v d and that is what this is. And notice that we have used for this w we have used this expression which we have seen before where this v b i minus v g minus v is the net reverse bias across the p plus n junction. So, the next step is to just carry out this integral. If you notice this integral has got 1 here can be easily integrated 2 epsilon q and d i square all of these are constants this will simply come out v b i is a constant v g is a constant and then there is this minus v. So, the integral will only involve this term can be easily integrated square root of v. So, you will get v raise to 3 by 2 divided by 3 by 2 and so on and with of course, appropriate substitutions. So, when you do all that evaluating the integral and using this particular equation you we get we get and of course, it says do this. So, you must do this on the board or you must ask the students to do this as an assignment or something and not just take it for granted. So, when you do all this you will get when if you want to put it in nice form you get this expression where we have notice that these quantities are now dimensionless there is a voltage in the numerator there is a voltage in the denominator. So, there is a dimensionless ratio here that is raise to 3 by 2 this is another dimensionless ratio raise to 3 by 2 and it can be put in a nice compact form if you replace some of these constants with a quantity called g 0 and that is g 0 here 2 times q times z times mu n times n d times a by l all that is why we do why do we call it g 0 there is a good reason for that, but before you go to that where is the v d dependence in this equation i d equal to all of this the v d dependence is basically here v d and here. So, that is important to point out where is the v g dependence v g dependence is here and here that is the v g dependence all right next. So, let us see what is g 0 is so this g 0 turns out that it is the channel conductance if there was no depletion that means suppose you did not have any depletion at all throughout and if you calculate the resistance of this particular box 1 over that resistance will give you g 0 that is again something that you can very easily show. So, that is the conductance of the channel if there was no depletion that is if h of x was a throughout that means this h is equal to a throughout the channel. So, that is more or less the derivation and often this is the this is not the equation that is shown in textbooks what we show in textbooks is a simplified equation and let us come to that ok next slide. So, before we do that it is good to consider a special case and that is v d equal to 0 volts right. So, now we have this expression for i d and we should see what does it look like if we make v d equal to 0. Obviously, the equation you have derived should apply for should hold for the special case v d equal to 0 and why are we doing this because we already are familiar with this particular situation that we have done before we applied non-zero drain voltage. So, this is your the generic i d expression in terms of v d and v d. So, how does it simplify? And this is something that the students can do as homework. So, there is a v d here this v d of course remains as it is ok. So, there is a v d dependent term here and this is the v d independent term and you can actually expand this you can carry out this Taylor series expansion and then show that it reduces to if your v d is small it reduces to this particular situation. Then that turns out to be just this simplified format here. So, now it is independent of v d because v d is very small and it depends only on v g and if you use some of these expressions that we have previously derived. You will see that this is nothing but g 0 times v d times 1 minus w by a. Now this has a very nice interpretation and it is pretty trivial to show what it is. This simply shows that the channel conductance reduces linearly with w as seen before and we have done this before the v s equal to v d equal to 0 volts k this should be v d. So, this is it is good to know good to know that this complicated expression reduces to something reduces to something that we already are familiar with and something we have seen before. Now comes the very important question that is what does the I v characteristic look like so if I plot this equation that we have derived as a function of let us say I keep a v g equal to some constant value of v g for example 0 volts here put v g equal to 0 here vary v d from let us say 0 to 5 volts and plot this. What I get is I get the current which rises and reaches a maximum at some point. What happens beyond this point we do not know right now, but we will come to that later. So, that is the picture if I apply a reverse bias this is 0 volts if I apply a reverse bias of minus 1 volt then this whole I d v g will come down I d v d will come down and but again it will reach a maximum at a certain drain voltage and so on. So, now this is something that you should actually if the students are willing you should ask actually ask them to write a program and generate this plot it is very simple to write a program. So, what is the key here for a given v g I d reaches a maximum at what point at v d equal to v g minus v p. Now it is not obvious from this figure, but you can differentiate this equation with respect to v d and show that the maximum occurs for this particular condition very simple differentiation and so that is the take home point here at this value of v d the bias across the p plus p n junction at the drain is what is the bias across the p n junction it is v g minus v d and that turns out to be v p and what is v p v p has a significance v p has a significance that it is the pinch of voltage right. So, the channel is pinched off at that particular point. So, what it means is at this value of v d the bias across the p p n junction at the drain end is v g minus v d equal to v p in other words the drain end of the channel has just reached pinch off that is what has happened and how do you show this pictorially. So, here is a figure which shows that. So, this is at this particular point at this particular point or this point or this point depending on the v g this is the situation here this is the situation right. So, at drain end the depletion region the top depletion region and the bottom depletion region I just merged with each other and that is the pinch off situation denoted by this circle here. So, let us go to the next slide. So, the important question to ask now is what happens if v d is increased further. So, now we know more or less the story up to this point what happens if I go on increasing this what will happen to this particular region is will the current just collapse of course we know that it does not happen it is important to explain why it does not happen. So, it is good to show this kind of figure right. So, here we have let me just get all these things and then expand. So, here we have various situations here is the I v characteristics I v I d versus v d here is a small v d let us say you know 10 millivolts 50 millivolts of that kind and this situation corresponds to this point a here then we apply a larger v d, but still before but less than that particular value then you get this point b here. So, that is the situation at that point at c as we have seen before this drain end has just reached pinch off that means the top depletion region and the bottom depletion region I have just merged with each other that is the situation d. What happens if I increase v d further and of course we know that we reach the saturation region, but why does it saturates not very it is certainly not very obvious for any student who is doing this for the first time. Therefore, it is very important to explain what happens in this saturation region. So, what happens in saturation is that this region this pinch off region expands just a little bit and the excess voltage that we have now beyond v d sat that all of that drops across this particular high field region. Therefore, as you can see that this region here where there is a neutral channel this region has not really changed all that much and therefore, the conditions in the channel are more or less the same therefore, the current is more or less the same and that is what happens in saturation all of these things are actually written over here, but it is very important to actually show this pictures either draw them on the board or just show them just project it or whatever and correlate that with an IV characteristics. Of course, all of this is at a particular vg otherwise the students really we often ask our the candidates who come for m tech examination and we ask them what why this saturation happening they often do not know the answer very important to explain this. Next slide here is an example it is very important to actually ask students to do something like this. So, they develop some they should start believing the equations rather than just mugging the term writing in the exam and getting marks and if they will start believing in equations only if they do something with the equation and that is very important and this is something that they can easily do it is not really asking for much. Here is a here is a problem and n channel silicon j-fat as the following parameters at t equal to 300 k that is the that is room temperature a equal to 1.5 micron the channel that is the half channel thickness l is l is the device length 5 micron z that is the dimension in the direction perpendicular to the paper 50 microns. Nd 210 is to be 10 210 is to be 15 vbi 0.8 and mobility is 300 centimeter square per volt second. What is the pinch of voltage the you can actually this is this example these numbers are the same as before. So, the pinch of voltage is the same as what we saw earlier and you should point out to the students that in this pinch of voltage calculation this mobility will simply not enter because we are not even talking about any conduction. We are just talking about a gate voltage at which the channel is completely pinched off and that is simply coming from electrostatics and there is no there is no conduction coming into that at all. So, where does the mobility actually come into picture that of course, comes into picture in idvd characteristics. So, question b is to write a program to generate idvd characteristics for vg equal to 0 minus 1 y minus 1 minus etcetera. And for each of the above vg values they need to compute vd sat that means the vd value at which the channel gets pinched off or the drain current saturates and show it on the idvd plot the and of course, the part of the part of an idvd characteristic that corresponds to vd less than vd sat is called a linear region and that corresponding to vd greater than vd sat is called the saturation region. So, it is very easy to write this program and students will feel much happier with the equation once they do this exercise. If they plotted they should get something like this. So, this is the idv characteristics of course, the equation is going to give data only up to this point after that it is just constant and then this is the boundary between the linear and saturation regions. The linear and saturation region are also marked over here. So, I think that is more or less all for this topic. I think there are just a couple of comments. So, it is important to point out that in very often we do not use this original equation because we are only interested in the saturation region and there a simplification works quite fine and that is very useful for approximate design of circuits and so on. So, let us just go through this. So, this is our original equation and we are generally especially if you are talking about analog circuits we are only interested in the saturation current. So, saturation happens when vd sat is vg minus vp. If you do that this whole term becomes just one and you are left with this expression. So, that is the actual id sat as it follows from our original equation, but it is a little complex because there is this 3 by 2 here and so on. So, very often this following approximate model is found to be adequate in circuit design and that is id sat at given vg is simply some constant id s s 1 minus vg over vp square that is it where id ss is nothing but the saturation current at vg equal to 0 volts. And in amplifier design we are interested not in the actual current, but in the slope of this id with respect to vg at a constant vd. So, that can be obtained easily from this equation and that is what you get. So, some students might get if you show this equation some students might wonder where this comes from because they would in textbooks they would probably see this equation. So, it is important to point out that this is actually an approximation for what you get theoretically. Now, just one more slide I think. So, now let us bring back the neutral source and drain regions because as we said earlier this part of the device is the so called intrinsic part, but the actual device will also have some neutral regions here which we can represent with some resistances. So, if you want to model this whole thing accurately then this is your intrinsic device which will follow the equation that we derived. Then in addition you have the source resistance here and the drain resistance here attached to it and that becomes a more complete maybe more accurate model. Very important to also talk about the small signal model because if you are talking about an amplifier example like this then it is important to know what the gain of this amplifier is and that is where we need a small signal model. So, a small signal model is required in analyzing an amplifier it is gain or even frequency response and what is. So, what is an appropriate model for a JFET? We notice that between the gate and source we have a P plus injunction between the gate and drain also we have a P plus injunction. It means very large resistances. So, these large resistances are so large that we do not even we can just treat them as open circuits. But apart from that we also have a P plus since it is a P plus injunction apart from that we also have a capacitance and those are these capacitors this between G and S there is a capacitance CGS between G and D there is a capacitance CGD and these capacitance are actually important because these will limit your limit the performance of your circuit at high frequencies. If the frequencies are low then of course these are open circuits and then they are not there. What is the other most important quantity? GM the transconductance in this saturation region that is DIDVG with Pd equal to constant and we already derived a little approximation for that earlier. So, if you apply a VG here the current the small signal current here is GM times VG where VG is the small signal voltage. In addition in our derivation actually this there is no resistance between this between the drain and source because after saturation we said the ID becomes constant. In practice it is not quite constant and there is a small resistance between drain and source and one over that resistance is called GD and this GD can actually limit the performance of an amplifier somewhat. So, that is the small signal equivalent model and of course whenever you talk about small signal equivalent model it is good to tell the students why we want to talk about it even and that is because we want to look at amplifiers. So, let us go to I think the next one is probably the last slide or this is the last slide. So, I can take some questions and there is still some time remaining and I wanted to talk a little bit about some other topic but let us take some questions. If you have any questions you can press the raise hand button and we can there are also some questions in the chat mode so I can take that now. All of these slides are available on the web so you can just download them and look at it in more detail. In what way analog switch using JFET differs from digital switch using JFETs actually are not really used in digital circuits these days or even earlier because they were better alternatives either the BJT or the MOSFET. So, there is no really there is no such thing as JFET as a digital switch it is used in I know that it is used in some of the sample whole kind of circuits and that is where and that is because it can have a very large gate resistance and it is the drain to source resistance you can control with no by appropriately designed a device but there is for low voltage applications at least there is I mean the same job can also be done by MOSFETs these days. If you are shown in N channel then region you are shown as a neutral whereas when I talking about N type so there is a majority carouser electrons. So, you can say that the number of electrons are more than number of holes it is correct or. Number of electrons is of course more than number of holes in the neutral region the light blue region that we showed in the slides the it is N type region right. So, N d of the order of 10 raise to 15 or 10 raise to 16 or 10 raise to 17 whatever. So, and the electron density is roughly the same as the doping density that is the if the doping density is 10 raise to 16 the electron density is also 10 raise to 16 and the. So, the hole density will be much much smaller than that because N times p will be about N i square. So, if N i square is like 10 raise to 20 so if your electron density is 10 raise to 16 the hole density will be 10 raise to 4 much much much smaller that is why you do not even do not even need to talk about it. Does that answer your question over. Hello sir yeah when I talking about P N junction you are using the term barrier potential or cut-in voltage, but you are using here built-in potential. So, as far as my knowledge is concerned when I am going for built-in potential term so you are talking about the work function difference whereas you are in P N junction using the you are using the term built-in potential. Can I use this out. Over. Okay well built-in potential and the cut-in potentials are two entirely different things. What is the cut-in potential if you plot i versus v for a diode you get something like this and of course the current in the reverse direction is very very small and if you well actually is steeper than that and if you extrapolate this, this is called the cut-in voltage or the turn-on voltage. Now the built-in voltage that I talked about is completely different than this. So, if you are familiar with the P N junction diagram let us just take a P N junction in equilibrium you have the P type region here the N type region here this is the boundary between the two. Rosa Sharma must have done this yesterday then you have the potential varying something like this depending of course on the doping densities this is flat right. The built-in potential is basically the difference in potential between these two this is called built-in potential okay. Now this is the situation in a P N junction even if you do not have a reverse bias right and so and this built-in potential is necessarily is responsible for a depletion region here W depletion. So, in a JFET even when you do not have a gate voltage applied or when your gate voltage is 0 you still have a depletion region and that is why we showed those little blue regions know after the P plus regions right. What happens in a JFET is you have this VBI and now you apply in addition a reverse bias what happens is this gets pulled down etcetera and this becomes your net potential dropper as a result of course lot of things will change this picture is not very clear the depletion region will also change the depletion region will expand and many things like that will happen. In a P plus N junction what happens is that this part of the depletion region is negligible compared to that one because if you look at W depletion on the P side to W depletion on the N side you get something like ND sorry ND over NA and if you are NA in a P plus N junction is much larger than NA ND and it is like 0. So, therefore in the JFET figure we are not even bothered about this particular part you know on the P plus side we are only worried about the N side ok is that clear. So, there are cut in voltage is something that comes into picture when the device turns on the PN junction in a JFET we are we are not allowing that to happen at all because we are never going to forward bias the gate to source junction we are always going to operate that under reverse bias. So, this actually not relevant this is what is relevant ok. Sir while showing the quality for the built-in potential it depends upon the it depends upon the work function difference. So, it is like this let us say P having let us say 4 work function and let us say N type having let us say 8. So, shall I give the quality why due to the N side who is having work function if one function more than the P side or. In a P plus N junction we actually do not talk about the work function work function we talk about for a metal semiconductor junction not in a P plus N junction. So, let me just draw a realistic band diagram for a P plus N junction. So, if you have voltage of 0 volts this is what it looks like. So, there is almost no depletion region in the P region and the entire depletion region is on the N side ok. So, there is no question of any work function. So, this EC minus EF will depend on what is this doping density N A here ok. So, this what is the actual difference between these and that you can go down like this that is EC minus EF on the P side you come back like this then you come back like that and then you come back like this ok. So, that is the actual difference between this level and that level. And what is this EC minus EF here that again will depend on what is the doping density ok. So, of course the work function will be important if you are talking about a mesh fit where the gate is a metal. So, then the gate the work function of the metal will come into picture. In this case the work function is not really directly coming into coming into picture because these things are determined only by the doping density. So, let us take another. Mofokam college do you have any question? Over. In the different amplifier shown using JFETs you have used a pair of RGs RG1 and RG2. Can you explain the needs for these RGs? Over. I am not sure if I get that question. Let me see if I get your question correctly. Is your question about the source resistance and drain resistance like these? Over. Is your question about R S and R D? Yeah. I will repeat the question sir. In the different amplifier shown. Oh, in the different amplifier. In the different amplifier. Named as RG1, RG2. Okay. Can you explain the needs for using this pair of resistance? Okay. Yeah, well that is actually not really in the context of this particular topic is not very important. But I believe this may be for some protection purpose. I am not 100% sure. Okay. So, there is one question about what happens to, what happens at depletion region when breakdown occurs? Okay. There is a question about what happens to the depletion region when breakdown happens? So, let us look at that part. Alright. So, when breakdown happens, the P plus n junction, the depletion region is not insulating anymore but it actually will conduct large amounts. And as a result your IV characteristics, the current will basically shoot up and you would have seen that in data books and such. So, if you keep on increasing the drain voltage, the P plus n junction will keep getting more and more reverse biased. At some point what will happen is this junction will simply break down and then the current, the ID will start increasing dramatically. And of course you never want to operate in that particular region. It is not useful for amplifiers or any digital circuits. So, you always avoid that region. Then we find the number of electrons passing at one cross section for FET. Find the number of electrons passing at one cross section. Okay. Of course you can. It is very simple. Let us look at the cross section of the device. So, the number of electrons crossing a particular area. What is the electron density? So, this, the light blue area is the one that you are talking about. So, what is the number of, so you can take a small delta x here. Maybe I can just draw here. Okay. So, let us say this is your, this is that light blue region. This dimension is 2 times h. This dimension is z. Your device actually is like this in that direction. So, what is the number of electrons crossing this? Let us say per unit time. So, let us take a small slice here with a finite thickness delta x. Now, in this particular area at a given time, what is the number of electrons that we have? The number of electrons here is the volume 2 times h times z times delta x multiplied by the electron density. The electron density over here throughout this area is equal to the doping density because that region is a neutral region. So, that is the number of electrons that are in this area at a given time t. Now, we would like to know in how much time will all of these electrons leave this particular region. So, let us calculate that delta t. So, what is delta t equal to? Delta t is equal to the distance divided by velocity. What is the distance? What is the distance is delta x and what is the velocity? Mu n times the electric field. I am just talking about the magnitude not the science. So, these many electrons in this volume leave this particular region in that much time. So, per unit time if you want to know, you need to just divide that by delta t. The unknown here is dv dx and for that you need to actually solve the device equations inside the device and that one can do by numerical solution, not analytically. There are some other questions, but the time is up. All right. So, if your question has not been answered, you are free to send it again on Moodle and I will try to get back to you. Thanks for your attention and I will see you tomorrow again.