 Hello friends, I am Ajit Gundale, Assistant Professor, Electronics Department, Vachin Institute, Solapur. In this video lecture, we are going to just focus on the field effect on this term. Friends, these are learning outcomes. At the end of this video, you should be able to describe the types of JFET, then describe how we construct the JFET and you are also able to describe the working of the JFET. Friends, the field effect transistor shorty called as a FET. It is a type of transistor which uses the field, electrical field to control the flow of current. Friends, I think you are quite familiar now with the BJT which is called as a bipolar junction transistor. In that transistor, we are going to use the base current to control the current in the collector which is called as an output current. So, in that case, we use a current quantity to control the output current. Whereas, in the case of FET, we use the electrical field which is created on the input terminal by the voltage we apply on the input terminal. So friends, that's why the name is coming as the field effect transistor. Friend FET has three terminals in all. One is called the source, other is a drain and last is the gate. Friend in this FET, the current is carried only because of or by a single type of current carrier. It is either whole or the current and that's why this FET is normally called as a unipolar transistor. Friend before I go for this actual construction, let us try to classify this FET. So FET are going to be classified into groups basically when it is called the junction FET shorty called JFET and the second is the MOSFET is called metal oxide semiconductor FETs. Now, below this JFET, we get two more classes when it is called N-channel, other called the P-channel. Below this MOSFET, we get two more subtypes, one is called depletion type, other called as an enhancement type of the MOSFETs. Now again friend, below these all categories, we can get two subtypes, one is called N-channel other called the P-channel. Now these subtypes are because of the type of material we use to construct this FET and the type of current carriers we have in the given device. And the JFETs are having two different types. So one is called the N-channel JFET, friend normally JFET is also simply called as a FET. So I will use a term called FET, which means it is nothing but the JFET. The first type is N-channel and second is called the P-channel. Let us see friend how we construct this transistor. Let us focus on this N-channel JFET. So friend we are going to manufacture this JFET. Since I talk about this N-channel, so for this case I will take a piece of semiconductor, which is normally called as a substrate and on this N-channel, sorry on this substrate we are going to dope some impurity of this N-type, so that this entire surface become N-type substrate here. And in this doping, we use a light doping of this N-type material. So friend when I use a word as a light doping here, it means that there are less number of charge carriers. So presently we talk about this N-type semiconductor substrate here. So here I talk about there are less number of electrons are available to carry current here. But I can say in other words this entire surface is providing me some sort of resistance to flow of current here. Then I am depositing two P-type material on these two other sides of the substrate here. So normally the doping we use here for this P-type is somewhat heavier as compared with this N-type doping here. Friend internally I am just going to join these two terminals together by a wire and this combined part here is not brought on the device on the surface as a gate terminal. So friend joining these two different areas or by this two P-type regions by wire is normally called a metallization process here. And I also bring one terminal from the top of this substrate here which is called as the drain and one is at the bottom which is called the source. So friend as I said earlier this feed is having three terminals and it is nothing but its manufacturing process here. Now just going deep now, so when we create this PN junction we are always going to find some depletion layer around the PN junction here. So friend in this diagram you are seeing that there is an appearance of depletion layer and you also see there is a narrow portion which is not leaving or lived here in this substrate and this is normally called as N-channel. So friend this N-channel word is because of this entire substrate is doped with this N-type material. Friend these are the symbols for this two different type of feeds here what is called N-channel or they are called as a P-channel here. So this arrow is indicating that the flow of current from gate to source junction when that is forward biased here okay. So we know in the case of N-channel JFET here the gate is made of P-type material and we use N-channel to construct this FET here so that is why the arrow is now entering in the device that is entering in the channel there. Friend as I said earlier here as I use a light doping in the channel manufacturing so that surface is offering me some resistance here and as I said earlier we are having three different terminals are available on the devices namely drain source and the gate. Friend again I say that during manufacturing as doping is light in this N-type material so I am going to have some resistance from the given surface here okay and normally we apply some voltage for this JFET during working so I am going to make this drain more positive as compared with the source and the voltage from gate to source is now given so that that given junction is made as the reverse biased junction there okay. So friend here I use a formula here that is R equal to rule by and this formula says that resistance offered by this entire substrate that depends upon this area of conduction there. Now friend if I use this light to show what is the effect of this which is on the flow of current here so I can see here so here diagram shows that gate is made reverse as compared with the source here. So this already a depletion layer is appearing across PN junction there and this negative voltage at the gate is again going to increase the width of depletion layer. Friend I can show this change here by this simple diagram here you are seeing that as we increase the voltage on a gate the effective channel width is now get decreased here. I can show this simply by this simple diagram here. So friend I will represent this entire substrate by the resistance here and through which now apply this voltage from drain to source and this battery forces some current to flow in the given resistance that is across a channel I can see here. Now we know friend here if I take a voltage at the top of resistance here you see that this voltage will be higher as compared with the lower part in resistance here. So as example I am showing that the voltage is having 5 volts at the top then 4 volts then 3 volts and so on here. So friend this voltage will provide me some reverse bias between P and N junction between gate and the source here. So friend I am just trying to show that thing here so that the current which is flowing in this channel is going to provide me the various variable reverse bias between the P type gate and the N type substrate here. So friend you see that the width of depletion layer is somewhat larger at the top here and as I go on the bottom side the width is coming narrow over here. So again when I suppose friend if I apply some reverse bias voltage from gate to source here which is a conventional battery we use the width of this depletion layer again goes larger or I can say deeper deep in the channel here and so that the resistance offered from a device will become more here. So friend as we know here if I increase the reverse voltage from gate to source here we found that the width of channel which is available for the conduction is gate decreased here and so that as we decrease the area of conduction for the current here and we know that the device is offering me some high resistance and so that the current from this drain to source gate decreased here. So I can represent this current ID which is now inversely proportional to the voltage between gate and the source. So friend if we increase the voltage from gate to source we see that the current ID is gate decreased here and this is a basic principle of working of the JFET friends here. Friend these are my references I hope that this video is helping you to understand the basic working of the JFET. Thank you for listening this video.