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Published on Jan 30, 2017
Low Dropout Regulators Pavan Hanumolu, University of Illinois, Urbana-Champaign
This tutorial presents the design, analysis, and practical circuit implementation of low dropout regulators (LDOs). We begin with a review of traditional LDO regulator topologies and evaluate their key performance metrics such as dropout voltage, power supply rejection ratio, load and line regulation accuracy, settling time in the presence of load step, current efficiency, and stability. Following this, we describe alternate LDO architectures and illustrate how one can tradeoff some of the aforementioned performance metrics. We conclude with case study of a few state-of-the-art high performance LDOs.
Pavan Hanumolu is currently an Associate Professor in the Department of Electrical and Computer Engineering at the University of Illinois, Urbana-Champaign. He received the Ph.D. degree from the School of Electrical Engineering and Computer Science at Oregon State University, in 2006, where he subsequently served as a faculty member till 2013. Dr. Hanumolu’s research interests are in energy-efficient integrated circuit implementation of analog and digital signal processing, sensor interfaces, wireline communication systems, and power conversion.