 last time about the frequency response and we have gone through a typical circuit of MOS amplifier and we have found out that if I use full analysis of Kirchhoff law that is node analysis then I can find both poles and zeroes same time. But many of times as I said zero is normally far away from the gain bandwidth product that is unity gain bandwidth so it may not be very important and therefore one may say we may only poles and if those are the only poles one among them may be earlier than the other and the one which appears earlier that is at lower frequency is called the bandwidth point or essentially the point which is the dominant pole okay that is what we discussed last time well of course there are many amplifiers you can go into the book you can look into the book common source a common drain common gate common emitter and all sorts of amplifiers please look into them we have given a theory how to solve any such circuit can always be solved using the standard procedures. I will just give another method which is a very popular method in engineers which is we discussed in some way earlier but little more detail circuit I may show you today is called zero value time constant analysis to find dominant pole. So we can actually find out dominant pole with no great difficulty we can just do some analysis and we say okay here is the bandwidth because we are not interested in gain bandwidth unity gain with point but we are more interested the bandwidth where the gain starts falling okay and that point is the dominant so our assumption is the other pole is at least away maybe one order by frequency or even two orders if it is two orders it is 40 db below so in a way that gain has no value even if it is 10 times it is even 20 db down which is large enough in fact so essentially what we are saying that we will be very keen to know which is the dominant pole and our assumption to start with is that the dominant pole will exist okay in reality if you do not want to agree with this then you do full analysis and we will get all poles and zeroes wherever you wish and you can find out which is the dominant which is the most correct and what absolutely proper method but as I keep saying not every proper method has to be used every time because there is sometimes short of time of doing analysis there is a quickness to give results products have to be released and on basis of experience people know this will have a dominant pole okay so I am not saying this method is always valid depends on the values of GMRs and everything given it may not be the dominant which we think but assuming there is I have taken an example which is intentionally multi stage amplifier that is it is a cascaded two stages of mass amplifier there is a first stage and there is another stage what I am not shown here essentially is the DC biasing part in this okay that may exist RG may exist and supply has to be RG1 RG2 kind but right now only AC equivalent circuits have been AC circuit has been shown we also neglect CC1 CC2 and CS bypass RE by bypass RS circuit so there is why we are neglecting that because right now we assume that they do they are not the part of the external circuit this is simple analysis to show how to get it in real life there may be CC1 here there may be CC2 here everywhere things will appear as they should okay so if I have this circuit look at it the first circuit can be represented by equivalently on this Vain series resistance maybe I call it signal if you wish I do not know where but I call it but our signal then there is a CGS1 CGD1 then this current source at the output GMB1 B1 is the voltage here which is VG SS actually something that is RL1 and RL1 which is the load provided to you then there is a drain to bulk voltage CDB and this is this point so this is my V2 somewhere here we will be my view okay so V2 is now going to be the input of the next stage okay so this is my input there is a CGS2 which is for the gate to source capacitance of the second stage CGD2 which is the gate to drain would say capacitance between this V2 and the output then there is the equivalent current source which is GM2 V2 sorry GM2 V2 and shunted by RO2 RL2 and CDB2 this is one equivalent this is the other equivalent this is one this is other two stage what is the advantage of two stage amplifier per say why should we use two stages let us say I want to gain of 100 so one possibility is that I will make gain of 101 single amplifier the other possibility is I may do 10 10 or 25 kind of thing maybe 5 20 or 25 also is a decision I will leave it to you to find out if you cannot next time I will tell you if you have a cascaded stages there is a method in which first stage gain should be higher or lower than the second stage it should not be equal that is definite whether the first stage should have a higher gain than the next stage or vice versa on what basis we decide that product is 100 okay I can make 10 10 5 10 5 20 25 33 kind of thing many combinations I can try 4 25 25 4 so how do I make a choice that the first stage should have a higher gain compared to second or first stage should have much lower gain compared to the second stage this is something which you must find I do not think every book would have given but I think said as Smith has discussed is somewhere find it out if not I will tell you what why we choose one over the other okay so is this equivalent circuit clear this is the first stage equivalent circuit this much and this is the second stage equivalent circuit which is given for this what is being missed here CC 1 CS and CC 2 and we shall separately handle them because we figured out those capacitance values are very high and therefore they will actually act like a short circuit at high frequencies okay we are looking for a dominant pole ahead so we are expecting that these will be short circuited at most those frequencies however at lower frequencies they may dominate and we look into them where what they do when they are present okay so this is that clear what I am trying to do is to solve a two stage amplifier mass amplifier and my assumption I repeat CC 1 CC 2 CS everything is much smaller and therefore neglected at high frequency and also RS is bypassed at that frequency because CS will be short circuited so the bias resistance in the source also will get bypassed at high frequencies so nowhere that RS is taken care though in real DC there will be a RS sitting there is that clear centered by CS okay but at high frequency RS will get shorted okay having said so I as I say this is an approximate method to estimate presence of a dominant pole and please do not believe that every time this is true but in most cases 99% is still meter you may try once a while may fail once a while our assumption again is there are no dominant zeros okay that means 0 does not exist prior to the dominant pole because if that occurs the gain will start rising somewhere so our assumption right now is 0 is far away so we say a dominant pole which is at the 3 dB point where the gain falls by 3 dB is our dominant pole P1 and again we assume that for the transfer function of the gain P1 should be less than P2 less than P3 if there are n poles what we are saying is dominant pole is P1 next may be P2 P3 and so on and so forth okay any transfer function of gain can be represented as numerator divided by denominator NS divided by GS and typically this actually it should come here a 0 plus a 1 s plus a 2 s a square NSN upon 1 plus B 1 s plus B 2 s a square B NSN this is first look at this then I explain this if there are no zeros in this as we discussed which are dominant the numerator part I just miss it I say they are none coming from the numerator what numerator will give me 0 and I say 0s are far away so I am not concerned about only a 0 term will remain but that is a DC value or that is a fixed value so that will go into the gain DC gain part itself okay is that correct this other terms I am neglecting a 1 s a 2 s a square as a why I neglect because my assumption is 0s are far away okay far away than the poles of my query okay is that okay this is my assumption okay and if their assumption the numerator is only a 0 for example so equivalently same in a normal gain voltage gain function it can be written as some DC gain divided by one mile which includes some P1 P2 value also in the product because that when you take it out that P1 P2 will also come outside okay is that here this s minus P1 is actually appearing so P1 is outside but right now I kept like this so everything constant is taken care in AB 0 so 1 minus s by P1 1 minus s by so on and so forth so our assumption is if there is a dominant pole which terms are also negligible in the denominator s square s cube s n terms will be negligible because we said s is first term will come from s and we said that is the dominant pole so we say the next terms are so if I expand let us say only first two terms it will be 1 plus s times s a square A1 s plus B1 s square so we say okay s square terms does not exist only the first term B1 s is only dominating term is that clear if I talk only this product let us say all others are much higher even with this 1 minus something 1 s term 1 s square terms okay so which means essentially what I am going to get is something like this 1 upon P1 plus P2 if I make product of this but this essentially I already said P1 is smaller than P2 so even I say okay I neglect this so I only say that the coefficient is essentially related to s by P1 only is that clear that is what I say the coefficient B1 here is nothing but sum of all such PR as if you take more than that and since eyes are only one here so it is one upon dominant pole is one upon P1 so how do we get this by only observation of this transfer function I realize that this terms can be neglected except a 0 here also other terms can be neglected so only term which will give me dominant pole will be related to be one and therefore that is how we can evaluate this is the trick I am going to use now how do I get this P value this is my next question first is we figured out that all that I have to calculate to get P1 I must somehow get P1 is related to what in normal case we are discussed P1 it is nothing but related to other than time constants so there are more than one capacitors which are coming into picture we must calculate was occurring due to all such capacitances and the loads associated with them okay and then some all of them one by like this okay and if I get that one upon time average which we are going to do I will get my poles here an example for that before we go this this is something which will discuss in feedback once again but just to give you the S function which you keep drawing everywhere it essentially has two parts it is a complex function sigma which is the real part and j omega is the imaginary part a plane which represent S sigma j omega is called S plane any function complex function can be represented on sigma j I think this is maths you must have done by now n times this is just to show you as the poles are real okay real then they are minus then they must lie on the left half plane sigma must be 0 for them but imaginary sorry j j omega term must be mad but only real values if they are only real poles available then all should lie on the left half plane and which is the dominant one which will occur earliest so P1 P2 P3 Pn poles will be shown here is that clear so let us say 0 can occur 0 can occur here maybe we will sit here and in that case it is on the right half plane and then system may become unstable as we shall see here so we will prefer 0 to occur somewhere here on the imaginary axis or even if possible it is on the left half plane even safer or it actually sits on the P1 is that correct I can do that I can actually adjust the value of this 0 or either here or here or anywhere so that this system becomes more stable and we will see this little bit little more detail when we come to stability any 0 or poles on the right half plane actually leads to instability what does that mean there the gain starts increasing and not decreasing is that correct and if increasing means it keeps increasing infinite means system will go to VDD power supply maximum voltage so it will start saturating out so it will not remain amplifier so we say it will become unstable is that clear so we want to see the system remains amplifier so what is the trick I am keep keep on telling you all the time that please remember amplifier is the only system in the analog circuit which is of relevance everything else is derivable from this okay all that we keep saying is if I know my amplifier design I know almost everything because all are only derived part out of it because the theory which I will use for amplifier design is as much required for oscillator designs or a2d convert to anything which I do later I this is good enough for me if I know my amplifier theory properly that is why I am spending so much of a time on this otherwise I would have actually said okay this you are done in 12th or maybe in first year but I want to make it very clear that why we are spending so much time on amplifiers because once we understand how do we get amplifier designs then we know roughly everything in analog okay so if I take an amplitude of a base it will be dominant pole for this will be a v01 and border plot is correct as long as Omega is less than P1 till that time gain is constant beyond we do not know whether dominant poles where they occur so what I am saying if I dominant this is my pole P1 up to this at least okay I know gain is constant from here onwards and then I do not access other poles may further start following it down minus 20 minus 20 further and further okay but I am interested in where it falls first okay which is called the bandwidth why it is called bandwidth the term bandwidth was given up to which gain is constant okay so that values of our interest okay can we tell her P1 as well yes I can as I said other day if I put a 0 here per say what will happen to their till the next which then will become dominant the gain may become but something else I have given by that and just check just we will see what happens in feedback with use the theory oh I nullified that but I lost something else okay I increase bandwidth definitely okay is that clear so something I must be losing in getting higher bandwidth okay so we will see what exactly we lost is that okay we will see that little later so is that issue clear so this plane has been shown to you that I must get my real plane real poles on the left half that is minus value they must occur so that the system is stable other way to be a growing system and we do not want system to grow outputs in the inadvertently okay so this part as I said this figure is just shown here we will come back this figure again okay so the method which I suggest which is called 0 value not I suggest is given in many other books and not I did not see very much in the mill our this book said us with book and therefore I thought I will write down for you okay in 0 value time constant as a what we see every capacitor see some equivalent register sees now that word sees is very important and then we say and if that resistance equivalent resistance is are you key the time constant associated is that capacitor is req time C is that correct so if you are as many capacitors you have find are equivalent for as seen by each of them now the analysis which we did is something interesting here our assumption here is superposition theorem is valid what does that mean that is the influence of each capacitor is independent which may not be in reality many times is that correct the capacitance with CGD may influence both all sides but our assumption is each capacitor is independently controlling outputs to input ratios and therefore if we can take independent influences of all capacitor and we add all of them as their time constants then we okay this is our assumption superposition theorem is what we are going to apply as what is that when superposition theorem is true when the system is linear then only superposition is possible and I repeat I did tell you once if not we check again why is equal to Mx plus C is a straight line okay so looks there will be linear this looks like a linear but it is not a linear system is that correct why is equal to Mx plus C is not a linear system but which is linear there why is equal to Mx is linear but why is equal to Mx plus C is not a linear system so do not think that if a straight line occurs it is a linear system okay what does superposition say if X change to 2 X Y should also become 2 Y okay and only then superposition is valid in this case so okay this is assumptions since we are making n assumption n plus 1 so if there are n capacitors we say tau 1 is R equivalent 1 C1 tau P is R equivalent C2 tau n is this and then we say the net tau is just some of all such cows then the dominant pole will be 1 upon tau average this is what we are going to say okay now let us see in our circuit which we just now put these are this how many capacitors you are seeing one is CGS 1 other is CGD 1 CDB CGS to CG do and CD there are six capacitances which are of relevance 1 2 3 1 2 3 okay so we like to see each capacitor sees how much equivalent resistor is that correct and if I get that equivalent resistant I get RC time constant for each of these capacitance and then I sum all those time constant and 1 upon tau is the dominant pole now why I am saying this may method the first day when I saw something a mass amplifier and I give your dominant pole expressions please verify whether the expression I get from here is same as what I got there okay and you will find to your great surprise is almost same if not exactly almost okay so let us see that almost same part is house almost so the first capacitance of interest is CGD 1 which one I talk CGD 1 I am talking of this this circuit CGD 1 okay is that okay this is V2 this is this so whenever I will do this analysis the first thing I will do is short all independent sources open the current source and short voltage source okay short all voltage sources independent please remember the word independent short all independent voltage sources are open all independent current sources if I do this okay then at the V1 I get only RS please look at that circuit since V1 is 0 so only RS remains this is the voltage V1 okay then there is a CGD 1 a capacitance here at the output GM V1 plus RL dash and now we assume that the next stage is right now removed as if equivalently that is equivalent input for that is short removed from this okay so we say the output is V1 which is RL1 dash is RL1 plus RZ parallel if you are as high as you can say RL dash is RL1 that is fair enough now the condition which I am going to say replace this capacitor by a current source I replace this capacitor by a current source I is that correct and we say the drop across the capacitor is plus minus V is that clear V across the capacitor the voltage is V plus minus is that okay then we say the resistance seen by the capacitor is V by I is that clear method I repeat replace the capacitors by voltage we calling this call as V plus plus minus V and a current source of I connecting that is that correct so what is the is that every capacitor I will replace it by current source V and drop that across is V is that clear this is what the 0 time constant analysis is what we are going to do okay I shorted V in I replace the capacitors by equivalent current source I which gives you a drop of V then the V by I is nothing but the resistance seen by the capacitance okay now if that is so yes why we removed the we say now that is unmoded cities okay because we are doing superposition we only take care of individual efforts the other capacitance I short out okay so the other loads as if are not no output input is going to the output side equivalently same okay that is what we did okay there is a assumption is superposition theorem is valid in what cases and why we can sum up each component time constants has nothing to be time constant per C any function can be such way added and average can be taken this is a theory mass theory we just have applied it to our case to get equivalent values of that okay it is a functional system I am just applying it to a circuit system okay is that okay now if I do this you see keep seeing a circuit what is the drop across RS V1 what is the drop across RS V1 so I times RS is V1 okay if you look at please look at this circuit if I do not know whether you can get okay so the drop across RS is V1 RS is the drop which is V1 but if you see the other side this is I-GM V1 remember I is in this direction so the current passing in RL dash is – I and – GM both are currents opposite please remember this is the actual current direction to get V01 is that correct how do I get a little drop or this is the current side but actual currents are both opposite sign so – I – GM V1 into RL and dash is nothing but V0 one or call V2 yeah please ask current direction is in this direction I yeah like this so V1 is essentially – I – GM some of them actually with a – sign into RL dash is V01 how long that is resistance associated the V is how much voltage drop across capacity is how much V1 – V01 okay divided by I is the resistance is the resistance so if I substitute from here in this I will get – I1 the GM one I RS into RL – V0 and then take V0 by I is this V1 by is RS from here so I write V1 – V01 if you keep calling then our GDO one this is the name I give you CGD 01 is the capacitance the resistance seen by CGD one is RGDO one which is RS plus RL dash plus GM one RS RL one is that okay just some there is nothing just get the terms correct so how I got which which resistance I got resistance associated with CGD one I can do same analysis for every capacitor is that correct and if I do this I can get correspondingly are equivalents for each of them okay is that point clear I shown you one every time you must do that circuit draw that and see if there is no current source in GM term will go away from there okay okay so having shown this similarly if I say RGDO 02 is seen by CGD 2 then RGDO 02 will be RL1 dash why this RL1 dash is coming here what is that RL1 dash essentially equivalently the RS for the next stage okay so RL1 dash plus RL2 dash into GM2 RL1 dash RL2 dash so this is the resistance seen by CGD 2 that is second stage feedback capacitance CGD 2 okay it is identical stage is that correct the first stage and second thing is RS is replaced by RL1 dash because the RL1 dash acts like a source resistance for the next stage okay similarly then I can see RGSO1 is seen by CGS1 RGSO1 is how much is RGSO1 you can see in the circuit how much is this is seeing you shot this RS only resistance it will see is RS so I said okay if I that is so then RGSO1 is RS RGSO2 is RL1 dash which is the RS for the next stage how much is RDB1 RDB1 this capacitance is seeing parallel combination of RL1 and RL2 because the next stages are short all capacitance are removed so only resistance seen is this much okay RL parallel RL1 so if I do that this is RDBO1 is RL1 dash my same argument RDBO2 is RL2 dash as seen by CDB so have I now calculate equivalent resistance seen by all 6 capacitors is that okay so what is the method I am suggesting see for each of this only the case which will occur whenever the GM terms on the V other terms occur then you will get this longer expression otherwise only simple resistances will appear only in those cases you will get RL plus RS plus GM RL RS kind of number rest of the time it is straightforward okay so I calculate all equivalent resistances seen by capacitance so I can calculate 6 time constants is that clear RC RC RC for all of them is that okay so if I do that then IC RGSO1 is TGS1 TGS2 is RGSO2 CGS2 CGD1 RGDO1 CGD1 only thing this is long enough because you can say that is the only place where the value is large enough CGD2 is this CDB1 is this CDB2 is this and then by our assumption of zero value transfer function theory one can say average tau or some of the tau net tau is some of all this tau okay and the dominant pole is 1 upon tau okay so is this method clear to you to everyone what is the method I suggest take every capacitor find equivalent resistance seen by it take RCs of all of them some of that 1 upon tau is your own dominant okay now we will maybe not today next time I will give one problem and show you that you are you solve fully and you solve with this the values are very close to each other and therefore valid in the example I will take please see I repeat and detailing you the circuit solving which last time I showed putting all nodes all capacitance is all everything using neural equation is the ideal solutions is that clear nothing can go wrong in that because we are not missing any term anywhere okay so if you solve neural equation for fully equivalent circuit that is the ideal situation but many times I may I know that I am not interested in any other parameter than the bandwidth I can even resort to this technique and can get the solution faster is that clear like first time I showed you if you only use dominant poles then what is the problem we got 0 up can I say nickel yeah then we say meaning then how do I so in this assumption well that 0 is not relevant if that is relevant this theory still is not valid okay but in most cases it will happen that 0 will go beyond GBW that is gain bandwidth 0 1 DB gain bandwidth 1 DB frequency it will always go beyond that so in most cases unless of course you tell her for the other one change it this will not occur okay and therefore the solutions are normally okay but not necessarily every case it is correct okay so having shown you the tricks which we many of us play in actual designs so I am trying to keep saying you have that if you are only doing analysis do correct analysis why stop it is that correct I mean you have a circuit you draw equivalent solve it that if you are going through a spice it does not require any approximation let it put everything there now let it solve any difficult problem okay but if I had to solve numerical in someone say I do not know I say okay time constant roughly it now it may seconds and microseconds and nanoseconds or it not bandwidth so that is the way designers in the lab do or in the chip design we okay we say okay roughly I require this so should I put W by so much because this GM will help me okay and that is how I keep adjusting value when I because remember spice which is a excellent so circuit solver it requires input file from your side okay that may you like to give that inputs okay now if there are variations how many variations you will try 100,000 million so somewhere at least we have to start at least should be known to you okay even if you are going on a spice the first case has to be really really okay even if you are doing a full circuit analysis using spice okay so you otherwise what will happen you will get you will put some inputs and you will get some output which will always spice will always all that I gv it cannot stop you otherwise but what is the values of Gs and I Vs you are put it depends on you which currents it will show therefore how many things to be within control you should use is this techniques should that is why we keep telling you how I on a spice it is not arbitrary you have to decide how much otherwise many of my graduate student say oh sir a whole night I was working so what was he working he gave some wrong guesses whole night music Sundara spice to tell that I was cook up which current he is taking step by step and trying to solve it finally he said it is gave a correct solution after that 23 hours or 23 hours I work you did not do anything actually because you have finished to start with the wrong inputs and now you are just doing this repeatedly changing DX DX DX under it will come finally so you have to understand that even using a simulators you ought to be academically sound enough to do correct inputs otherwise the time convergence will never occur okay and therefore solutions will never seem so people always say sir I am a spy so we can always yeah you can do it and you will do it in 10 years but tomorrow I need the result so what do I do so these theories which we keep telling you the methods we are suggesting are even using spies you should know otherwise everything is doable now no it is not doable okay let us do something different before we quit this amplifier business frequency business last time we said in all so far analysis that this so-called coupling capacitor the shunting capacitor across others are neglected by us okay and we solved everything just for high frequency and all that high frequency they were all treated short circuits okay but at frequencies very low small enough their impedances are not infinite are shorts zeros or whatever it is they are effective then but at those frequencies the other capacitance may not be working CGD of omega is very low then that that impedance will be infinite so the capacitances which were very dominant at high frequency may not be dominant at lower frequency the capacitance which will have impedances dominating at lower frequency will be not dominating at higher frequency so this is the value system which allows us to separate the two if they are really close by then this may not be correct then we must take all of them together but this does not occur CC1 will be of the order of micro farads how much was CGD 1 and this value last time in the class I said puff so I am talking of the order of 10 to power 6 that is 6 order higher or lower values are chosen for the other two so these capacitance this very one 20 micro farad or 30 micro farads you are done this exam I think you must have already done in a lab how much the electrolyte capacitor you have to put across the RE or RS okay very high values okay this is also a small query which in the lab someone should ask why electrolyte capacitors cannot be the polarity cannot be changed okay by all other capacitors you can connect both ways okay but electrolyte capacitors need to be connected as given plus minus why what will happen of course there will rupture that I can try once it will burst also but why why those cup otherwise all capacitances are directionless I mean you can put this way or that way so why electrolyte capacitors be here little differently okay they are polarity dependent okay so most look the effect CC1 CS and CC2 and which capacitance are now I am neglecting CGS CGD and CD I said oh these are not relevant for me this is AC ground why did I put AC ground VDD for AC is ground so this is AC ground this is the AC equivalent I am showing you within transistor on this is my bias capacitance RG this is our signal this is CC1 this is RL this is RD and of course there is a RS I should show here okay now I feel out let us look at the only input side this side how much is VG it is a divided this voltage this impedance or resistance divided by the net impedance is that correct into V in is VG so VG is RG upon RG plus R signal plus impedance due to capacitance is that clear which is one upon SCC1 look at this part in RG1 parallel RG2 but that is same as equivalent RG because the other terminal will go to the AC ground RG once the second terminal is also going to the AC ground that is ground RG2 is also other terminal is going to the ground so both are in parallel anyway so they are equivalent okay so this VG is V in I can do little read just meant of the time that is what I say first multiplied by SSC1 cross this put SC1 above then RG as S1 outside as I did and read just the terms so I get RG upon RG plus R signal into S upon S plus 1 upon CC1 into RG plus R signal into same expressions can be converted into this expression what is this value DC because DC is 0 frequency do not say DC per say that is frequency independent term okay that is like AV0 kind equivalent DC this is S upon S plus Omega transfer function is given you high pass filter okay it is a transfer function for a high pass filter so right at the start CC1 is giving you high pass filter this has to be understood that this is giving so certain up to certain frequency it may not pass but beyond that frequency it will pass is that correct that means below this particular frequency the game may fall is the input may fall that is VG will be very small or negligible beyond that only full VG will be made available this is the trick we want to utilize okay please take it if you read the books it is not identical to what I say there but still you read book much more seriously because they give many more details than what I give okay but what I teach here is only that you know how they will look into it okay what I say essentially is I actually tell you something in between the lines okay and the book gives all the lines so do not miss lines or do not miss in between the lines okay so I am only complimenting what is given in the book I am not replicating what book is please remember I am not replicating all of it I am only telling you what is they mean meant by that clearly V0 by V in is a transfer function which is some constant to S upon S Omega 0 which is a transfer function for a high pass filter okay so a theory that I keep just say you have a subject essentially the board a plot make a set it not you have to how do you expect the board a plot to start if I plot as a game the guy I am a Omega okay so I am having what we are going to see now that each there are how many capacitances 3 this is our mid band game so the three capacitances must say for example something three pulse must appear due to three capacitances and each will actually give rise value 20 DB 40 DB and 60 DB to reach this mid band value is that clear to reach this mid band value and beyond this what will happen gain will become constant so this frequency is what let us say this the frequency of which mid band starts and this is our first pole so this is called FL this is called FH and what is the bandwidth really bandwidth is defined where gain is constant normally FL are very small compared to FH FL are very small compared to FH so FH many times we call the FH itself as the bandwidth is something like telling this is 1 megahertz and this is say 1 kilohertz so you subtract 1000 minus 1 999 kilohertz which is as much as 1 megahertz is that clear so many times we do not define bandwidth by FH minus FL we may say FH itself but if FL is not very small as we thought here let us say it is 10 kilo 100 kilohertz it is reducing substantially so I must understand what is the value of FL before my assumption that the bandwidth is only FH or otherwise calculate FL and subtract from FH independently numerically it may get subtracted or not is not your choice we just subtract numerically if it is very small it will not be worth 6 decimal or if it is equivalent will reduce number in first decimal okay so you have to understand that we must evaluate every time and numerically value sometime may not be worth actually subtracting okay but we must know what is the low value itself okay so where from this low value are coming therefore CC1 CC2 and CS these are the capacitance will be very high they will start dominating at low frequency is that clear so first thing we are really we want to now calculate the effect of CC1 CC2 CC this so CC1 that the upper pole the card I mean which is the pole for CC1 CC1 sorry this RS RG a sorry let me write again the first pole which I am seeing is RG plus R signal into CC1 a first pole I never like maybe we call it Omega P1 for the sake of it now we do not know whether Omega P1 is the first or second or third we will see values and we will accordingly say which one is 1 2 3 but right now we call 1 RQ for example this figure this is the value which we are talking as oh S is the numerically are essentially it says that at G as there is a 0 at 0 itself that means beyond that the game is rising anyway when S is 0 means that omega equal to 0 the 0 occurs what it tells that the 20 dB plus it should start at right right from the ahead but this other value my one is a pole which is also now increasing because of the S upon term which essentially you say you divide by this you are equal and value if you calculate it is still rising okay equivalent this is reducing but this is rising okay so average is still rising for you okay average is still rising that is why it is called high pass as you rise it is then at at S is equal to infinite it will become constant which is equal to this you can see what I am saying it is 1 plus Omega 0 by S if this becomes infinite or very high this will become constant okay no I am only saying that this is what transfer function of high pass filter is S upon S plus Omega the high pass filter okay we will do filters again and we will show you why it is high pass actually we will evaluate that value okay right now you are showing 1 upon S plus Omega 0 is a low pass filter S upon S plus Omega 0 is a high pass filter okay at lower frequencies RS is not bypass this fact has to be understood but at higher frequency RS is bypass so this in calculation of low frequency RS cannot be neglected because RS is used for DC RS is actually coming there is that correct this is only bypass when then frequencies are very high otherwise RS appears because this implements is not shorting RS this is finite the capacitance due to CS 1 upon Omega CS is comparable with RS so RS cannot be neglected but if one that is equivalent to 0 then we say RS is shorted is that clear so at low frequency RS must be considered at low frequency CS is not shorting at high frequency CS shorts and therefore RS shorts across I will be method okay if that so I just done for one of the capacitance rest you try yourself I take a case I say CC that is at the output side please look at the circuit again for this capacitance this is the RL and this is the RD input is shorted corresponding with these goals so we say CC to CS V1 minus V2 RD and RL so how much is R equivalent for that I just learn the maths V1 is I already V2 is minus I RL V2 minus V1 minus V2 by V by the RD plus RL so what is the equivalent resistance seen by CC to RD plus RL so power CC to is R CC to times CC to which will give me the set another pole which is 1 upon 2 pi RC to CC to I have done analysis for all three but I am showing you the final result try methods I have suggested then the poles occurring due to the CS capacitance shorting RS or across RS can be given as GM by CS so all the same method as I suggested GM by CS a GM can you think why it is coming please look at it this current is passing through RS we have done common source with a source resistance same method I am using this current is passing through so this voltage is this drop plus this drop and that is why that GM term is appearing okay please look back what we did earlier okay so the another point which I see due to CS is GM by CS okay how much will be CC one class you see one dekega same method say Bolo up to figure may Bolo KITNA HOGA RG plus R signal that is the only resistance it will see these methods are not so very common in the books of course you can go and now read the book either of four of them which are I gave they have little more rigorous or maybe they are putting some errors looked into the GM equivalent this finally what they will get is what I am getting without doing all that that is the way I do it is that fun clear you solve complete circuit everything comes you do not have to do any of my methods but I always show you plus something which is otherwise known to others okay if that is so last part we write okay this also is done finally if we see there are three points Omega P1 due to CC one Omega P2 due to CS and Omega P3 see this since we know roughly the values we figure out Omega P1 occurs here here Omega P2 occurs here Omega P3 occurs here this is the bode's plot you will say why it will be it can be omega 3 also whichever comes okay but by general knowledge of the values GM we use RGs we use our signal we use you can see why this is the lowest can you think because our function may come was up say lowest lagrapo RG is very high and so obviously that will come first okay then between the two also because the CC twos are very high okay this will actually come this law this it will come the last but anyway this may change once a while because GM value is decided by the current I bias okay and that may change some values but as of now because CS is even higher this will start down please remember CS is relatively very high shorting the RS the capacitance are 30 micro far 25 micro farads so GM by CS will be earlier than Omega P3 but if happens to be then call this Omega P3 and call Omega don't tell me sir up neither bolas any value job you but since I know CS are very high and of course are not as high as RGs therefore first will come this then it will come this and then it will this is 20 this is 40 this is 60 okay you are perfect is right essentially what we are saying that once you run is the second pulse picks over and then it also gives another 20 because it must decrease essentially what we say it's a poll means it will decrease 60 or 40 or 40 or 20 is that clear it's a minus 20 DB Paul Dera head to 60 per se chala the beast niche I a challenge who are fit all this nature the beast over is that okay and then it retails so what is FL here which value is FL omega P3 is 1 upon 2 pi FL is omega P3 so I got my lowest cutoff frequency which I can evaluate and say okay this is the FL FH how do I calculate by my dominant pole theory I get my FH and FH minus FL is the bandwidth please remember an amplifier which two parameters of interest to us the game and the bandwidth so we evaluated both of them okay what is the third one which is also worrying us please share but some are assuming stable phase is less than 180 perfect phase margin as it is called but what else there is another turn which is worrying us which we never so far calculated in every system that first we must calculate what is that power the most worrisome part in all of this at the end of the way we find it is the power dissipation which will limit okay everything okay that is a sentence which I said but I am going to you I do not know design in low power power amplifier when I say power amplifier I want higher power isn't it that is what I meant by power amplifier otherwise voltage amplifier normal yeah current so I say power then I said no you please design in low power power amplifier what do I mean what did I mean that the dissipation should be very low in the devices or the circuit but the delay of power to the load should be as high as possible is that correct so that is why it is called low power power amplifier because you need large power to be delivered but you do not want the circuit to dissipate larger power okay so sometimes this fun is made low power power amplifier so it is essentially meant this okay okay so this finishes all kinds of normal amplifiers single stage others which I have not done please read common source common gate common emitter emitter follower all of them are given in both method is identical to all of them the most important of all of these all these amplifiers are not really single-ended amplifiers okay which which amplifier we use maximum you already started working on it which amplifier chip you are using open so is the open is essentially different from all that we did yeah it is somewhere different but it follows much of the last which we discussed in single-ended amplifier so that amplifier open has three stages maybe end stages also we can do a typical open will have first block as we shall call defam differential amplifier okay then I will I will put it second stage we will say gain stage and finally the typical opium has three stages differential amplifier followed by a gain stage followed by a buffer stage okay so any opium you see you see only how do you see all of this you only say this of course this plus minus is relevant but is care of course there is a bias points they also show here plus VDD minus VSS this is your V in some way connected and this is your VO so open essentially contains a good opium at least should have around 22 transistors okay. So it is not a real simple looking things but individually if you see it is not very difficult so let us look from which stage I should start before I go for opium no defam first stage in the opium is defam so let us see defam the word defam essentially is called differential amplifier okay there is also word difference amplifier which is not same as differential amplifier please take it there is a word which will use called difference amplifier that is similar but not saved so do not this do not make same name difference amplifiers and differential amplifiers are different as far as their outputs are concerned the architecture may not be very different okay so please take this in your mind sometimes someone very casually uses so I thought I should explain there are two kinds of defam in the market opium from the market one using BJTs which ones you are using the numbers right now 741 which is mostly bipolar okay 7 more 741 C is a MOS device okay so either you can get MOS opium or MOS defam or you can get BJT defams all differential amplifiers have two inputs V in 1 and V in 2 okay then we define two different two signals for any difference differential amplifier one we call difference signal what we called is difference signal which is called V ID I stand for input D for difference is that correct V ID ID are subscripts V is the voltage ID so V ID means input difference voltage which is subtraction of the two inputs V in 1- V in 2 so what signs V ID can have V ID can have which signs both are one both because V in 1 can be larger than V in 2 or V in 2 can be larger than V in 1 if you define V in 1- V in 2 as V ID it can be either plus or minus is that okay plus minus V ID can be plus minus depending on which one is higher or lower okay we define another signal which is called common mode signal called VCM common mode okay which is nothing but the average of the two V in 1 plus V in 2 by 2 okay these are the two input signals will use in all our differential amplifier theory okay now first thing first why are we so keen about defam Abhitha all amplifiers we have seen we can have a gain of any stage by cascading or by cascading okay by cascode I can also fool people by not losing bandwidth but getting the gain higher so why I am interested in differential so here is some big advantage with differential amplifier gives over all single ended amplifiers major advantage of defam is it has a much higher immunity to environmental noise okay that means if the noise is please remember in a normal single ended amplifier at the input if noise comes what will happen at the output noise will also get amplified by the amplifier along with the signal so on pilot up to pass millivolt microphone or noise I have or bar may millivolt noise away okay so second stage my anit at the noisy noise become so if you use single ended amplifier noise cannot be eliminated of course I should not say that word because we do try that also but as of now we say normal common stage cascade or cascode stage noise is enhancing every gain stage because that also sees the same gain okay so defam has the biggest advantage that it eliminates so called this noise okay that is what we are looking for why we are looking for reduction in noise because we want signal to be amplified and not noise what is the term we use for this signal to be amplified higher than the noise then what is the ratio we look for signal to noise ratio so what we are really looking for any amplifier is large signal to noise ratio SNR as we call SNR signal to noise ratio okay so all amplifier should show higher signal to noise ratio single ended amplifiers do not do that okay because the SNRs are maintained the same noise also get enhanced I want to improve SNR okay so how do I do is the differential amplifier improves SNR that is what it is all for okay it also allows you higher voltage swings than the signal by what do you mean by higher voltage swing as a larger signals larger swing of signals what happens in a single ended amplifier what will happen if the input signal is very high we kept saying our day one small signal small signal if signal is higher what will happen saturation means harmonics will start coming other frequency component will also come it will start saturated come back to single ended this can be a larger swings okay that is the trick of the trade okay actually we are large in here it got a better as I have to go to the other side of pooling but hey but there is only one disadvantage how many transistors single ended will require one transistor okay here the minimum requirement is three transistors are more as I say I say total number of devices required on a opama 22 minimum okay so I will accept so there is an additional area of penalty on the chip if you are making a chip of analog block otherwise defam is very good very good and its difference gain as we shall see is extremely high how much anyone typically difference amplifier a differential amplifier has a large open circuit gain is very high 10 to power 4 or 10 to power 5 how much is normal gain of an amplifier 10 20 100000 maximum 600 700 I can go to 10 to power 5 okay that is the biggest advantage defam will provide very large gains it can create in open circuit system we will see what that word means I have two single-ended amplifiers M1 related to this M2 related to this is that clear I have two single-ended amplifiers had a common power supply voltage drains are common the only thing is now I am saying I am substituting inputs V in one and V into to the two amplifiers and I am picking up to output voltage V o1 and V o2 but what I am going to do if individually this amplifier I had to solve I can solve individually if I had to solve I can solve but what I will be interested in what is V in 1-V into amplification to V o1-V o2 ratio what I am looking for output difference V1-V o2 is the output difference divided by input V in 1-V what is that value that is where the difference amplifier is differential is that correct is that point clear the difference of input and difference of output okay I can also say one of the output divided by difference input that also I can look at is that clear that is V o2 divided by V in 1-V into or V o1 divided by V in 1-V into also can be of interest this devices are these are called single-ended outputs when only one of the output is of interest to us both will be present but only one is of interest to us so we will see both of them if I do this and these are then I had to independent biasing for both of them is that clear because these are two amplifiers I require bias for both of them let us say I put a current source here current source here so I need two current sources to bias independently and I may not be identical anytime is that clear so I said okay why not I join the source of the two transistor and connect the commons current source is that what clear to you here if I put out I will require one current source here one current source here okay they may not be identical in many cases may be identical but but I need two source so what I did I merge them and put one common source common current source okay what is current source doing the biasing the two transistors is that clear biasing the two and where should they get biased what is the state of these two transistor should be all the time saturation they must remain in such if they come out of saturation they will not amplify this will go to linear modes then okay or cut off modes so they must remain in saturation that is our condition for amplification right now they can be different but in most cases if you are in a single silicon chip RD1 it must be will be equal to RD2 in so if you go in the lab you pick up these two separate amplifier and connect they mean these two may not be identical even if you let us say you chose a 47 kilo ohms resistor to 47 kilo ohm resistor do not have 47 kilo ohm exact values some may have 47.15 some may have 47 46.9 they were marked as 47 key so I do and may not be identical to externally if you put two devices they may but if I make on a single chip small area I can more likely say RDS will be equal so is that point now getting clear to you why sing opams are not made by making simple separate MOS transistors and hooked up on a board is that point clear to you because nothing can be then make gap and one cannot be same as M2 in a two separate transfer you buy okay M2 or M1 they can never be identical VT same me over the size is same me okay GM same me I got but on a single chip with is one less than 10 micron area micron square area I can almost ensure that both transistor identical both are same threshold the resistance values are same so all the time such circuits will be always integrated circuits and not discrete circuits is that clear because discrete circuit will lose all its advantage okay so all all opams will be always ICs and not made though there is an experiment I have set up 990s I think it continued for a while I do not know now I purchase some MOS arrays okay that means on a single chip more than one transistors maybe each has available so is doing to you use those errors and then create because since on a single area all those transfer remain they will have almost identical properties so there is a MOS arrays through which you can try making an opam on at least the fan in your lab when you say it may come closer to what you are looking for no guarantee that still it will be a good but at least it will come closer to this where on a single chip everything is acceptable RDS will be same these two transfer will be identical okay how much non-ideality ID non-identical term you can tolerate is another this call variability issue some other time we will discuss that we already also is an issue but not here if I see its input output characteristics why are we are interested in doing all this if our plan Vn1- that is V difference versus V out which is V2- V1 is shown here but individually if I plot V out to and V1 I figure out the V out one will follow this curve and V out to follow with this curve and somewhere here both will cross halfway this is very important point V out one I say I got a person which a minus that jagger come value may jagger or aim will tower jagger what does that means M1 M2R complimentary at over there the do so I need to add that this is the trick which defam is playing is that correct because I connected their sources and I am now applying V in 1 V in 2 change in V in 1 V2 will switch over which transistor will start conducting okay and because of that I will get and because if I subtract V out 1- V out to and plot V ID the typical curve will be like this what is this range should be called this is the linear range that is the plus minus V ID this is the only plus minus V ID acceptable for defam for which gain is linear what will happen to here it is constant okay constant means what 0 gain or high gain 0 gain no change in output but change in input so gains are 0 so only in this range defam will operate is that correct because gain is changing DV by DVN is changing is that correct here it is 0 here it is 0 so this is essentially that okay this word is very important this is called input range okay up to which defam will operate we will show you this later if before I quit last minute I just said in defam the noise is eliminated that is what I said you you can see V in 1 and V in 2 will have same noise because they are close by same area so signal whatever noise appears here will also appear here is that clear and now we will see noise does not come because the source noise come from the environment is that clear noise come from the systems a m I will be interference say those are resistances you can cable that I was a was up to the same okay so generally the environmental noises are identical in a small area if you say this area why even there the noise my voice is noisy let us say and you are shout not shouting so your noise is 0 there so it is a differential but in tip the noise will be almost same for both okay it is like over reading whatever is true it will over read on both side both inputs okay and then the game which I am looking which we say V in 1 plus V in 2 by 2 and if the noise is same what is the common mode value will be same as one of the noise and the output will become 0 as what I am going to say what will happen noise will get eliminated at the output this is exactly what I am looking in a defam that common mode signals should not get amplification but different signal should get amplified so common means which ones noise is common so they that will get eliminated signals are different voltages they will get amplified therefore a defam has advantage that it improves the gain of a different signal but actually removes the common mode signals is that clear that is the advantage of differential amplifiers see them