Tech Talk: Power Signoff

SperlingMediaGroup
751
913 views

Transcript

The interactive transcript could not be loaded.
Rating is available when the video has been rented.
This feature is not available right now. Please try again later.
Published on May 12, 2016

Ansys' Aveek Sarkar talks with Semiconductor Engineering about the challenges of power signoff at advanced process nodes, the impact of over-design, and what's necessary for sufficient coverage.

When autoplay is enabled, a suggested video will automatically play next.

Up next

to add this to Watch Later

Add to