 Welcome myself, Giridhar Jain, Assistant Professor in Electronics and Telecommunication Engineering, Valchin Institute of Technology, Solapur. So today, I am going to conduct a lecture on Common Source Mosfet Amplifier. Now learning outcomes of the session are, at the end of the session, students will be able to draw the circuit of common source mosfet amplifier using emosfet and design biasing circuit for this amplifier, contents, circuit diagram of common source mosfet amplifier and design of biasing circuit. So figure shows the circuit for common source amplifier using n channel emosfet as shown in figure. So drain source gate. So from the gate resistance R1 and R2, resistance R1 goes to VDD and R2 goes to ground and from the drain resistance Rd connected to VDD and from source resistance Rs connected to the ground. So in the circuit resistance R1, R2 and Rs will act as biasing resistance, Rd is load and this Rl is the actual load and C1 and C2 are the coupling capacitors which will block the DC and pass the AC. Fee in is the input and fee out is the output which is connected to the external load Rl. Supply voltage is Fee DD. On the right hand side you can see the DC load line and the transfer curve ID versus Fee GS. And the operating point is the point of intersection of this transfer curve and the load line because the drain current flowing through Rd and the drain current flowing through the mosfet are same because these are resistances and the mosfet are connected in series. And therefore the operating point is point of intersection of this load line and the transfer curve as shown in figure. So operating point is Q. So at this operating point Fee GS is Fee GS Q and this is ID Q. So applying KVL to the circuit we can write Fee DD equal to IDRD plus Fee GS plus IDRS because the current flowing through RS is ID. So this can be simplified further to ID in the bracket RD plus RS in terms of IDR combined together plus Fee DS. And from this we can write down RD plus RS is equal to Fee DD minus Fee DS up by ID. Then from this equation we can write the expression for the RD. So RD equal to Fee DD minus Fee DD that is voltage at drain. So that will be voltage across RD divided by ID and the RS equal to voltage at the source divided by drain current ID. So at the mosfet gate, so voltage between gate and source can be written as Fee GS is equal to voltage at gate minus voltage at source. So voltage at source is IS RS and the IS is ID. Now voltage at gate is obtained by the potential divider. So let us go back to the circuit. So for the circuit, voltage at gate is obtained. So here resistance R1 and R2 will act as a potential divider between Fee DD and the ground and therefore DC voltage at the gate is R2 upon R1 plus R2 into Fee DD. So this is voltage at the gate. So voltage at gate is Fee DD R2 upon R1 plus R2. So here note that this voltage divider equation only determine the ratio of the two bias resistance R1 and R2. So the desirable to make the values of these two resistance large so that the power loss across the resistance is small. Now mosfet amplifier design example. So and common source mosfet amplifier is to be constructed using N channel E mosfet which has a conduction parameter of 50 milliampere per whole square and the threshold voltage of 2 whole. If the supply voltage is 15 whole and the load resistance is 470 ohm, calculate the values of resistance required to bias the mosfet amplifier at one third Fee DD. So draw the circuit diagram values given are Fee DD equal to plus 15 whole Fee TH 2 whole and K equal to 50 milliampere per whole square and Rd given is 470 ohm. So drain current. So voltage at drain is taken Fee DD by 2. So 15 by 2 that is 7.5 volt then drain current is given by VD by Rd. So 7.5 divided by 470 ohm is the Rd given and from that we calculate drain current as a 16 milliampere. Now gate to source voltage. So Id is given by K in the bracket Fee GS minus Fee TH square and K is given. So if we solve this equation so Fee GS is equal to square root of Id by K plus Fee TH substitute the values. So Id is 16 milliampere and K is 0.05 square root of that plus Fee TH is 2 whole. So if we solve we get Fee GS is 2.6 whole then Fee G is given as one third of Fee DD. So Fee DD is 15 by 3 so that is 5 volt and voltage at gate is Fee GS plus Fee G and from this we obtain Fee S voltage at source is Fee G minus Fee GS. So Fee G is 5 minus Fee GS is 2.6 whole therefore Fee S is 2.4 whole. Thus applying KVL across the MOSFET the drain source voltage VDS is given by. So here Fee DD apply KVL Fee DD is Fee D plus Fee DS plus Fee S 15 volt therefore Fee DS. Now Fee DS is by substituting the values in the equation Fee DD minus Fee D minus Fee S so we will get 5.1 volt that is Fee DS. And source resistance Rd is Fee S by ID so Fee S is 2.4 divided by ID is 16 milliampere. So if we solve we get RS equal to 150 ohm. Now Fee G is given by the equation R2 upon R1 plus R2 into V DD. So here 15 and it is one third. So Fee G we obtain as a 5 volt and here ratio of R2 upon R1 plus R2 is one third. Now pause this video and think on the following question. So how to select the values of R1 and R2? So for selecting the values of R1 and R2 so R1 and R2 should not be selected too low and too high. So select R1 is equal to 200 kilo ohm therefore R2 comes to be 100 k. So that R2 upon R1 plus R2 will become 1 by 3 and R in is R1 parallel R2. So R1 is 200 k and R2 is 100 k. So parallel combination comes 67 kilo ohm that is the input resistance of amplifier. Then for calculating the values of C1 and C2 let us select the lower cutoff frequency as 20 hertz. So that is given by 1 upon 2 pi R in into C. So substitute the values and from this we calculate C is equal to 1 upon 2 pi 20 into 67 k that is 0.12 micro farad. That is value of C1 and C2. So this is the complete circuit which shows R1, R2, Rd, RS all the component values. So in this way we complete the design of this common source amplifier using E MOSFET. So we have designed all the biasing resistors and the coupling capacitor C1 and C2. So these are the references. So thank you for watching the video.