 Hello everyone welcome to this session of flip-flop design or flip-flop conversion. In the today's session we are going to design an arbitrary flip-flop that is PN flip-flop using JQ flip-flop. So at the end of this session you will be understand or discuss the operation of an arbitrary PN flip-flop, discuss the general model used for the flip-flop conversion and you will be able to design arbitrary any arbitrary flip-flop using any other flip-flops. So let us understand the operation of an arbitrary PN flip-flop. A PN flip-flop has four operations clear to zero, no change, complement and set to one when inputs P and N are 00, 01, 10 and 11 respectively. So using this statement you can derive the function table of the PN flip-flop. So the function table consists of input columns and output columns. So input columns you will see here are the clock P and N inputs. On the output side you will see next state values that is Qt plus 1 and Qt plus 1 bar. So for 00 next state is zero that is clear to zero. For 01 next state is no change that is previous state will be preserved. For 10 next state is the complement of the previous state that is complement and for 11 next state is one that is set to one otherwise the output will be remain preserved. So using the problem statement you can derive this function table and the function table is always helpful for deriving the characteristic table of the PN flip-flop. On the left hand side you will see the two symbols. First one is the positive trigger PN flip-flop, second is the negative trigger PN flip-flop. Now let us revisit the general model for the flip-flop conversion. Please pause the video and draw the general model which we are using for the flip-flop conversion. So here you will see the next state combinational logic accepts the external inputs and the present state of the given flip-flop. So again here we are using a JK flip-flop negative trigger JK flip-flop. So excitation inputs must be applied to the given flip-flop to obtain the definite next state defined by the specifications of the problem PN flip-flop which we are going to design inherits the triggering mechanism of the given flip-flop. So here we are actually designing a negative way triggered PN flip-flop with the help of negative way triggered JK flip-flop. So let us modify the general model for the flip-flop conversion as per the specifications. So here the next state logic accepts the inputs P and N along with the present state of the given flip-flop that is JK flip-flop. And the next state logic here generates the excitation inputs required for the given flip-flops. Let us derive the conversion table which is also called as the state synthesis table from the characteristic table of a PN flip-flop. So you can pause here and please derive the characteristic table of a PN flip-flop using the function table of the PN flip-flop which we have learned in the previous slides. So this conversion table is derived from the characteristic table of a PN flip-flop and the excitation table of a JK flip-flop. So this is the PN flip-flop characteristic table which we have derived from the function table of a PN flip-flop. So for 00, if the present state is 0, next state is 0. For 00, if the present state is 1, next state is 0. So for PN 01, present state 0, next state is 0. For PN 01, present state 1, next state 1. For PN 10, present state 0, next state is 1. For pn10, present state 1, next state is 0. For pn11, present state 0, next state is 1. And for pn11, present state is 1, next state is 1. Now let us use the excitation table of jkfliplop and the characteristic table of pnfliplop to derive the conversion table required for this design. So jkfliplop excitation table identifies the jk input combinations for example, 0 to 0, present state 0 to next state 0, jk is 0x and so on. So jkfliplop excitation table identifies the jk input combinations for the required present state to next state transition as per the characteristic table of pnfliplop. So here you will see that the conversion table we have derived here. So the first four columns are nothing but the characteristic table of pnfliplop whereas last two columns are derived from the excitation table of jkfliplop. So here 0, present state 0, next state 0, what should be the jk inputs? So 0x, present state 1, next state 0, jk should be x1, present state 0, next state 0, jk should be 0x, present state 1, next state 1, jk should be x0 and so on. So this is how you can actually derive the conversion table with the help of these two tables. Now let us use this conversion table for deriving the j and k expressions which we are required for the next state logic. So for that purpose we are using the kmap simplification method. So with the kmap we will derive the output expressions of the next state combination logic that is j and k. So this is the table which we have derived in the last slide. Let us use three variable kmap to derive the j and k expressions one by one. So first we will derive the expression for j. So here inputs are used here are p and n present state. So p and n is used here for addressing the column, columns whereas present state is used to address the row. So let us map this j column on the kmap. So 0x, 0x, 0x, 1x, 1x. So after mapping the j column on the kmap you will find a group here group of four cells. So here don't care cases we have taken into the consideration to form a chord. So the expression for this chord is nothing but p. So we have derived here an expression j is equal to p. Let us derive the expression for k also. So first we will map the k column on the kmap. So x1, x0, x1, x0 again with the help of these don't care cases we will form a group of four cells here four squares and the expression for this group is nothing but n bar. So here the expression you will get for k is equal to n bar. So let us use these two expressions to complete the final logic diagram. So we will use these two expressions for the implementation purpose. So we will draw here the final logic diagram with the output expressions derived in the previous step. So we derived j is equal to p so we will just use one wire and we will name that input as a p. For k we derived k as n bar so we required here one inverter so we will apply n through the inverter for the k input. So this is the final diagram of negative h-triggered p-n flip flop using negative h-triggered jk flip flop. So this is how you can design any arbitrary flip flop using any other flip flops. So these are the references which you can go for further reading thank you.