 In a static multiple-issue processor, we essentially collect a series of instructions and package them into one large instruction. Then, the large instruction has a series of issue slots where each issue slot can run one instruction. Depending on your architecture, those issue slots may be generic so that they can be used for any type of instruction, or we might have a special purpose one, where perhaps we have one issue slot for arithmetic instructions and one issue slot for memory instructions. In this case, if I have an arithmetic instruction, I can place that in the arithmetic issue slot, but I can't place it into the memory issue slot. If I have a memory instruction that I'd like to run it about the same time, then I can place that into the memory issue slot. This type of architecture will work well when you have lots of both types of instructions to run. In order to get good performance out of this type of architecture, you have to make sure all of your issue slots are being used. If you have some issue slots that aren't getting used because say you don't have enough memory instructions, then your performance isn't really improved over just having a single issue processor. There's also another issue that arises here. If we're going to issue several instructions in one cycle, we also have to make sure that there aren't any dependencies between them. We won't really be able to do forwarding in this case because all of these instructions will try to reach say the ALU at the same point. So in this case, we have to structure our macro instructions in such a way that they don't contain any dependencies or any other potential hazards. Static multiple issue processors then rely very heavily on the compiler to produce good high performance code. We want to be able to package as many instructions into one instruction word as we possibly can. This means the compiler may have to try to find instructions that aren't necessarily related to the other instructions that are running just to keep the pipeline full. In the extreme case, we end up with what's called a very long instruction word architecture where we have lots of instructions that are being passed in in every cycle. There are four different types of static issue processors that we can consider. We've already looked at what a single instruction single data processor is. Each cycle we issue one instruction. It has one set of data that it works with. It performs that operation on the one piece of data that it has and completes. The type of static issue processor that we've just looked at would be multiple instruction, multiple data architecture. In this case, we have multiple instructions and they're each using their own different pieces of data. This is not the most common architecture but it is one that we still build. A much more common variation is the single instruction multiple data architectures where we have one instruction and we give it a whole lot of data to apply that instruction to. GPUs are a good example of this type of architecture. We may want to apply one operation to all of the pixels on our screen so we have lots of data but only one operation that we're actually performing. We could potentially have a multiple instruction single data architecture as well and these are going to be less common in such a format but in a way you can consider some of the very complex instructions that we add to say the x86 architecture to be this type of instruction. Some of the modern x86 instructions are actually kind of a composite of a lot of other simpler operations that we used to do before. We might have a very complex task that we want to do like multimedia processing, encryption or processing an artificial neural network and previously that would take lots and lots of instructions, dozens or hundreds of instructions to process one meaningful operation. However, recent x86 processors have added instructions to do just those things. Now we get one instruction that does a whole lot of computation for us. In a way it's performing multiple instructions for us but with only one piece of data. We've got this one piece of data that's just moving through a very, very complex pipeline where lots of operations are happening to this one piece of data.