 Last couple of classes we have looked at p-n junctions. A p-n junction is a two terminal device. You have one terminal on the p and one terminal on the n and it is a single junction that is the interface between p and n. Today we are going to start looking at transistors. A transistor is a three terminal and two junction device. When we mean a junction here we mean a p-n junction so that you have two p-n junctions in the device. The name transistor comes from the term transfer resistance. This means that the current through two terminals can be controlled by controlling the current or the voltage through other two terminals. controlled by either the current I or the voltage through the other two terminals. When we look at examples of transistors, this point will be made clear. A transistor can also act as an amplifier in that you can take a small signal between a pair of terminals and then amplify it so that the output signal between another pair of terminals is higher. So we will first start by looking at bipolar junction transistors. So we will first start by looking at bjt which is your bipolar junction transistor. From there we will move on to field effect transistors and then finally a specific type of field effect transistor called a MOSFET, a metal oxide semiconductor field effect transistor, conductor FET. So we will start with the bjt then go on to FET and then MOSFETs. So we will spend most of the time looking at MOSFETs because MOSFETs are what are used in the current IC industry but we will talk about the other two to form the basis of understanding MOSFETs. So let us start by looking at a bipolar junction transistor. So we will first start with an example of a PNP device. So you have three regions, you have two of them are P type and then you have a central region that is N type. So we have a PNP transistor. So there are three differently doped regions in this transistor. The first region is called the emitter. It is usually heavily doped in this case it is heavily doped P plus. We then have a base. The base here is N type PNP. So N type the base usually has a lesser thickness compared to the other two regions and then finally we have a collector. In this case the collector is also P type and it usually has a larger width or a larger thickness than the other two regions. So if I were to show a schematic of a PNP transistor I have an emitter region that is P plus. I have a base region that is N and I have a collector region that is P. So I will mark this E to mean the emitter. This is your base that is the collector. So we have two junctions, one junction between the emitter and the base, one junction between the base and the collector and you have three terminals. So this makes your transistor a three terminal two junction device. So if you look at the two junctions the first junction is your P plus N which is your emitter base. So the P region is heavily doped. So the depletion width is almost entirely in the base. You also have the junction between the base and the collector which is a simple P and N. In this case the depletion region is in both the base and the collector. So it is in the base and the collector. So there are various configurations in the case of a PNP transistor. How we connect these different terminals? The first configuration we are going to look at is called a common base. This case the base is common between both the emitter and the collector. So let me draw the electronic, the configuration for the common base. So this is the base. You have an emitter and you have a collector. So the emitter base junction is forward biased and the collector base junction is reverse biased. This is C. So this is the emitter base junction that is forward biased and then you have the collector base junction. So in this particular example VCB is greater than V EB. So let me just write down this is forward biased and this is reverse biased. We can also define three currents. One is an emitter current IE. Then you have a base current and then finally you have a collector current. So how does a PNP transistor work? Let me again draw a schematic of the transistor in this. I will also mark the depletion regions. Let me just redraw this. So I have three regions the emitter, the base and the collector. So the emitter is P plus, the base is N and the collector is P. So the emitter base junction you have a P plus and an N. So the depletion width is almost entirely on the base side. On the other hand the base and the collector the depletion width is in both regions. So you have two junctions which is why you have two depletion regions. So we have the emitter current, we have the base current and you have the collector current. The emitter base junction is forward biased. So we have holes that are injected from the emitter into the base. So these holes then go through the base where they are minority carriers because the base is N type. But the width of the base region is very small. Some of these holes can get recombined. So they form the base current but a majority of the holes go through the base and then they go to the collector which is reverse biased. So you have holes that go through the base and they form your collector current. So we have a base emitter current that is because of the injection of holes. Some of these holes recombine in the base region. They form the base current and the remaining holes that go from the base to the collector constitute the collector current. In the case of a bipolar junction transistor we can define a current gain. Another name for it is also the current transfer ratio. So it is nothing but the ratio of the collector current to the emitter current. Now in an ideal case if no holes are lost in the base due to recombination, this current gain should be equal to 1. So this is if it is ideal and there is no base current but usually some of the holes will always be lost in the base due to recombination. So this current gain typically is around 0.99. So we up to 0.999. So the current gain depends upon the thickness of the base region. So typically we want a very thin base. So not many holes are lost due to recombination. Instead of a PNP if you had an NPN transistor the argument is entirely the same except that here you have injection of electrons instead of holes. The transistor action here arises because there is a net power gain because we said that VBC which is your base collector voltage is higher than VEB which is your emitter base voltage. So if you looked at the net power, power is nothing but the voltage into the current. So you have ICC that is greater than the emitter VBE. So you have a net power gain in your transistor. So in this particular mode we operated the BJT in a common base configuration. Let us look at one more configuration. We will look at a configuration where we have the emitter being set as common. So now you have your bipolar junction transistor but it is in common emitter mode. So if you redraw this and just for example I will choose an NPN transistor instead of a PNP. So in this particular case I have an emitter that is N+, that is my emitter. I have a thin base region that is P type and then I have a collector that is N type. So in this particular case I have the emitter base to be forward biased and I have the collector base. So in this particular case I have the emitter and the base to be forward biased and I have the collector and the emitter because it is a common emitter mode to be reverse biased. So in this particular case IB which is the base current is your input and IC which is the collector current is the output. In a common emitter configuration it is easy to see how your transistor acts as an amplifier. The base current is typically very small while the collector current is much larger. It is almost equal to the emitter current. So you are taking a very small current and then amplifying it into the collector current so that your transistor works as an amplifier. So it takes the small base current and gives out a larger collector current. So a bipolar junction device is essentially a current control device. So you can say that the current from the emitter to the collector so IE and IC are controlled by your base current but overall it is a current control device. The next thing we are going to look at is your field effect transistor. We are going to look at a junction field effect transistor. So we are going to look at a junction field effect transistor called a JFET. So both the JFET and the MOSFET which is what we look after this are voltage control devices. So let me draw a schematic of a JFET. Remember once again we need two PN junctions. We also need two terminals. So in this case I start off with an N type material. I have two heavily doped P type materials or P type layers in this N. So both of these are heavily doped P. So I am going to call them P plus. So because they are heavily doped and you have a P and N, you have a PN junction and the depletion width is almost entirely on the N side. So if I were to draw my depletion region, so the dotted line represents the depletion region and between the depletion region you have an N channel. So we can again define three terminals. You have one that is called a source. You have one that is connected to the P plus. It is called your gate and then you have a drain. Let me just mark it here as drain. So you have a source, you have a drain and then you have a gate. A more practical way the device will look. I will just draw that. So I have a P region. Within that P region, I define an N region and then again I have another region which is heavily P plus. So we can define three terminals. Usually there is an oxide layer on top. So if your material is silicon, which is almost always the case, your oxide is SiO2. So we can form the three terminals. One is your source. Then you have a gate. Gate is here. Then you have your drain. So the shaded regions essentially mean metal so that you have a good contact with your semiconductor. So I will just say a metal contact. Once again in this device, you have two depletion regions. So you have two junctions, one between the P plus and the N, one between the N and the P so that you have two depletion regions and you have an N channel. So this schematic represents more of how the actual device will look. This particular diagram is something that I am using in order to explain the functioning of a JFET. So we will use this to explain how the current and voltage behavior works. But please keep in mind that a more practical device will have a different schematic. So we will consider the behavior of a JFET. So once again you have a current between a source and the drain and this current will depend upon the voltage that is applied at the gate. So that is your transistor action where the current between two terminals depends upon the voltage or the current between the other terminals. So let us first look at the current between the source and the drain when your gate is short circuited. So let me redraw the schematic of the device. So you have a source and you have a drain. This is my drain. That is my source. I have my 2P regions. This is N. So I have my 2P regions so that I have my two depletion regions and then I have my N channel. So we are going to apply a bias between the source and the drain. So I will bias the drain positive with respect to the source. Let me call this VDS and this is greater than 0 which means the drain is biased positive with respect to the source so that electrons can move from the source to the drain. So electrons can move and this constitutes your current. We will also set the gate at a 0 potential so that VGS is 0. So the gate is a 0 potential. So as we start to increase this value which is your drain and source voltage, we are going to have a current. We keep on increasing the value. There is going to be more current. But if you look at the two junctions, as we increase the value of the drain source voltage, there is going to be narrowing of the N channel. This is because this drain is reverse biased with respect to the gate so that as VDS increases, there will be narrowing of the N channel towards the drain. So I will just show that schematically on the same figure so that if you look at the channel, the channel is wider near the source and starts to narrow near the drain. If we increase the value of VDS further, there is going to be further narrowing until both the depletion regions meet in which case we will have a pinch-off region. We can show that schematically on the same plot so that your N channel has essentially pinched off here at high values of VDS. When pinch-off occurs, the current through this device essentially becomes a constant because it depends upon the resistance of this N channel. This is again assuming we have a pinch-off region that is small in width. So when once pinch-off occurs, the current I between the drain and the source so I will call it IDS becomes a constant. So we can plot an IV characteristics for this JFET and if we do that, I have current so IDS which is the current between the drain and the source versus VDS. This is again the voltage between the drain and the source. Right now I am shorting the gate so that the gate and the source voltage is 0. So as you increase the voltage, initially your current starts to rise because you have electrons going from the source to the drain but as the current starts to rise and as the voltage increases the width of the channel will also decrease and ultimately you will have pinch-off and when that occurs the current is a constant. So your IDS initially increases until pinch-off occurs and then your current is a constant. So this value where your pinch-off essentially occurs is your saturation and this plot is when your gate and source are shorted so that there is no bias between the gate and the source. So what will happen? We now have a bias between the gate and the source. So let me redraw this and introduce a bias between the gate and the source. So again I have my n region, I have my 2p regions that is my drain that is the source and the drain is positively biased with respect to the source and now I am going to bias the gate negative with respect to the source, VGS. So when we do this, we now again you have a depletion region but if you look at the gate and the source, the gate is reversed biased with respect to the source so that the depletion region is higher or in other words the channel is narrower. So once you have a bias, the n channel becomes narrow and if we keep on increasing this value the channel will become narrower and narrower. What this means is that if you plot your IV characteristics, you are going to find that pinch off becomes easier, higher this voltage between the gate and the source. So we were to plot this. So this is for VGS equal to 0. If you have another value, VGS is minus 2 volts. Once again your current for saturation is lower because you have a narrower channel and also the saturation occurs earlier. If you increase the voltage even more so VGS is minus 4 volts, the current will again go down and saturation also occurs earlier. So in this particular case which is your JFET, you have a situation where the current between the source and the drain which depends upon the width of the n channel is affected by the voltage between the gate and the source VGS. So higher that voltage, smaller is the width of the channel and then lower is the current. So this is again an example for transistor action where the current between two terminals is affected by the voltage between the other terminals. This is an example of a JFET so where you already have a channel that is created within the material. The next thing we are going to look at is a MOSFET. So we have a metal oxide semiconductor which creates your n channel. So the metal oxide semiconductor field effect transistors are what that are commonly used in the current micro fabrication industry. So before we understand MOSFETs, let us just look at the metal oxide and semiconductor junction and see how we form the channel in that particular case. So right now we will only look at this part. Once we understood that, we will put it together in order to look at the MOSFET. So consider a parallel plate capacitor formed between two metals. So you have metal one and you have another metal plate and then you apply a potential. So between the two metals you have an insulator. So this insulator could be air or vacuum or it could be an oxide layer or some other layer which acts as an insulator. So you have two metal plates connected to a potential. This case you have positive charge on one plate and negative charge on the other. So this acts as a capacitor and since these are metals, the charges will reside on the surface. So let me first take this device or let me take this arrangement and replace one of the metals with a p-type semiconductor. Then I have a metal but instead of the other metal I have a p-type semiconductor. So once again there is an insulator layer between these two. Connect the metal to positive and the p-type to negative. So we have a positive charge on the surface of the metal but the charge density in the case of a semiconductor is lower. So we have seen this example earlier in the case of short key junctions. So you have a negative charge on the semiconductor but it is not only at the surface but it also extends a small distance into the bulk. So in the case of a semiconductor we have a depletion region and then we also have the bulk. So within the bulk of the semiconductor it behaves as your regular n-type. So p is equal to nA but in the depletion region you have less number of holes, less than nA. The material is still p-type. So you still have p greater than n but the value of p is less than nA and this is because you have biased the semiconductor negative so that you are pulling the holes away from the semiconductor or you are pushing electrons. Now if we keep increasing the bias we are going to get more negative charge in the semiconductor and you are going to find that at one particular point the number of electrons will be more than the number of holes. So that you create a region where you have n-type conductivity is opposed to p-type. This thing is called inversion. So let me just draw that again. So once again I have a metal. I am going to draw my semiconductor slightly bigger so I can show the different regions. That is my p-type. So I have the bulk of the semiconductor which is the bulk. I have a depletion region where the semiconductor is still p-type but the concentration of holes is less than nA. So I have a depletion region and then finally I have a region which is closer to the surface where I have more electrons than holes so that I have inversion. So in the bulk I have p equal to nA that is in the bulk. In the depletion region I have p greater than n so that it is still a p-type but it is less than nA and finally I have an inversion region where n is greater than p. So in the case of a p-type semiconductor I have formed an n-channel by applying a negative bias to the semiconductor. So this is the principle of your metal oxide semiconductor which we will use in the transistor. The difference between this and JFET is that in the case of a JFET you already had an n-channel that was present and by applying a voltage we shrunk or decrease the width of the channel and control the current. In the case of a MOSFET the channel is formed by applying an external potential so that the channel is not immediately there and by increasing the potential you can increase the width of the channel and control the current. So in next class we are going to look at the working of a MOSFET. So once again we can draw these current versus voltage characteristics. We will also look into some more detail on the formation of the depletion and the inversion regions and also calculate their widths. So next class we will look at MOSFETs in detail.