 Hello everyone, welcome to this session. I am Dr. Asha Tharangi and today we are going to learn differential phase shift keying demodulation techniques. At the end of this session you will be able to explain differential phase shift keying demodulation technique and state advantages and disadvantages of DPSK. These are the contents we will be covering in this session. Now, before moving ahead let us recall what is the major difference between BPSK and DPSK modulation technique. Well, as discussed in the previous session in DPSK the information of input bit stream is present in the difference between the phases of two successive bits. Whereas, in BPSK the information is present in actual phase in that bit slot only. In the previous session we discussed DPSK modulation technique. We know that in DPSK modulation input bit stream is modified to a new bit stream such that the next bit depends upon the previous transmitted bit. It is represented by the expression D of t is equal to B of t x naught with D of t minus t b and to this modified bit stream, PSK is applied which gives V DPSK of t is equals to plus or minus a cos omega ct. Let us now see how this DPSK signal is demodulated. Figure shows the block diagram of DPSK demodulator. The incoming DPSK signal D of t is applied to one input of the multiplier and to another input of the multiplier the incoming signal delayed by one bit duration is applied. Thus the output of multiplier is the product of the incoming signal with its previous received signal. This product is then applied to low pass filter which blocks the high frequency components and gives DC component at the output say L. The DC value L is positive when the incoming signal in the current bit slot is in phase with the previous received signal and the DC value is negative when the incoming signal in the current bit slot is out of phase with the previous received signal. This voltage is then applied to the decision device whose threshold value is set to 0 volt. Thus at the output of the decision device the original bit stream is obtained. The output extracted bit is 1 during the bit slot if L is positive and the output bit is 0 if L is negative. Let us see this in detail. Now there are two possibilities. First when the incoming signal and its previous received signal both are in phase and the second possibility is when the incoming signal and its previous received signal both are out of phase. Let us consider the first case. Now again in this case two combinations are possible. When the incoming signal and its previous received signal both are plus a cos omega ct or the incoming signal and its previous received signal both are minus a cos omega ct. In both these cases the output of multiplier is a square cos square omega ct which on passing through the low pass filter gives positive DC voltage a square by 2. As this voltage is greater than threshold voltage the decision device thus outputs logic 1. Thus whenever the incoming signal is in phase with the previous received signal output bit extracted is 1. Let us now consider the second case when the incoming signal is out of phase with the previous received signal. That is the incoming signal is a cos omega ct and the previous received signal is minus a cos omega ct or the incoming signal is minus a cos omega ct and the previously received signal is plus a cos omega ct. In both these cases the output of multiplier is minus a square cos square omega ct which on passing through the low pass filter gives negative DC voltage minus a square by 2. Now this negative voltage after comparing with the threshold value gives logic 0 at the output of the decision device. Thus when the incoming signal is out of phase with its previous received signal the output extracted is logic 0. Let us understand this with an example. Consider the given input bit stream B of t that is to be transmitted using DPSK. This is the modified bit stream D of t for the given B of t which is actually transmitted through a noise free channel and is received at the demodulator input. The D of t minus tB is the incoming bit stream delayed by 1 bit duration at the demodulator. Let us see how it works. The phase angle of the transmitted bit stream is as shown. The incoming bit stream delayed by 1 bit duration D of t minus tB and its phase is as shown. Thus as discussed whenever the phase of the incoming bit and its previous bit received is same the demodulator produces bit 1 at the output and whenever the phase of the incoming bit and its previously received bit is out of phase the demodulator produces bit 0 at the output. Also it can be seen that the extracted bit stream is same as the original information bit stream used for modulation. Now pause this video and complete the table for a given input bit stream B of t. Assume the initial transmitted bit as 0 during DPSK modulation. Also after completing the table compare this extracted bit stream B dash of t with respect to the bit stream B dash of t of the previous table for which the initial transmitted bit is 1. Well the answer is as shown. It can also be seen that irrespective of whether the initial transmitted bit is 1 or 0 the reconstructed signal is same in both the cases. Thus we can say that in the absence of noise the receiver can reconstruct the exact binary bit stream as used in the transmitter. Also reconstruction is same whether the initial transmitted reference bit is 1 or 0. Here no synchronous carrier is recovered from the incoming signal nor it is generated at the receiver side for demodulation. Due to this DPSK can be treated as non-coherent type of DPSK demodulation technique. With this let us now see what are advantages of DPSK. As discussed for DPSK demodulation no synchronous carrier is needed. Thus it reduces the circuit complexity as no additional circuit is required for local carrier generation. Also the bandwidth requirement of DPSK is less compared to BPSK. Let us see what are disadvantages. In DPSK previous bit received is used to extract next bit. Hence if error is present in the previous bit the next bit detected is also wrong. Due to this error propagation is more and also there is a tendency of errors appearing in pairs in DPSK. Therefore compared to BPSK it has higher probability of error and higher bit error rate. This is all about DPSK technique. These are the references used. Thank you.