 Thank you, Kendi. So yeah, hi, I'm Andy Moore, senior marketing manager with RISC-V International in place of the advertised speaker today. Thank you for coming along through our webinar. I'm going to speak to you about delivering the future of automotive innovation with RISC-V. We overcome challenges through collaboration. Collaboration enables us to progress the state of the art, invent new technologies, tackle new problems. Open standards and collaboration are strategic to computing to both hardware and software across industries and geographies. Today I'll be speaking about RISC-V, the Open Standard Instruction Set Architecture, or ISA, that is the very definition of open computing. You will have heard about RISC-V over the last few years. It has been growing quickly, capturing hearts, minds and investment across a range of industries. We are at a critical point in compute history. Open standard hardware is taking hold, as we've seen before with open source software. RISC-V is inevitable, with over 10 billion cores shipped worldwide and shared investment from across our ecosystem. We are already seeing great success. RISC-V enables the best processors by design. Our modular approach, well-rounded architecture and collaborative community ushers in new possibilities across all industries and applications, giving freedom of design and freedom of opportunity. And talking of collaboration, we're working quickly to build the strongest ecosystem driven by the collective interest of all of our members. Open standards are driving choice and reducing vendor lock-in. Thousands of engineers are working on RISC-V every day, breeding innovation and competition. As the automotive industry is embracing computing and the power of software as never before to transform its products and services, it's a great time for you to be hearing about RISC-V and our amazing ecosystem and how it can transform your digital roadmap, giving you new opportunities to innovate and new ways to work together with the rest of the automotive industry. Our vehicles are at an inflection point under growing a period of rapid evolution. The capabilities of modern computing are being applied across the car to enable new features and user experiences. We're seeing the development of increased levels of self-driving capability along the road to fully autonomous vehicles. The rapid rise of electric power train driven by environmental concerns and government timelines is driving a complete reinvention of power train systems. New levels of connectivity are enabling deployment of features and software updates, as well as new rich in-car infotainment experiences, ensured services, redefining how people interact with their vehicles and how automotive companies deploy and sell vehicles. The life of a car post-manufacturer is interesting in ways it never was before. Just as we couldn't foresee the amazing wave of innovation ahead of us when the smartphone was invented, we can't yet see the full potential of this future generation of vehicles, but it's a market with huge opportunity. The amount of software in the car is growing massively, companies are becoming software makers, their products softer defined and increasingly valued on the functionalities supplied by the software. Distributing the computing, running the software to get a lot more complex, the previous model of individual functions being delivered through individual ECUs cannot scale. The automotive supply chain is consolidating into fewer more powerful zonal and domain controllers towards even more centralized vehicle compute with high performance requirements and dedicated processing for specific workloads like AI. This new software defined era of automotive presents car makers with a new set of problems. Firstly, how can it cost effectively deliver this massive increase in complexity of in-vehicle compute at the very performance levels required for different applications and how can they deliver this in-vehicle compute while meeting the strict levels of safety and security that automotive demands? These new requirements for in-vehicle computing software and services shakes up and rearranges the existing automotive supply chain along with the long-held relationships and ways of working together. Car OEMs, Tier 1s, Tier 2s and the rest of the value chain are looking again at what technologies they need to develop themselves and what services and products they can offer. Business models are changing in the supply chain with a focus to a more extended relationship with the end user. Also, companies are looking to find new ways to differentiate and that means they have a greater need to innovate. In the past, auto companies signed their products based on existing chips in the market. Now these companies are specifying features and automotive silicon based on software that they are planning. Risk 5 is the instruction set ISE that the industry needs to make sense of and succeed in this new automotive era. It is the common architecture that enables the supply chain to work effectively together while giving companies the freedom to differentiate and the opportunity to innovate while supported by the capable and diverse Risk 5 ecosystem, which accelerates development while reducing risk with technologies and capabilities across both hardware and software. The Risk 5 Open Standard Instruction Set architecture scales across the whole vehicle, delivering the compute required for every vehicle application from simple low power sensors and actuators to new compute intensive systems like zonal controllers, domain controllers and high performance centralized vehicle compute. Risk 5 delivers scalable performance, highly customizable and tunable at the core level for each individual application and its requirements in terms of size, power, performance and key automotive care about safety and security. For example, for very simple sensors where the size of the core is key, you can customize the ISE to keep only the instructions and capabilities you need. For more powerful and specialized applications such as the AI required for increasing levels of autonomous driving, custom instructions and extensions can be added to give highly optimized and high performance silicon, which is efficient in terms of silicon area and power efficiency. Put simply, Risk 5 delivers the right type of compute in the right place. The use of a single architecture simplifies development and reduces cost scalable across the whole vehicle and the reuse of expertise and tools across a range of different applications. The use of a single ISE also enables software components to be easily deployed across a manufacturer's range of multiple vehicle models and specification levels whose different price points necessitated a range of compute specifications. And this is not just theory, Risk 5 has already been selected for use in automotive applications such as advanced driver assistance systems. As I mentioned at the start of the talk, we overcome challenges through collaboration. The open nature of the Risk 5 standard allows companies to work together to create new technologies required for the future of automotive. Enables stakeholders in the automotive supply chain to solve problems while talking the same language, working efficiently together, rather than creating fragmented solutions. Risk 5 is an extendable standard, enabling the development of custom, highly specialized automotive specific extensions to the ISE, enabling features and innovations that other instruction set architectures could not facilitate. This extensibility enables optimized solutions to key industry concerns in highly automotive specific SOCs. An open and extendable standard means a common language along with opportunities for innovation and differentiation. There's also the opportunity to contribute extensions to the standard via the working groups. Becoming a member of Risk 5 enables access to the relevant steering groups, including the automotive SIG and the functional safety SIG, giving the opportunity to influence automotive related extensions for ratification, driving the standard to address future requirements of the automotive industry, and the opportunity to collaborate and network with the Risk 5 automotive ecosystem. There is a seat at the table for anyone. Ideas can be floated, developed and adopted into the Risk 5 standard. Risk 5 is not just about the ISE. The Risk 5 ecosystem is the source of the technologies and expertise that can help enable any automotive compute development. This hugely capable collection of member companies and organizations is working to cover the requirements for the future of automotive compute across safety certified processor cores, IP tools, verification, software components and development tools. The diverse range of silicon requirements across the car means that the range of different chips are needed with differing processing power and feature requirements. Also, individual members of the automotive supply chain will have different needs for consourcing compute power for their applications. Wherever you are on the spectrum, from sourcing pre-designed automotive MCUs to specifying complete custom automotive SOCs, the Risk 5 ecosystem can deliver. Our members are experts in a range of hardware technologies from processors and IP design tools and verification. An open standard ISE lends itself to rapid innovation in software. We have a rapidly expanding innovative software ecosystem with Risk 5 members already delivering full certified compilers and software development tools and components ready for use in automotive applications along with rich operating systems and virtual platforms. Risk 5 benefits from a many eyes model of development in terms of safety and security from across the ecosystem and giving more expertise and opinions to contribute to increase safety and security. As the importance of compute power in automotive increases, so does the importance of being able to control your technology roadmap and supply chain. Risk 5 has already grown tremendously in global adoption and influence as the open standard for compute. Risk 5 is an open standard and has incorporated meaningful contributions from all over the world. As a global standard, Risk 5 is not controlled by any single company or country. Development of Risk 5 specifications is based on contributions that have been made available on a non-proprietary basis or cultivated in the open from Risk 5 members evenly distributed in North America, Europe and Asia. Risk 5 has ushered in tremendous potential for companies from all over the world to participate in the rapidly growing semiconductor space. As discussed in the previous slide, the Risk 5 ecosystem has extensive capabilities across both hardware and software, but it also understands the specific requirements of automotive industry in terms of long term support. The wide breadth of products offered by the Risk 5 ecosystem enables easier multi-sourcing for future developments, reducing risk in your automotive supply chain and preventing lock-in from individual vendors. You will find different options all based on the industry standard at Risk 5 ISAM. As I've already touched on, the use of Risk 5 enables you to create more differentiated and compelling products. The flexibility of the ISAM across all performance points along with the ability to customize and extend enables a degree of innovation not previously possible. Your automotive SOCs can be uniquely customized to suit your exact process requirements and customized to deliver on new ideas and concepts for vehicle compute architecture that you may have. Wherever you are on your compute journey, the Risk 5 ecosystem is here to help. The use of Risk 5 puts companies in control of their technology roadmap, enabling them to create more innovative and differentiated and compelling automotive compute solutions based on an open standard that can be counted on for longevity and support. The Risk 5 Automotive Special Interest Group is tasked with representing the interests of the automotive industry within Risk 5 International. This encompasses understanding the needs of the industry working to improve the Risk 5 ISAM and developing the supporting ecosystem to ensure that Risk 5 provides the best possible solution across all automotive applications. The group is well supported with participation from over 20 organizations from many different grid geographical regions representing a wide cross-section of the industry, including hardware, software and tools. This focus on the automotive sector is enhanced by working groups from other groups across Risk 5, and in particular the dedicated special interest group for functional safety, which I'll talk about more in a moment. Membership of Risk 5 enables you to attend these meetings and connect with the other members of the automotive SIG. As just mentioned, in addition to the automotive SIG, Risk 5 has a functional safety special interest group. Functional safety, defined as the absence of unreasonable risk due to hazards caused by malfunctioning behavior, is a crucial aspect of automotive development. Therefore, these two groups work very closely together. Of course, automotive systems are not only about safety and not all safety-related systems are automotive, so the groups align to cover automotive safety topics together and other topics separately. The safety SIG spans automotive, aerospace, medical, railways and other domains, where functional safety is important. Its goals are to identify the needs of these applications and lead activities to improve the Risk 5 ISA and ecosystem support to fulfill these needs comprehensively. The SIG has participation from a wide range of companies, including OEMs, silicon manufacturers, software and CAD vendors, IP providers and research labs. The Risk 5 software ecosystem, or BRISE project, is a new collaborative effort in collaboration with Risk 5 International hosted by the Linux Foundation. It brings together global industry leaders committed to accelerating the availability of software for high performance and power efficient risk 5 cores running at high operating systems for a wider variety of market segments. You can see here the substantial support from some of the industry stakeholders committed to accelerating the software ecosystem for Risk 5. Note this is only the platinum board members and founders, more recently Canonical and Microchip have joined RISE as general members along with a couple of others. RISE community will be primarily focused on software for apps processors, including compilers and tool chains, language runtimes such as Java, system libraries, Linux and Android, virtualization as well as profile and debugging tools. Let's talk specifically about hardware. To recap, Risk 5 is the foundation of your processing roadmap, an ISAN ecosystem that supports you through every stage of your silicon journey. You can select an MCU from an ecosystem vendor or build your own silicon based on processor cores available from our ecosystem of member organizations or even your own design based on the Risk 5 ISA itself. The Risk 5 ecosystem is here to support you wherever you are on this journey. Let's have a look at some of our options available from some of our members. Our members offer a range of automotive processors and these technology offer PUSA cores for ECU applications, storage, touch, sensors and mission critical parts. Codesipper experts and customization of their processors for automotive applications. Cortis offers a complete range of automotive, complete automotive ASLB such the MCU range, including ADAS and HPTC based on Cordeser P's. Imagination technologies offers an automotive roadmap based on the ASLD certified process. Nuclear system technology have their NA900 certified compliant with ASLD requirements of ISO 26262 standards for both systematic fault and random hardware faults. MIPS have compute solutions delivering performance, safety and reliability for ASL compliant PUSA systems. SIFI have a range of certified and general cores for the full range of automotive applications. And Vantana offers server class IP and templates for ADAS, autonomous driving and IVI compute with PUSA, ASLB and cybersecurity certification. In terms of verification, in Paris offer fast simulation models and verification IP for Risk 5 CPUs. Synopsis enable scalable SOCs, SOC verification, early software bring up and system validation and Siemens can help with automated exhaustive verification of Risk 5 customization. We'll be hearing more detail about some of these technologies in a few slides time. As mentioned previously, the value of software is paramount for the future of vehicle development. Risk 5 and its member companies are developing software tools and support for automotive applications. Our members offer the safety tool chains and IDEs to enable software development for ISO 26262 systems. In terms of OS and hypervisors, there is support in place or under development. Our members already offer safety RTOS solutions on Risk 5. Automotive Grade Linux is currently up and running on a SIFI unmatched board and emulated in QEMU, along with other Risk 5 search and silicon targeted in the future. Android is a key software component of the automotive software stack. In December 22, last for the Risk 5 Summit, Google announced that Risk 5 will be a first class citizen in Android. This will enable the Android application ecosystem to embrace Risk 5 en masse. Google is leading Android development on Risk 5 with Risk 5 vendors actively supporting them. Android on Risk 5 is currently running on a range of platforms. Various QEMU models based on Google Cuttlefish, FPGAs and the High 5 unmatched board and other platforms. We can run first-party and third-party Java apps, develop debug apps, seamlessly using Android Studio, and debug native code over ADB using the LLDB integration in AOSP, and also the Google and major OEM, ODM stakeholders continue to work through the interim milestones required to reach the objective of full Risk 5 support. AutoZAR is a critical component of automotive software, both classic AutoZAR on MCU and adaptive AutoZAR for application processors. There are ongoing discussions between multiple members of the ecosystem and of the... There are ongoing discussions between members of our ecosystem and multiple vendors about support for AutoZAR on Risk 5. We understand the importance of AutoZAR support and are working to make this happen. Virtual platforms and digital twins are vital tools to enable more complex and feature-rich electronic systems, allowing you to shift left in your automotive development before silicon availability. Our amazing software ecosystem has enabled this with offerings from several companies already available. As you can see, there is already great support in place, but we encourage those of you interested in Risk 5 development to talk to your software partners about their individual plans. These are some of the amazing companies and organizations enabling software development for automotive on Risk 5. The ecosystem that you're used to working with is already working with Risk 5 and solutions are available today. Whether you're worried about debug, compilers, both open source and commercial, through to operating systems and simulation tools, the ecosystem is for Risk 5 is ready and waiting. Now, I'd like to introduce some slides from some of our member companies, giving you an overview of their Risk 5 offerings in automotive. Excuse me, I see we've got a problem with the audio. Let's try and fix this. Sorry. And this technology is a publicly listed 18-year-old pure place CPU IP provider. Let's focus on providing leading risk 5 IP in 2022. And this has released a world-first ISO 26262 SOB fully compliant risk 5 core and 25 FSE. It has been adopted in over 10 different customer projects across five different applications, including Display and Touch, MCU, DVR camera, encampment radar and CMOS sensors. And this is working with a wide range of software partners to provide a complete solution to the customers. In addition, NDS has rolled out a comprehensive FUSA roadmap with varying computing power from 3-stage all the way to 13-stage cores. And FUSA level support ranging from SOB to SOB. It can satisfy all the automotive chip development requirements from mainstream ECU to mission critical, to low power and security, to high performance parts. For more details, please visit the end of this automotive segment website. Last year, we had a joint announcement with Mobileye about their plan to use the MIPS P8700 Risk 5 CPU core in their I&A system. Those systems will be used in the Mobileye Shaffer and Mobileye Drive to enable level 3, level 4 Thomas driving in part of the road like part of the highway and part of the city. Those system deployment will start in 2025, starting with the Zicker car and more announcement to be followed, most likely on CES this year. Lastly, come to ERAS and meet us in the Risk 5 Summit to learn more about the safety principles that have been used to drive safety for such a complex system. Thank you. IAR are very proud to present our functional safety solutions for ISO 26262. These solutions cover both traditional architectures and Risk 5. And we are very pleased to do announcements recently with Andes, with SciFive and Iliatech to deliver functional solutions for their platforms. IAR have certified solutions covering embedded workbench and the IAR build tools, giving developers flexibility in how they wish to utilize the tools. We have simplified validation from Tuvset and internally through our own safety guides. We offer our partners long term support through special agreements, through regular communication of any known problems for automotive and through validated service packs. Hello, I'm Robert Redfield from Green Hill Software, describing our safe and secure Risk 5 Software Foundations for Automotive. Since 1982, Green Hill Software has been a global leader in safety, security, and developer productivity for embedded systems. We've supported Risk 5 since 2018. We're experts in critical systems for all industries, but today we're talking about automotive in particular, where our products have been used in hundreds of millions of vehicles since 1993, in applications from deeply embedded MCUs to large and complex MPUs. Our Risk 5 support is the most comprehensive in the industry, with ASIL certified real-time operating systems and virtualization for both MCUs and MPUs, ASIL certified development tools for heterogeneous, multi-core SOCs, and expert services, including device lifecycle management. With our leading Risk 5 processor partners, the combined solution offers compelling platforms for next generation automotive designs. SyFive offers the broadest Risk 5 portfolio of general purpose and safety focused compute processors, from the tiniest MCUs up to the highest performance application processors available in the Risk 5 ecosystem today. We break down our product families in distinct categories, but it should be noted that processor cores from each of these families are being and will continue to be designed into a range of future production vehicle use cases. Starting with the essential series shown in the lower left, these are highly efficient, highly customizable processors, typically for microcontrollers, IoT devices, real-time control, etc. Next in the upper left hand corner are the intelligence series optimized for AI and machine learning acceleration. In the upper right, we have the performance series with industry leading vector processing, hypervisor extensions, and world guard security support for high performance and mixed-criticality applications. And then finally, in the lower right hand corner, the automotive-specific processors offering a range of configurations, split lock, redundancy, and other features for ASLB and ASLD certification. Visit us at sci-fi.com for more information on all of these amazing offerings for automotive applications. Ventana announced Veyron V1 at last year's Risk 5 summit. Don't miss our next-generation product updates at this year's summit on November 7. Competitive with the latest X86 and ARM processors, this is server-class IP featuring high-core-count CPU clusters, a large low-latency iCash, a large physically-sliced L3 cluster cache, comprehensive RAZ with air scrubbers, ground-up micro-architecture, resilient-to-side channel attacks, and a seamless integration within an AMBA CHI-coherent system. Ventana also offers compute chiplets, providing the same seamless CHI integration over ultra-low latency D2D connections. This enables chiplet solutions to approximate monolithic SoCs, but at a much lower complexity cost than time to market. Ventana also provides the necessary Risk 5 system IP components, namely a high-performance IOMMU. This complete IP chiplet portfolio is now being enabled for automotive compute solutions with FUSA and cybersecurity certifications and automotive grade products. Together with partners, Ventana chiplet architecture enables scalable Risk 5 accelerated solutions for cloud-to-automotive applications. Since Ventana's server-class technology is being fully leveraged for automotive, software can be developed on cloud infrastructure and then deployed to similar virtualized automotive platforms supporting mixed criticality. Thank you and we look forward to hearing from you. Today we'll show the benefit of customization on a DQ0 transformation function used on the automotive industries specifically in motor control. Our baseline is the Codeship L31-RES5 3-stage 32-bit core. We have incorporated a Cordic module to compute sine and cosine in fixed point 24-bit representation, enhancing the precision of the calculated ID and IQ values. Additionally, a unique costum instruction was developed for the Clark Park Accelerator to execute two simultaneous floating-point arithmetic operation and culminated a remarkable 17 times improvement on both processing time and power. In conclusion, the costum instruction for the DQ0 transformation function, bolstered by the Cordic module and the Clark Park Accelerator, exemplifies a customization use case approach to support precision in vehicle motor control operations. Thus resulted to faster processing time and reduced power while containing the silicon cost. Imperius provides high quality, fast simulation models for software development and RISC-5 process of verification. We have a base model which matches all of the RISC-5 specification and it's very configurable with over 250 parameters that can choose which extensions are in use and which versions of extensions. We have a well-documented and well-defined API that allows user extension for custom instructions and custom CSRs. When it's used in a DV environment, our solution checks the RTL design state on every instruction retire against the golden reference model and that includes the ability to check asynchronous events such as debug and interrupts. This provides a very powerful way to verify your CPU for all of the architectural state. When our models are used in a virtual platform, we have verification, analysis and profiling tools and the simulator scales from multi-core to many-core including support for heterogeneous simulation. Hello everyone, Cortes, a French Fabulous Simulator manufacturer with four R&D centers in Europe, designs RISC-5 SoC solution from simple MCU to very high-end SoCs. Thanks to our own extensive IP portfolio, which includes processors 32 and 64-bit RISC-5 ISA, digital, analog, mixed signal, RF and security's ISPs, we bring to clients optimization, time-to-market and overall saving cost. ULIS MCU range based on RISC-5 and dedicated for the automotive market is based on four customized platforms, ADAS, networking, chassis and safety, energy management and body control. Today it is 15 billion chips produced with Cortes inside. It is 1.2 billion each year. Cortes can collaborate on any automotive MCU project and bring the highest level of safety and security such as AZIL-B, AZIL-D and ADoSAR. Simply contact me for more information, olivier.demoli.cortes.com. Thank you. It's amazing to see how extensively our ecosystem can support automotive development. If you'd like to explore some other technologies that are available on RISC-5, take a look at the RISC-5 interactive landscape. The landscape shows the rich ecosystem of technologies available today across all computing applications, not just automotive, to enable development on RISC-5 including applications, libraries, infrastructure components, operating systems, hypervisors, design tools, services and implementations. This is part of our efforts to build out the strongest ecosystem to support the development of RISC-5. And now that you've seen the breadth of technologies and expertise in the RISC-5 automotive ecosystem, maybe you might consider joining. RISC-5 has more than 33,820 members across 70 countries. You can see these companies that cover a range of technologies and industries from chips and services to software, cloud to mobile to automotive. Joining RISC-5 offers many benefits. You can accelerate technical traction and insight for your products through immersing your teams with industry thought leaders in our ecosystem. As I mentioned previously, membership enables you to contribute technical priorities, approaches and code to infuse and influence the RISC-5 open deliverables. It also enables you to gain strategic and technical advantage with early insight and access to technical deliverables in motion. Our marketing team helps you increase visibility, leadership and market insight as RISC-5 amplifies member progress across the industry. The membership of RISC-5 allows you to retain, attract, fill and increase engineering skills. RISC-5 engineers are incredibly passionate and engaged in RISC-5, which is a win for their companies. You can build your innovation partner network, supply chain and customer pipeline as an active member within the RISC-5 community and showcase RISC-5 products, services, training and resources on the RISC-5 exchange. And you can deepen, engage and lead in local and industry developer networks with your engineers who engage through meetups, advocacy and the RISC-5 ambassador program. Visit our website RISC-5.org for more information on membership or contact me directly with Andy at RISC-5.org. So to summarize, I hope you can see that RISC-5 and its ecosystem of member companies can address your automotive computing needs. The RISC-5 ISA scales across the whole vehicle from simple low power sensors and actuators to new compute intensive systems like zonal controllers, domain controllers and high performance centralized vehicle compute. RISC-5 delivers scalable performance, highly customizable and tunable at the core level for each individual application. RISC-5 is an extendable standard. The open nature of the RISC-5 standard allows companies to work together to create new technologies required for the future of automotive. Talking the same language, working efficiently together rather than creating fragmented solutions. It enables the development of custom, highly specialized automotive specific extensions to the ISA, enabling features and innovations that other instructions that architectures could not facilitate. The RISC-5 ecosystem is the source of technologies and expertise that can support and enable any automotive compute development, helping solve the problems caused by changing supply chains. This hugely capable collection of companies and organizations covers all the technologies required for future of automotive compute across safety, certified processor cores, IP tools and verification to software components and developer tools. No matter what your automotive compute requirements from sourcing SOCs to developing your own custom silicon, the RISC-5 ecosystem has the technologies that can deliver your future automotive roadmap. If you'd like to find out even more about RISC-5 and what we're doing in automotive, our summit is just around the corner. Taking place in Santa Clara, California from 7th to the 8th of November, RISC-5 Summit is the best place to discover the latest on RISC-5 from around the ecosystem across mobile, data center, AI, IoT and of course automotive. We have an exhibition hall where you can talk to 40 sponsors of the event and find out how they can help with your automotive roadmap. Our schedule of talks includes automotive sessions talking about automotive processor cores, more on virtual platforms from in Paris and the application of RISC-5 extensions to zonal controllers and ISO 26262. Andies will be giving a demo of their functional safety solutions and there will be posters from low risk and Ventana on automotive cores. RISC-5 Summit is an amazing event where the whole ecosystem comes together. We hope to see you there. Okay, so I think it's now time for Q&A. Thank you very much for listening to our webinar. I'm going to be joined by some of my colleagues from across the ecosystem who can answer any questions you might have. So with me I have Olivia Demily from Cortis, Laura Sartori from CodaSIP, Marysel Ventura from CodaSIP, Geoff Maguire from Ventana, Bob Munkman from Sci-5, John Taylor from the Paris, and Robert Redfield from Greenhill Software. If anybody has any questions we'd be very happy to hear from you now. So in the meantime while we're waiting perhaps just pick a couple that came up in the Q&A box. So there's one I see Geoff's reply to online but it might give interest to others as I don't know whether it's public. I'm asking about the intersection of security with the auto and safety seeks. So Geoff do you want to expand on how the working groups fit together? Sure, so the security horizontal group is working on security specifications and they have direct application to automotive and it's an important aspect of automotive platforms that they get certified for cyber security risks. And so we're working towards a more direct interaction between the automotive SIG and the security working groups that are happening at risk 5 to ensure that we're covering all the automotive requirements. Thanks Geoff. So another one's come in asking about virtual risk 5 platforms and I'm happy to take that on with a vested interest. So there are various simulators out there that have virtual platforms available for risk 5 already today. In Paris have solutions through the OVP World website. There are open source solutions from QEMU from Spike and other projects as well. These cover a mix of just standard risk 5 extensions. So you know the standard isa plus base extensions. There are also custom models available from Imperius of many of the semiconductor partner products if you're looking for something more specific. Anything else? Yeah, so there's another one come in which I'll sort of throw throws open to the panel. What are the current trends of development of hardware accelerators using risk 5 architecture? So and similar one asking about developer boards availability. I know that's a popular question. I would say for accelerator for risk 5, this is in demand, in general in demand. And this is one of the trends that we see risk 5 being very strong offering not just CPU compute but also CPU vector GPU compute in England. Anybody like to comment on availability of developer boards? I know there's a plan to have a developer zone at the summit to show off some of what's available. I think you can say that in the risk 5 summit there will be I think around 200 boards. We have around 40 boards in the risk 5 summit developer zone. So come along to find out more about those. We're going to have boards for a range of applications. And also there is on the risk 5 summit website very soon there will be a list of these boards with links where you can find more information about each of them. So yeah, I've looked there. And also I think Bob, we were mentioning during the webinar that some sci-fi boards are being used for things like for development of things like Android and maybe a few other things like automotive grade Linux, right? That's correct. We're one of the reference platforms being introduced into those communities to verify Android and verify Android and verify automotive grade Linux is coming from sci-fi. Great. Thank you. I see we've got another one. John, are you going to answer this? When could we see AutoSar support available 24 or 25? Yeah, I mean, I'd encourage you to talk to your software vendors about that. I mean, I know there's a lot of interest in the industry about this. Again, it kind of ties in with virtual platforms and dev boards availability. Yeah, 24, 25 is probably the sort of time zone. But if you're interested, you know, make sure your vendors know you're interested to create the pull through. I can add to it that there are two types of AutoSar. There's the native AutoSar running on the CPU directly. And there's the adaptive AutoSar that running on POSIX kind of operating system like Linux. The adaptive AutoSar is already running. The native one, I think there is one or two vendors that in progress and the third one probably will follow. So I would expect an announcement coming in next year. Thanks, Eta. So I think we have a question here. How often is the RISC-5 ISA updated? What we could do is if you have a look on our website, there is information about... We have a blog about platforms and profiles. So these platforms and profiles are what RISC-5 used to maintain communication. It's about compatibility and allowing people to be working on the same version of the architecture. So that's how we do that. Yeah, I'll just add to that. In terms of the profiles, they get updated on a yearly basis. And we see like the RISC-5 application profile, RVA-23 is being pretty key for enabling software-defined vehicles. You know, in terms of having a software platform to target a group of extensions and features that are specified in that profile. And we have another question. What would be the roadmap if one wants to be in this field? I'm not sure quite... I mean, the individual members of the CoQ could maybe comment on their roadmaps. We've seen the videos earlier on, but do you have any other points maybe about future roadmaps? I would say something generic. So you can go for each company and see the roadmap. I think we have very aggressive roadmap, both in IP software and SOC. But in generic, the difference of the RISC-5 ecosystem is that the pace of developing of software adoption, the pace of the type of variety of solution, enable the customer to really find the type of solution they are looking both from CPU, ISP, GPU and many types of component that needed for the car. And as an ecosystem, it's developing and adjusting much faster than a single company can address this. I mean, I would also say there's IP products available. And there's already deployed solutions, right? But there's a good variety of IP available to where you can move forward with designs today. And, you know, I would see that there would be a big transition to RISC-5 happening, you know, kind of in the 2026-27 timeframe. I'm sorry that, yeah. Okay, great. Another question, for real-time operating system based on RISC-5, how is performance against dedicated hardware like a safety PLC? In the several ways to address the real-time, you can look on Mobileye doing it using real-time libraries on top of Linux, which is one way using multi-trading to run things in parallel and make sure that there are any time other companies like Valence, for example, using a real-time CPU to address this kind of predictability. And there are many other solutions that we can talk about. Yeah, I mean, I think it's a bit of a how long is a piece of string question. There's so many different RISC-5 solutions out there at different performance points that, you know, there will be some very hard real-time products available. Equally, there's very high performance parts available, so it's hard to make a direct comparison in a sort of conversation like this. Okay, another question, how important is it to reduce the power in terms of watts per CPU in automotive applications and what does RISC-5 do to address this? I would say that it's always important. Today I see actually the challenge of the automotive market is about software size and software complexity, which the profile of RISC-5 address. And I think each part of each company that present here, I represent me, but each company here provides unique solution to different powers or performance targets. So whatever you need, like about something very small to something like big AI or server machine on the wheels, I think you can find a solution in the RISC-5 ecosystem. I think power efficiency is always super important and it applies across different segments that we're addressing Vantana at the very high end. It's critical in servers in that you can put as much compute within a certain whatever your power limit is and automotive would have a different, you know, power limit, but the same principle applies that the more power efficient you are, the more compute you can deliver within a constraint. Thank you. I think we just we have one last question about what, you know, in terms of challenges for RISC-5 and automotive and what do you mean? What are these challenges? It's just it's opportunity, right? There's a huge opportunity for RISC-5 and automotive. Does anybody have any comments on that? Clearly, Pete's going to answer. Maybe I can give an answer. I think one of the challenge is right now, all chips are based on ARM and all the ecosystem, software ecosystem is designed based on ARM. So most of the car makers are all scared about what is the overall cost to switch from ARM to RISC-5. We are all saying to them, it's not a big deal, depend on the language, C language. It's not a big deal. It's just a matter of understanding the application, then we can help every chip vendor provide SDK and full solution, debugers, compilers and so on. So it's not so difficult to switch, but it's a point that scares most of the car makers how to switch from one to another. I'd certainly agree with that. There's more of a perception of RISC than the actual RISC. But I think also the big challenge is time, automotive development does not happen quickly. You know, there's much longer product life cycles than there are in other industries. So that investment needs to be there. It's being developed, but it's not going to happen next month or the month after. And from a software side, we're seeing increased uptake and our development tools, real-time operating systems are ready and are in early adoption. Right, thank you. I think there's maybe a side question. This is like safety one around railway applications, but we can take this. Any RISC by products in the pipeline for railway applications, SIL-2, SIL-4? I don't know if anybody here who has safety related. I can take this. I would say that in general, when we look, historically we do certifications, start with automotive, then do industrial. We also did medical. And what we, today the most challenging is the automotive, the process is the most strict. But we have options. We also achieved that we did for SpaceX that have the space restriction. And I think other company RISC-5 also did something similar. So I think it's a level of process to take the automotive to aggressive to other areas. We work with ResilTech. And I think there are a few other companies, TUV and so forth, that have the experience to do this transition or this certification. Any other questions? We don't have anything else. If anybody wants to shoot a quick question over, you can answer it. Okay. Well, I don't see any other questions. So I might just bring this to a close now. Thank you to my panelists here for all their expertise and for answering all the questions. Thank you to everybody attending for your time. And this webinar will be going up on the Linux Foundation webinar websites. And if anybody wants to follow up on anything that you've, you know, that you've heard about today, please contact me personally. Andy Moore and my contact is Andy at RISC-5.org. And so I just hand back to Candice. Thank you so much everyone for your time today. And thank you to our audience for joining us. As a reminder, this recording will be on the Linux Foundation's YouTube page later today. We hope you join us for future webinars and have a wonderful day. Thank you.