 In the last lecture that is the 8th lecture we had introduced to you the important active device the op amp. The nullator narrator model for the op amp also was discussed in terms of ideal amplifier one of the 4 voltage current trans conductance or trans resistance amplifier with transfer function for finite output going to infinity all of which result in the same ideal op amp. The nullator narrator model then was used for synthesizing a variety of amplifiers ideal amplifiers unity gain buffers then gain with again greater than 1 trans conductance amplifier and trans resistance amplifier. Then we have started with simulation in today's lecture will be explaining to you the significance of modeling the op amp for simulation purposes. The ideal op amp has to be converted to something that is practical enough to let us simulate the near ideal amplifier op amp. So one way of simulating it is to use an amplifier voltage amplifier or current amplifier with very high gain. Trans conductance or trans resistance amplifiers also with very high values for the trans conductance or trans resistance could also be used in association with load. They will mean also in terms of voltage gain or current gain. So today let us therefore start with the synthesized amplifiers how they can be simulated. This is lecture 9. Further it will also deal with instrumentation amplifier which is one of the important front end of most of the instrumentation systems of today. Then significance of symmetry in signal processing will be brought out while synthesizing the instrumentation amplifier. After that we will introduce you to another important component that is comparator okay and comparator applications will be given as examples. So let us proceed with lecture 9 continuation of electronic devices for analog circuits. The ahh this circuit was synthesized by us as a voltage amplifier with gain greater than 1. This you had already seen in the lecture 8. So we have voltage control voltage source which means series at the input as far as nullator is concerned and shunt at the output as far as narrator is concerned. This is capable of giving a voltage gain of 1 plus R2 over R1. So this is a ideal voltage amplifier with that gain. Now how to introduce a macro model. A macro model is something that is to be understood by every design engineer. So now we are bringing in the first non-ideality in this ideal of amp. Gain is not infinity but very high. So such a high gain amplifier can be thought of in terms of voltage controlled voltage source with gain A of the order of in this example we have taken it as 10 to power 4 for simulation purposes. So this is an operational voltage amplifiers term okay and where the gain is made very high voltage gain is made very high. If such an amplifier is used for synthesis now we analyze this circuit using such a voltage control voltage source with gain A then the obviously if you write down the kichoff's loop and node equations you will get V0 over Vs in this as 1 plus R2 over R1 divided by this is the ideal gain 1 plus non-ideality this is the error due to A being non-infinite. So if A is infinity this goes to 0 and it comes down to the ideal amplification. Next will be designing a current amplifier with this kind of operational voltage amplifier model. So the nullator-nullator model for the current amplifier is the nullator comes in shunt norator comes in series and we have seen how we get a current gain output by input current of 1 plus R1 by R2 with the negative sign. Now what happens when such nullator-nullator is replaced by voltage controlled voltage source is seen here. Then I2 by I1 now becomes minus 1 plus R1 by R2 the ideal value plus 1 over A error in the numerator divided by 1 plus 1 plus RL by R2 into 1 over A again the error term dependent upon the load resistance. So this vanishes the error vanishes as soon as A goes to infinity and becomes the whole thing becomes 1 plus R1 by R2 the ideal value. So the same model is being used for nullator-nullator pair okay throughout these examples you can also replace this model by current control current sources source and test out the expressions and you will get similar expressions okay in terms of the transfer function being dependent upon A and that factor dependent upon A is the error term. Now this is a transconduct and amplifier voltage control current source synthesized using nullator-nullator pairs and now this is replaced by again voltage control voltage source and you will see that I0 dependence on VI is going to be modified by this A factor in the following way. And A is then to infinity will make it become ideal as follows minus GF into VI now all these things one point I would like to bring out if I had connected this voltage source the other way that is the only other possibility what would have happened in all these expressions is that this would have turned as minus A and this would have become minus A instead of plus A and that can result in a situation where the denominator polynomial of this for finite A can go to infinity 0 and the whole expression can go to infinity that is unstable that is called positive feedback whereas in this case this is giving you an expression where the A for any real value of A this is going to be always ahh remaining okay ahh close to the ideal value and there is no possibility of it going to ahh sort of infinity that is in negative feedback. More about this negative feedback as distinctly different from positive feedback is going to be brought out when we discussed this at system level later in the ahh next chapter. Now trans resistance amplifier is the last one that is to be worked out this is the synthesized block where no later comes in shunt no later comes in shunt and we have the trans resistance which is RF – RF okay and ideal value and what happens to it when it is replaced by voltage control voltage source this way again we get V naught dependence upon the ideal transfer divided by 1 plus 1 over A and 8 infinity will make it the ideal value okay. So this is how we can actually ahh sort of this whole thing has been simulated ahh for two examples first two examples that is voltage amplifier and current amplifier okay and we have the results of simulation okay that can be shown later okay. Now we are going to see how a positive resistance can be ahh simulated this is looking ridiculous because positive resistance is already in existence okay why should we simulate it using a resistance. Now we have synthesized a trans conductor okay voltage controlled current source here and this current at the output instead of going into the load okay can come into the input this way. So VI gets transferred now you put two nullators in series so that this voltage source is isolated from the load because of the nullators they do not draw any current this is the way ahh floating ahh resistance can be simulated right. So this current now can be made to flow from the source by connecting a nullator this is the total trans conductor where the output of the trans conductor differential trans conductor is going back to the input this way. What happens to the differential trans conductor it gets transformed to one port which is a positive conductance of GF magnitude because VI sees a current being drawn which is GF into VI so it is a positive resistance. Now let us see what actually happens because of this this narrator comes in shunt with this nullator so nullator norator in shunt will result in a short circuit why because this norator will permit any current to pass through it and nullator will maintain zero voltage across it is the characteristic of a short circuit okay. Now what is an open circuit which is a dual of this any voltage can be sustained across these two terminals because of the norator coming in series with the nullator okay. So any voltage comes across the norator because nullator voltage is zero and nullator does not permit any current to pass through it that is the characteristic of an open circuit. We will see later how this concept of short circuit or circuit ahh become pretty important for us in synthesis. Now I am using the transfer of voltage from input to the output port by using two nullators in series. So the influence of this VI is felt at this output in terms of generating a current here you can see a current gets generated here which is going to flow this way which is GF into VI and that current is now going to flow we earlier let that current flow okay out of the source VI now we are going to pump it into the source VI okay this way. So what happens instead of seeing GF into VI as the current it is seeing minus GF into VI as current it is flowing into the source so it is simulating a negative conductance of magnitude GF right. So we will let us see how this can be used in synthesizing oscillators etc or for compensating for losses. So now we are coming to an important concept okay as a front end of most of the instrumentation systems instrumentation amplifier. So what is it are we exposed to this the concept is very clear here this is a structure which is perfectly symmetric okay symmetry here is exploited okay to obtain improvement in signal to noise ratio if signal is appearing as differential and noise is appearing as common mode this is something that can reject the common mode and accept the differential mode. We have earlier been exposed to analog gate a diode multiplexer which you would have seen is nothing but a bridge diode circuit which when biased this way by current conducts okay and makes it as a short circuit okay these are the two diode pairs here D1 D2 and this is D3 and D4. So current will be flowing through this forward biasing the diode and making them appear as short and that by linking the source okay to the load. So the common mode point okay is getting connected to this load so that this differential mode operation of the diode bridge by applying positive voltage here and negative voltage here and equal resistors at these two points for controlling the current okay. So the current flows through this and this DC current biasing the diode is rejected at the output so no pedestal effect is seen that means actually this current has no output appearing at the common mode this DC current because it is a symmetric structure appearing as differential. So here it is rejecting the differential current okay that is getting applied okay and accepting the common mode voltage from here to here connecting it up when you apply minus Vn here and plus Vn here again symmetric all this diodes get open because they are reverse piles okay and therefore they get opened okay they get opened and this input gets delinked from the load okay this is the operation of the multiplexer which is important. Now it is the opposite kind in a instrumentation amplifier we have a common mode which is appearing as bias voltage or current okay which is getting rejected and differential mode getting accepted and getting amplified and that is because of the symmetry and symmetry is an important property okay with IC design okay there is something that can be fairly easily achieved okay in ICs by using matched geometries okay. So this concept is used for synthesis of instrumentation amplifier function let us see how this synthesis can be carried out now. We have 2 voltages V1 and V2 getting applied okay through the nullators in order to prevent current being drawn from these 2 voltages in order to prevent loading of these that is an important concept of instrumentation amplifier this instrumentation amplifier is going to be used for example in a bridge kind of configuration for the transducers like strain gauges in such situation that bridge when it is balanced will comprise of equal resistances right. So and it will have these 2 voltages becoming same that means that will be a common mode voltage which you do not want to cause any effect at the output of the amplifier. So when it is not balanced it produces a differential signal and that alone has to be amplified. So we want to reject the common mode signal of the bridge okay which if the bridge is supplied by supply voltage okay of VS, VS by 2 may be the common mode voltage and the small variation in the bridge okay resulting due to transducer functioning okay then that will appear as differential mode. This we had already seen in the beginning of the course how such a bridge can generate a differential mode signal and there is a common mode okay which is predominantly appearing along with the differential mode signal how to reject that common mode is what we are discussing here. So that means that bridge balance did not be disturbed by anything that is getting connected to it. So it should be a voltage control device and it should be symmetric. So we have put 2 nullators that way. So what happens is this particular voltage will be simply V1 and this will be V2 and the current in this differential resistance at the input okay is going to be V1 – V2 by RDI and this current okay is going to be influenced by some current which is due to primarily this voltage appearing here V1. So this current is going to be V1 by RCI. So if this resistance is very large okay compared to this resistance which is small let us say selected then this current differential mode current can be increased and the common mode current can be decreased. For example if this is infinity there is no common mode current at all drawn from here. So the resultant current in the narrator will be only due to the differential mode signal. So I am not able to fix the common mode impedance okay related to the differential mode impedance in such a manner that this dominates and this is made to get reduced. So that is why am able to sort of make it predominantly depend upon the differential mode resistance. So this current therefore is going to be V1 by RCI plus V1 – V2 by RDI and this will flow through another symmetric structure at this point. Let us look at the thing from the other end. This voltage V1 V2 is going to be transferred to this node as V2. So this current again is similarly only determined by V2 alone as RCI. Let us say these two are exactly same because it is requiring a symmetric network I said. So this is the only thing which can be anything different from these two. So again this can be made to be very small compared to this current. So essentially the current in this circulating current now you can see which is predominantly determined by V1 – V2 by RDI this way and this current is going to be – V2 by RCI. So this is very small component. This also is very small component. This is only decided by V2 okay and this is decided by V1. So and there is a common mode component in it. So that can be reduced considerably. Now the circulating current in this is going to be this current here is V1 – V2 by RDI this current here is V1 – V2 by RDI that means this is also V1 – V2 by RDI closing loop here this also must have a component of V1 – V2 by RDI. So the circulating current of V1 – V2 by RDI depends only on the differential mode voltage V1 – V2 okay and it can be if the common mode resistance okay is finite this common mode current alone okay common mode current means whatever is dependent only on V1 or V2 will form a common mode current and that alone will produce some output okay due to RCO okay RDO has no effect on common mode gain okay. So only RCO at these two points will have an influence on common mode gain because of the current flowing which is V2 by RCI and V1 by RCI. So the as long as this particular RCI RCI here is much greater than RCO the voltage gain of the common mode can be kept to be very small. In fact we can therefore show that the common mode gain of this is simply RCO by RCI because when V1 is equal to V2 only common mode voltage exist which is equal to VC let us say so V1 equal to V2 equal to only common mode voltage then there is no current in this okay current of VC by RCI flows here and VC by RCI flows there and that current gets circulated in this loop this way okay in this loop this way okay and developing corresponding voltage which is inverse of the common mode voltage into RCO by RCI. So what we get is okay at the output okay the common mode voltage at the output okay which is this plus this divided by 2 is nothing but minus RCO by RCI into the common mode voltage right. So that is why this is called as the common mode gain. Now as far as the differential mode is concerned okay that is going to be essentially decided by RDI getting centered by 2 RCI okay that is the effective differential mode input resistance and at the output that differential current is going to flow through RDO parallel to RCO okay if these resistances are much greater than this and these are much greater than this effectively the differential mode gain is approximately equal to okay this RDO right. So there is a common mode rejection ratio which is nothing but AD by AC AD by okay CMRR equals AD by AC. So this can be made as high as you please okay this is the beauty of the sort of differential mode instrumentation amplifier okay okay this whole thing can be simulated with let us say V1 is the common mode voltage plus that is 50 hertz and this is 10 times 50 hertz 500 hertz 0.5 of this 500 hertz component this is again 1 volt common mode voltage okay peak 1 volt 50 hertz and minus 0.5 okay of 500 hertz. So V1 is equal to VC plus VD by 2 V2 is equal to VC minus VD by 2 because we know VC is V1 plus V2 by 2 this is V1 minus V2 by 2 this is V1 plus V2 by 2 again and this is minus V1 minus V2 by 2 okay. Now I have chosen as this resistance 100 ohms which is much lower than this resistance which is 100K. So this is essentially dominating in determining the differential mode current which is V1 minus V2 by RDI. So we have this circulating current flowing through this and developing a voltage which is RDO times VD divided by RDI as the differential output voltage. Half of it will appear as V not 1 and half of the negative sign will appear as V not 2 okay. So the differential output is really double these values in magnitude. So this is what we will be simulating okay and this is the simulation result. So you see that this is 10 times this frequency this is the common mode voltage which is 1 volt which is very nearly replaced to use as 1 volt okay we have applied as 1 volt okay and the differential mode voltage which is again 1 volt 0.5 on one side and minus 0.5 on the other side but frequency is different. So we have half of it appearing okay 50 times that appearing okay at one output and minus 50 times that appearing at the other output forming 100 times that appearing as differential okay that is because of the fact that RDO is 100 times RDI. So we have nearly obtained the gain as about 100 differential mode gain as 100 common mode gain is 1 okay actual differential mode gain is going to be 1 plus 2 times that is 10 K divided by 100 ohms which is going to be this 201 okay okay and this is going to be the case with the another amplifier which is a voltage operational voltage amplifier as far as instrumentation amplifier is concerned the other case it is going to be nearly equal to RDO which is 10 K divided by 100 ohms which is about 100 as far as the gain is concerned okay slightly less than 100 okay and this is going to be the gain in this case and we will see another topology which will give a gain which is 2 times that okay using operational voltage amplifier this is the gain for operational instrumentation amplifier using trans conductance differential trans conductor. So we can see that this is the stage I am mentioning here what has been done is earlier we had the narrator in series so it is really a voltage getting converted to current which is injected on to the load right and then develops the what is that voltage here instead of having the 10 K connected as the load and then a common mode resistance here and here that common mode resistance of let us say 10 K is put here let us see in series with this 100 ohms so whatever current is flowing in this is made to flow through this so therefore this differential current that is flowing here will produce higher voltage drop across this by an amount 10 K by 100. So the same current is going to also flow through this like this so it will be producing a negative of that voltage here there will be a positive voltage so effectively it will produce double the voltage here right so this particular instrumentation amplifier is an operational voltage amplifier converted as an instrumentation amplifier because the narrator is coming in shunt at the output the narrator comes in series with it. So the gain of this is what I gave as 201 differential mode gain this is the idea of this so other one is nearly equal to 100 okay. So again the common mode gain here is also equal to 1 just as the other case that is because when these 2 voltages are equal there is no current in this so this is equal to VC this is also equal to VC that VC gets transferred to this okay and the potential at this point because there is no drop in this because there is no current in this okay this whole potential will get transferred to this as VC and this also will be VC. So the common mode gain is nothing but 1 okay so the CMRR in this case is equal to 201 okay divided by so this instrumentation amplifier is one of the most of used front end in an instrumentation set up. So that is getting simulated here again I can show you the simulation this is the voltage controlled voltage source instrumentation amplifier using the voltage controlled voltage source type of topology and this is the simulation result you can see that the common mode voltage is 1 volt and the differential mode voltage at single ended output is nearly 100 times the common mode the differential mode input and this is phase reversed 180 degree that means differential output if you take it will be 200 times the input roughly. Now we are coming to the next important block that is modeling of op amp macro model what is a macro model we have op amps making use of huge number of active devices like transistors MOS or bipolar and maybe some passive components. However we would not like to model the op amp for most of the system level analysis using the micro model for the individual transistors and the models for the passive components that will make it too complicated and consume too much amount of time without getting us any insight of the actual performance of the system. So in order to facilitate is the understanding of working of these systems using ICs like op amps it is required to build the capability of judging what parameter of the op amp has to be considered in simulation. Now that is what is called a macro model so that macro model is something that the design engineer must know about and every IC manufacturer should give the macro model of his IC that he is proposing as a general purpose IC and most of the IC manufacturers do that to represent the input output property of the device fairly accurately taking the considerations all the non ideal effects of the devices within. So it should only represent the equivalent at the input and the output and the transfer that means it is going to be modeled as a two port block which may use other electronic components for simulation purposes which can quickly simulate the entire op amp okay characteristic without going into the micro model level. Macro model level is hardly used by design engineers okay except in validating the macro model okay. So what is this macro model that I am talking about macro model of an op amp the first level macro model that we used in synthesis please understand we have to use the simplest of all models that is the nullator nullator model that means the op amp is a device to be used embedded in a network of resistors and capacitors and other elements and its output okay divided by the transfer parameter is always equal to 0 making the input have 0 voltage and 0 current that is the nullator. Nullator can sustain any output voltage and current at the op that nullator nullator model is very useful in synthesizing any circuit using an active device. So second level model is for simulation purposes what should we do in order to model this ideal op amp obviously the first not ideality that we should bring in is the gain has been assumed to be infinity so what is very nearly infinity maybe something like 10 to power 4 okay if you put you can see that it is nearly replicating the ideal op amp okay characteristic. So that is the model that you can use with very few nodes in the structure that means two input terminals two output terminals one of it may be the common ground okay and we have the device put between these two terminals one at the input as some finite impedance and one at the output as a voltage dependent voltage source okay with the gain from input to output it may be large current gain or voltage gain it does not matter. Third level of modeling is where finite high gain current or voltage amplifier with attenuation of 20 decibels per decade that is frequency dependence of this gain right. So what does this frequency dependence make the circuit become okay what are the limitations of this frequency dependence of gain okay. So these are the things that we have to consider it is the bandwidth of the amplifier the gain into bandwidth we will later see is an important factor of the op amp that not only facilities easy simulation of practical circuits but also gives us what is superior op amp the one that has higher gain bandwidth product this will realize later when applying these models in variety of applications. But these are the important factors which we should first consider before taking in other non idealities other non idealities may be taken into account depending upon okay applications okay instead of the gain being just dependent upon 20 decibels per decade gain can go for certain range of frequency set 20 decibels certain other range it can go at value greater than 20 decibels that is 40 decibels then 60 decibels so on okay. So 20 decibels 40 decibels per decade and then may be 60 decibels per decade this may lead us to lot of complications in using this amplifier okay. So we have to judge very carefully as to when we have to complicate the model okay and fifth level model for example can bring in a limited power supply at the output as one of the constraints okay. Then higher level macro models can be generated incorporating input offset which may be of the order of few millivolts output current which may be of the order of tens of milliamperes as we have seen all these in the specifications of the op amps earlier slow rate which may be of the order of few volts per microsecond and higher order frequency dependence of gain that is more number of poles okay in the amplifier gain causing decrease in gain as frequency increases. Now this is the macro model that one could use and you will see that there is no ahh sort of equivalence in terms of the actual circuit of the op amp it is just representing the input output and the transfer characteristics input may be limited by finite input resistance and output source may have a finite output resistance. This is a voltage controlled voltage source of a DC gain of 10 to power 4 I have used okay and I have put a resistance in ahh okay series with the capacitance and voltage is taken across the capacitance to represent the 20 dB okay fall off which is the dominant pole of the op amp okay and this brings out about a bandwidth limitation for the op amp and what is important is nothing but the gain into bandwidth. So gain into bandwidth product is made very nearly same as about 3 megahertz in this case by selecting these components okay properly okay that is this cut off frequency is 1 over 2 pi RC okay that into the DC gain should be equal to 3 megahertz that is how these component values have been chosen. So ahh there is nothing sacred about these values I can make it 10K and reduce the capacitance by half okay and even then it represents the same micro model. So it is the RC time constant which is important the values of R and C by themselves are not significant okay. So and the limitation due to the supply voltage of let us say 10 volts is brought about by ZENUS connected back to back this way and this kind of arrangement is not there inside the op amp limiting it is because of the power supply that this limitation exist that has been created artificially by using ZENU components for simulation purposes. Now the here from here to here this voltage is brought about here as a voltage control voltage source of gain equal to 1 VI dash here comes here as VI dash across the capacitor and that is output it okay through an output resistance. This is a very simple macro model which can bring about lot of effects of non-idealities like finite gain bandwidth product effect limitations of the supply voltage etc. So if you want for example for low frequency application ahh where the input offset drift is going to matter it will mix with the signal. So there the input offset effect can also be included as a voltage source at the input. So current limitation has not been put here so we can have a current limiter at the output. So the whole voltage source okay with the series resistance R is turned into a constant current source at the output because of the current limitation that can be brought about by a another circuit here. So we can complicate the model depending upon the application of the model in ahh different applications. So we will see this kind of ahh effect of the model as we go into variety of applications later. But it is important that you should use ahh not the most complicated model offered by the manufacturer but take the relevant ahh properties that represent ahh sort of most important non-ideality for that application. Now we are going to discuss the next component that is the comparator. Comparator that is a common tendency on the part of IC user to use the op amp itself as the comparator. Comparator is for a different application compared to the op amp. Op amp is always used okay in an application where it is used in feedback that is output is linked to the input making the input become an elevator. So whereas comparators are mostly used in open loop topologies output is not going to have any link with the input okay directly. Comparator is an interface component it is input is analog and output is digital that means it is either high or low. There is no business for the comparator to remain anywhere in between high and low. It is going to go through the stage of high to low or low to high okay only when it is transiting okay. Otherwise it is ahh output is read as either high or low. It is a one bit analog to digital converter that means since it is getting input as analog and output is either high or low one digital one or digital zero it is nothing but a one bit single bit A to D converter. The output changes state when the input voltage crosses a reference value. Let us look at the model for the op ahh the comparator. Voltage comparator for example looks like this it is it can use the same symbol as the op amp but the internal construction is totally different amplification is not an important ahh criteria associated with the ahh comparator. Comparator has to change state as quickly as possible going through what is called the active region where it is acting as an ahh nalator norator pair okay. Going into what is called saturation region either high or low these are the saturation regions. So ideal op amp is having a characteristic like this we saw in the earlier lecture. So it is having no limitation in the output. However in practice there is a limitation in the output that we saw power supply limitation. So it is essentially possible for the op amp to be used as a comparator but it is designed to work in the active region where it is having very high gain okay. However the comparator normally has steady state either this low or high. Its job is to rise as quickly as possible from low to high or fall from high to low as quickly. These are measured in terms of rise time and fall time okay. So and what is called delay time how much time it takes for this change to be recognized at the output. So when VI is equal to be reference it is changing state from low to high or high to low. This is called a voltage comparator whereas that means for VI which is greater than V reference output is let us say plus okay 10 volts if it is 10 volts is the supply and when VI is less than V reference output is minus V reference okay. So here same thing can be viewed in terms of current getting compared. If you have current coming in as IR reference and II is the input current then what happens here is that this current if it exceeds this current there is a build up of potential here okay and this goes to positive saturation okay. If this current is less than this current then this becomes negative decreases in potential and this goes to negative saturation. So this is called a current comparator. So again we come up with the proposal that ideal comparator so they have infinite gain so that the slope here is indicating gain okay delta V naught by delta VI okay it is infinity slope here. However it may have an offset voltage this is non-ideality that means it may not exactly transit at VI is equal to V reference but there is an error voltage DC voltage offset because of asymmetry this offset comes about because of asymmetry of structures inside okay. So we do not want to know how it comes about by what device but there is going to be typically offset of the order of few millivolts that we saw okay and therefore there can be an error this is unknown okay or this is varying with temperature okay. So what happens apart from this we have later we will see that the gain may not be infinity gain is finite okay. So it has saturation states and the gain is finite it may not be all that linear as shown here but for a first degree approximation I can say it is linear right. Then what is this voltage this voltage at the input for me required for me to change the state from one to the other is going to be VU – VL divided by the slope here A okay that is also a region of uncertainty because it is neither high nor low somewhere in between that can be anything okay. So this is a region of error that is offset and this is again a region of error in effect we have the total effect that can be taken into account in terms of offset okay as VI offset plus VU – VL by NR input referred offset this is called this should be as close to 0 as possible that is achieved mainly by making it look symmetric okay inside structure and this gain has to be pretty high. So this is going to be the limitation of commercial comparators we can therefore look at one of the this we have already discussed yeah this is one of the commercial comparators available which is one of the popular ones LM 311 pretty cheap okay 20 cents also and it has the operating supply voltage range anywhere from 3.5 to 30 volts rice time you can look at this rice time and fault time 150 nanoseconds that is what is important unlike the gain bandwidth product which is an important criteria for judging the op amp here the rice time is important common mode input voltage this is the reference voltage can range anywhere from okay because it is around the reference voltage that the change of state occurs from minus to plus or plus to minus. So that is the common mode voltage that we are capable of using it for input offset voltage 7.5 millivolts you can see in the order input offset current because this offset current can flow through source impedances and develop offset voltages okay input bias current again this might result in offset voltage at the input. So all these points bring about offset voltage effects okay depending upon the source impedance through which this bias currents flow. So these things become important in comparator rather than the slow rate gain bandwidth product they are nowhere to be seen here. So please remember that the comparator is built only for the purpose of mixed mode application for which it has to be used. Now we will look at the application of the comparator in one of the important applications okay duty cycle generator. Let us understand what this means let us apply a triangular wave as VI with a peak value of VP and time period as T. Now this is applied as VI to the comparator and V reference is 2.5 for this example. So what happens whenever the triangular waveform rises above V reference that is during this duration okay the output is to be plus 10 because it is going greater than V reference and whenever it is in this region where input is less than V reference output is minus 10. So this particular output gets generated at the output of the comparator which is nothing but the rectangular view with if you say that at plus 10 volts it is doing some duty of switching on a lamp let us say. And at minus 10 volts okay it is switching off a lamp this is called the duty cycle that is Thao divided by T periodically it is getting switched on for this duration and switched off for this duration of T minus Thao again it is getting switched off. So this is called duty cycle Thao by T is the duty cycle. Now how do you obtain Thao by T these 2 are similar triangles ABC and ADE. So height of this divided by height of this is equal to base of this divided by base of this that is the property. So what is the height 5 minus 5 minus 2.5 is the height of the smaller triangle divided by 5 let the height of the bigger triangle is equal to this width base width Thao divided by T by 2 at the other base width this one. So this gives you Thao by T as half into 1 minus V reference by VP and if V reference is 2.5 VP is 5 this is 1 by 4. So this is simulated here and you can see that it is roughly equal to 1 by 4 of the time period. This rise time is finite because I am using let us say in op amp this caution do not do just for demonstration I am using this okay and this is rising at this low rate that is why it is taking finite amount of time otherwise it would have been a sharp edge okay. So for 2.5 it is this and simulation we can do so this is simulated right and we can go to the next one I change V reference to minus 2.5 and Thao by T is equal to 3 by 4 analytically we got and in simulation also we are getting it that way. So this is now working for a larger duration compared to not working so that is 3 by 4. So this pulse width modulator or beauty cycle generator has a variety of application it is used in for example pulse width modulator is used in DC to DC converters and then switched mode power supplies okay primarily to convert one DC to another DC efficiently switched mode power supplies and class D power amplifiers. So in today's class we have discussed important aspects of macro modeling the op amp for simulation okay of op amp and all the synthesized amplifiers were analyzed using one of the macro models simplest macro models that we could think of that is voltage control voltage source. Then we discussed about instrumentation amplifier two kinds one is a trans conductor type another is operational voltage amplifier type okay the third one is the comparator and its application as duty cycle generator. So in the next class we will be discussing more number of active devices like multipliers, JFETs, MOSFETs and bipolar transistors.