Upload

Loading...

Intel 80-Core Teraflop Research Chip

31,228

Loading...

Loading...

Transcript

The interactive transcript could not be loaded.

Loading...

Loading...

Rating is available when the video has been rented.
This feature is not available right now. Please try again later.
Uploaded on Feb 13, 2007

Advancing Multi-Core Technology into the Tera-scale Era




The Teraflops Research Chip is the latest development from the Intel® Tera-scale Computing Research Program. This chip is Intel's first silicon tera-scale research prototype. It is the first programmable chip to deliver more than one trillion floating point operations per second (1 Teraflops) of performance while consuming very little power. This research project focuses on exploring new, energy--efficient designs for future multi--core chips, as well as approaches to interconnect and core--to--core communications. The research chip implements 80 simple cores, each containing two programmable floating point engines—the most ever to be integrated on a single chip. Floating point engines are used for accurate calculations, such as for graphics as well as financial and scientific modeling. In terms of circuit design, they are more complex than integer engines, which just process instructions.

Intel's Teraflops Research Chip implements several innovations for multi-core architectures: * Rapid design -- The tiled--design approach allows designers to use smaller cores that can easily be repeated across the chip. A single--core chip of this size (100 million transistors) would take roughly twice as long and twice as many people to design. * Network on a chip -- In addition to the compute element, each core contains a 5--port messaging passing router. These are connected in a 2D mesh network that implement message--passing. This mesh interconnect scheme could prove much more scalable than today's multi--core chip interconnects, allowing for better communications between the cores and delivering more processor performance. * Fine--grain power management -- The individual compute engines and data routers in each core can be activated or put to sleep based on the performance required by the application a person is running. In addition, new circuit techniques give the chip world--class power efficiency—1 teraflops requires only 62W, comparable to desktop processors sold today. * And other innovations -- Such as sleep transistors, mesochronous clocking, and clock gating.

Loading...

When autoplay is enabled, a suggested video will automatically play next.

Up Next


to add this to Watch Later

Add to

Loading playlists...