 Hello dear learners, I am Antora Mahontoborva, Assistant Professor, Discipline of Electronics. In this video class, we shall discuss about some sequential logic circuits, which is included in the digital technique paper of first semester PCA program. In our previous video class, we have discussed about the combinational logic circuits. We came to know that all the digital circuits are categorized into two types. One is combinational logic circuits and the other is sequential logic circuits. In combinational logic circuits, the output at any instance depends on the input at that instance. We have already discussed about the encoder, decoder, multiplexer, demultiplexer, adder, all these combinational logic circuits. And about the subtractor, today we shall also discuss about the subtractor before going to the details of the combinational logic circuits. So the subtractor, similar to the adder, the subtractor also classified as two types. One is half a subtractor and other is a full subtractor. Now let us first discuss about half subtractor. We know the rules of binary subtraction as 0 minus 0, it is a 0, then 0 minus 1, it is 1, that means 1 borrow, then 1 minus 0 is 1, then 1 minus 1 is 1. So this is the subtraction rule in binary subtraction rule. So in case of half adder, first let us see the block diagram of half adder. It has two inputs, suppose A and B and two outputs, that is D i and B 0. So this is the half subtractor. So what is D i? D i is the difference output and B 0 it is the borrow output. And if we see the truth table, suppose these are the inputs A and B and outputs are D i and B 0. This is the difference and this B 0 is the borrow. So for the two inputs, the four possible combinations are 0 0, 0 1, 1 0, then 1 1. So from this difference binary subtraction rule, so difference for 0 0, 0 0 is 0. So there is no borrow so borrow is 0. For the second case 0 minus 1, so 0 minus 1 the difference is 1 and there is a 1 borrow so it is 1. For the third case 1 minus 0, that means 1 minus 0 difference is 1 so it is 1, no borrow so 0. And for the fourth combination 1 minus 1, the difference is 1 and the borrow is 0. So this is the truth table for half subtractor. So next we shall see the logic circuit for the half subtractor. So two gates are used, so this output is D i and this is a B 0. So two inputs A and B, so these are the two inputs A and B and the inputs of the N gate that is where the output is B 0, the inputs are A bar that means a north gate is applied and another is B. So what are the Boolean expression for the half subtractor? For difference output the Boolean expression is similar to the half adder that we have discussed already discussed. So this is the expression for D i that means difference output and for the other output B 0 A bar dot B equal to B 0. So this is the Boolean expression for the borrow output. So till now what we have seen first we have see the half adder, half subtractor. So in half subtractor there are two inputs suppose A and B and two outputs one is difference and other is the borrow and this is the truth table for the half subtractor and this is the logic circuit diagram for the half subtractor. So this is the diagram of full subtractor and this is the logic circuit diagram for full subtractor. In case of full subtractor there are three input bits and two output bits similar to the full adder. Here the two input bits that is A and B means one input is subtracted from the other inputs and the third input is a borrow of the previous stage. That means borrow from the previous stage that is the third input for full subtractor. And there are two outputs one is difference and other is the borrow output. Now let us see the truth table for full subtractor. There are three inputs that is A, B and other is the borrow input. That means it is the borrow of the previous stage and the two outputs that is DI difference and the borrow output. So for the three inputs the eight possible combinations are 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 0, 0, 1, 0, 1, 0 and 1, 1, 1. So now let us see the difference in output. So first all are 0 so difference is 0. There is no borrow so borrow is 0. Next 0 minus 0 is 0 then 0 minus 1 so here difference is 1 borrow is 1. Next 0 minus 1 from the law of binary subtraction. 0 minus 1 is 1 then 1 minus 0 is 1 so here 0 minus 1 there is borrow 1 so B output is 1. Next 0 minus 1 that is difference is 1 borrow is 1 so borrow 1 then 1 minus 1 that is 0 so difference is 0. Next 1 minus 0 that is 1 again 1 minus 0 that is 1 so borrow is 0. Next 1 minus 0 that is 1 again 1 minus 1 is 0 so borrow is 0 then 1 minus 1 that is 0 then 1 minus 1 that is 0 and 0 minus 0 is 0 so borrow is 0 and the last case that is 1 minus 1 is 0 then 0 minus 1 is 1 and borrow 1 so this is the truth table for full subtractor. Now we have discussed about the subtractor combinational circuit here the full adder there are in the logic circuit there are 2 half adder circuits are there so this is 1 half adder circuit and this is the another half adder circuits as there are 3 inputs one is A B another is borrow input that is from the previous borrow and the for the first half subtractor the output difference output is applied to the input and the borrow output these are added by using a OR gate to get a final borrow output so these are all about combinational circuits now we shall discuss about sequential logic circuit so now we shall discuss about sequential logic circuit in sequential logic circuit there is a memory element why it is used because the output of sequential logic circuit depends on the present input as well as also the past output so let us see the block diagram of sequential logic circuit so here there is a memory element which is connected to the combinational logic circuit to form a feedback path as the output of the output of the sequential logic circuit depends on the present input as well as the past output so what is this memory element so memory element is a device which stores the binary information and when the memory element stores 1 bit of binary information is 1 bit that is called the flip flop or latches now we shall discuss about the different types of sequential logic circuit so sequential logic circuits are of two types one is synchronous sequential circuit and other is the asynchronous sequential logic circuit so now what is synchronous logic circuit the synchronous logic circuit is it depends on the clock pulse that means the clock pulse it is a signal which consists two states that means 0 and 1 that means the clock signal and in the clock pulse when there is a transition from 0 to 1 so this is it is called leading edge or a positive edge that means there is a transition from 0 to 1 and when there is a transition from high to low that is 1 to 0 here 1 to 0 then this edge is called trading or negative edge and the time during the transition of 0 to 1 then this time is called enable and the transition from 1 to 0 that means high to low that is called the sequence of synchronous sequential logic circuit the output is changes the state is changes during the transition either from 0 to 1 or 1 to 0 so that circuits are called sequential logic circuits and next is the asynchronous logic circuits that means in asynchronous logic circuits there is a no clock pulse clock signals and this asynchronous logic circuits it is a simply a combinational logic circuits with the feedback that means with the memory element now latches or flip flop so latches means it is a memory element it is a device which stores the 1 bit of information latches and flip flops are similar but the only difference is that the change of the state that means in case of latches the output is changes that means it stores 2 states either 1 or 0 1 bit of information that means our latches can store 1 or 0 and it is changes the difference is that the output stages changes in case of latches the output is changes when the input is changes once the enable is asserted that means it is in the combinational logic circuit that means it is a latches so this is a input output q equals a this q is state is changes that means in latches the output stages changes when a is changes that is input is changes as long as the enable the enable is asserted so that is the difference but in case of flip flop the output change of the output states is depend on the clock so that is the basic difference next we shall see the flip flop or it simply it can written as f f so flip flop is nothing but a memory element which can store 1 bit of information and this flip flop are generally are designed by using the north and land gates so let us first check the r s latches circuit using north gate so here r means it is expressed as reset and s is set so the logic circuit is for north gate using north gate this is a north gate one input this is another north gate this is one input so here r and other is the s and s there is a memory element is there that is a feedback part so this output of first upper north gate is goes to the input of lower north gate and similarly the output of the lower north gate will go to the input of the upper north gate so there are two outputs in case of flip flop the two outputs are one is q and the other output is the complement of the first output that means if q is 0 the other output is will be 1 or if q is 1 the other output will be 0 that means the two outputs are complement of each other and if we see the proof table suppose r first is r then s one is q and then there is q bar so these two are the inputs and these are two are outputs so first we see the two conditions 0 0 then 0 1 1 so first for both the inputs that is r equal to s equal to 0 then what will be the output the output is says q will be 1 and q will be 0 anyone so suppose we consider this q is 1 that means this is the first condition means 0 0 so q may be 1 and q may be 0 so it does not depends on the condition of the two inputs the north gate the output of the north gate does not depends on the condition of the two inputs that is r and s so the output of this combination that is 0 0 there is no change and c that means if you write here comment there is no change and for the second case when s is 1 that means s is 1 and r is 0 then what happen this output s is 1 so q bar q bar output is 1 is s plus this q so if as we know from the rule of north gate north gate what we know suppose 0 0 0 1 1 0 1 1 for or gate what happen 1 1 1 and this is for or gate and for north gate that is 1 0 0 0 just complement of the or gate so what we have seen when any of the input is 1 the output is north gate output is 0 so s s is 1 in this case so output will be 0 0 0 0 0 s q bar is 0 that means q is what q will be 1 because q is the complement of q bar so for the second condition q is 1 q bar is 0 that means it is a set output because set when s is 1 that means set input is 1 the output will be the 1 next condition third condition what we have seen in the third condition r is 1 and s equal to 0 so what will be the q q is r plus q bar q bar is the output of the lower north gate so r is 1 that means definitely q is 0 according to this rule of the north gate so q is 0 means q is 0 therefore q bar is 1 so for the fourth case when s is 1 and r is 1 then what happen q will be 0 because q is r plus q bar then similarly q bar is also 0 because this s is 1 so any of the input is 1 output is 0 but this condition cannot be happen because we know that q is opposite of q bar that means if q is 1 the other output should be 0 but in this case we have got both the 0 so this condition is called a race condition that means it is not used so it is called a race condition so this we have discussed about the r s flip flop or lags by using the north gate so dear learner in this video class what we have learnt first we have discussed about the subtractor so there are two types of subtractor one is half subtractor and the other is full subtractor and next we have discussed about sequential logic circuit so there are two types of sequential logic circuit one is synchronous and other is the asynchronous sequential circuit and we have also discussed about the latches and the flip flops then we have discussed about the r s latches that means by using a north gate in our next video class you will get the other flip flops like SR plugged flip flop, JK flip flop, master slap flip flop so these are all sequential logic circuits so we shall meet again in the next class thank you all.