 In this video, we're going to be extending our hardware so that we can implement a branch not equals instruction. In adding a new instruction to our architecture, we're going to want to walk through all of the steps that we did when we were first constructing our architecture. We're going to want to understand what is the data path for this instruction, and then see how we can integrate that with the other instructions that we've already got. In this case, we'll be able to take advantage of the fact that we've already got a working architecture that supports a lot of related stuff for us. So our branch not equals instruction will be pretty similar to a branch equals instruction, so I will expect that a lot of stuff from our branch equals instruction will actually carry over. If I was going to draw a data path for this, I'd say that I'd start with a program counter, then I'd use that to index my instruction memory. I'll get a few things out of my instruction memory. I'll get the offset for my branch target, and I will get two registers that I'd like to compare. So I'm going to have the RS, the RT fields, and then sign extended immediate. In this case, I'd like to know when the contents of two registers are not equal, so I'll take those contents and they'll just get passed to the registers. Exactly the same way they did with a regular branch equals instruction. So I'm still using the registers and I'm still using the ALU. I'm still going to do a branch instruction, and I don't expect that my address calculation will be any different here than it was for my branch equals instruction. So I'm just going to keep all of this hardware up here that handles the branching. So I'm really left with adding the hardware that I need to determine when I should take this branch. Before I had this hardware over here, which allows me to tell when two registers are equal. It uses the zero line to do this, and I'd like to do about the same thing this time, but I want to do this when the zero line is not set, when the results of my subtraction operation are not equal to zero. So I'm going to take the results of that zero line, and I'm going to be interested in passing them into another AND gate that I can ultimately connect up here to my branch multiplexer. But I don't want to do the same thing as I had before, I've already got one of those. Instead I'd actually like to do the opposite. So I'm going to put a knot here in front of my AND gate. This will make it so that this AND gate only fires when the two registers are not equal. And I'll be able to pass this up towards the multiplexer. But I don't want to just toss it into the multiplexer, I've got two signals that I'm trying to pass in here. So I need to combine them. And fortunately this isn't going to be a case where I really have to worry about needing to take one or the other. That would be an option, but in this case I can actually just OR these two signals together. So I'll put in an OR gate here to combine both the branch on equals and the branch on not equal signal. Now the only other thing I need is to be able to control this AND gate. I only want the results of this AND gate to possibly be true if I'm going to do a branch not equals instruction. So rather like I have a branch signal over here, I'm going to need a specialized branch signal for my not equals instruction as well. So I'll have a special branch not equals signal that will allow me to control whether this AND gate can possibly be true. That way I don't have to worry about what happens if I'm not doing a branch instruction, what happens if I'm doing a branch equals instruction instead of a branch not equals instruction. There are other ways I could have implemented this. I could have put a multiplexer on this line that I could use to choose between doing a branch equals and a branch not equals instruction. One side would have gotten the not equals, the other side would have had the regular signal. And then I just need the control line to control this multiplexer to distinguish between a branch equals and a branch not equals instruction. That would have worked as well. Then I wouldn't have needed the AND gate or the OR gate. It's a little more complicated because now I need an entire multiplexer instead of just two logic gates, but it would have worked still. So these problems frequently have multiple solutions. One of them may be better than the others, but that means that it's still frequently easy to find one that you like, one that you understand how to implement. Thank you.