 Hello, welcome to the session on associative mapping address technique. This is Dhanan Patil, working as assistant professor in computer science and engineering department, Walchand Institute of Technology, Swollapur. At the end of this session, we will be able to explain associative mapping technique and explain advantage and disadvantage of associative mapping technique. For this outcome, we need to recall the concept of the direct address mapping technique discussed in previous video lecture. We need to compare and analyze the advantages and disadvantages. So, before coming to associative mapping technique, first we recall that address mapping technique is that technique used to map that particular block of main memory to the particular cache line. So, in the previous video, we have discussed the direct address mapping technique. There was restriction that particular block of main memory should be matched to that particular word of cache lines. So, we will come to this associative mapping technique. In this technique, it permits each main memory block to be loaded into any line of the cache. So, here there is no restriction that here we can map any block of main memory to the any line of the cache memory. So, in this cache control logic, in this technique, the cache control logic interprets a memory address simply as a tag and word field. So, here we recall that address format of the direct address map technique. There were three fields, the offset field used to identify that particular word in the block and the R that is the cache line field were used to identify that which block of main memory to be mapped to the which line of the cache memory and that remaining MSP bit that was R minus S bits were used to identify that which block of main memory is present in that particular cache. But in this technique, associative mapping technique that we no need to worry about that which block to be mapped to which line of the cache. So, we no need to worry about that cache line field. So, here are only two fields are required to this technique that is word field and tag field. The tag field that uniquely identifies a block of main memory that which block of main memory is present in that particular line of the cache and word field identifies that particular word in that available block. So, here we can see associative mapping the cache control logic must simultaneously examine the very that every lines of tag for match. So, here we can see that because any block of that main memory is mapped to the any line of the cache memory. So, here that if the processor request any block from the main memory it need to check all line of the cache because in the previous method that is in direct mapping technique there was no requirement that to search for all the lines because it was in round robin manner if 0th or 4th or 8th or 12th if these blocks are required it will directly go to that 0th line of the cache and it will check because in the round robin fashion that 0 2 3 and after again next 4 to 7th blocks were mapped to the 0 2 3rd line of the cache. So, here but in this method there is no restriction any line can be mapped to any line of the any block can be mapped to any line of the cache. So, the processor need to check all the lines of the cache. So, it need to simultaneously examine every lines tag for the match because if it need to if it finds that that tag address one after other then it will take much time for the execution. So, to reduce that execution time so it will check all the all the lines simultaneously. So, that is why it must be able to examine every lines tag for simultaneously then multiple comparators are used by used and they are connected to the tag bits of the cache line ok. So, for to check the tag bits of each cache line that multiple comparators are used all comparators will check those simultaneously and any one of the line says yes. If it says yes then it is a cache hit that particular block of main memory is present in that cache line otherwise it will be cache miss. So, associative mapping technique we will consider the example the line size of cache memory equal to the block size of main memory. So, that we have discussed this in previous lecture. So, we will consider it is 4 words if it is 4 words then 2 square. So, using 2 bit binary numbers we can identify that particular word that is displacement or word address. So, here we can see the in the previous video lectures we were discussed last 2 bits that is least significant bits were used to identify the displacement address that is 2 bit. And the cache memory size is 16 words if it is 16 words then it can be divided into 16 by 4 equal to 4 cache lines. So, that 4 cache lines in the previous video lecture we were discussed consider this as r field that is to identify the cache line. But in this method that identity that using the cache line field is not necessary. So, we no need to worry about the r field. So, main memory size is 64 byte. So, 64 equal to 2 raised to 6th. So, that total length of the memory address is 6 bit equal to s plus d. So, in the previous method s was divided again r and s minus r, but here no need to worry about it. So, this the 2 fields that is s and d are sufficient. d is the displacement and the s these are the remaining most significant bits are used to identify the tag address of the main memory. The total number of block in main memory is if it is 64 bytes and 64 divided by 4 equal to there are totally 16 blocks in the main memory. So, here we can see associative mapping technique. So, in the previous method there was restriction in the for each cache line the each cache line must contain that particular block of the main memory only. Consider these are the 0 to 15 blocks from the main memory. If there are total length is 6 the last 2 bits were used to identify that particular word and the remaining 4 bits are used to identify the tag address of those particular block. Consider these are the tag address. So, in the previous method that 0th block, 4th block, 8th block and 12th block were mapped to the 0th and 1, x5, 9 and 13 were mapped to the next cache line and so on. But in this method there is no restriction for each line of the cache any of the block from main memory is mapped to the any line of the cache memory 0 to 15. So, out of 0 to 15 block any block can be mapped to the any line of the cache there is no restriction. So, the in this address format in the associative mapping technique. So, the first 2 bits that is the least significant bits from the total length of the address that is used to identify that particular word in that particular block. And the remaining MSB bit for the previous example we have considered in the previous video. So, we have considered this for this example for this example. So, 2 bits were used for the word address and the 4 bits were used to identify that block address. So, these are the 4 MSB bits used to identify that tag address. So, this will identify that tag number and remaining next bits are considered for the word address. So, this is time to reflect what are the advantages of associative mapping technique. Now pause the video and answer for the question. Answer is advantages improves the hit ratio. So, if we consider that in some situations consider the direct mapping technique. If the processor need to access the block number 0 4 and 8 recently then if it need to access those 3 blocks that frequently. Then if the 0 is existed in the 0th line of the cache if it access 4th or 8th it need to overwrite. Again if it requires the 4th or 0 or 8 then again it need to overwrite from the cache. Because those particular blocks of main memory must be matched to that particular line of the cache only. So, in such situations it improves the hit ratio in this method fully utilization of the cache. According to that condition that even if the cache lines 2 3 or 1st or 3 then if it need to access those lines the blocks that 1 4 and 8. So, any one of these blocks can be present at a time in a cache line. So, even if that remaining lines are free we cannot map these blocks to those any of the lines. So, that is why the fully utilization of cache memory is possible in this technique. Because any of the block can be mapped to any line of the cache memory and it best suitable where search time needs to be short. The disadvantages requires very complicated matching hardware. Because we are using the multiple comparators are used with each tag bits of the cache line to simultaneously examine the tag bits of all cache lines. So, that complicated matching hardware is required requires replacement strategy because in the direct mapping technique. So, if it need to replace any block from the main memory in that particular clashed line it is mapped according to that round robin fashion. But in this method any line of the any block of the main memory can be mapped to any line of the cache memory. So, here so while if all the lines of cache memory are full if it need to replace any one of the block. So, to decide which block to be replaced. So, it needs a strategy whether it is based on first come first curve first curve or least recently used. So, that replacement strategy is required in this method and it is expensive because we are using that multiple comparators. So, with each cache line. So, compared to the direct mapping technique it is expensive. These are the references I have used. Thank you.