 Hello, everyone. So this is, I just saw the Yakto, they just did a bird as of a feather. I think it worked out pretty well for them. So hopefully we'll have success as well with the virtual buff. So me and Stefano wanted to have a place where people talk about risk five here at the meta linux conference. So just wanted to stop start off with mentioning the other risk five related content that's happening here at ELC. So tomorrow I'm going to give a talk about linux on open source hardware, which we're going to touch on here. Then Kirsta Sanovich, who is the professor at UC Berkeley that was behind creating this project. He's going to give a keynote on Wednesday. So you'll get a good overview of them. And Kim's going to talk about the state of software development tools on Wednesday. And then Calista Redman, who's the head of risk five international, which is the nonprofit that governs risk five is going to have an expert session on Thursday. But also have lots of meetups going on, which right now are virtual, but Munich and the area were both last week, I believe. So you can go to risk five.org local and check out what meetups are going on there. So risk five is a new instruction set architecture that was created about 10 years ago by a team at UC Berkeley. They were doing computer architecture research and they wanted an instruction set they could use to do that. They didn't want to deal with licensing commercial ISAs. It's risk five because it's the fifth risk instruction set to come out of Berkeley. Two great talks. One is instruction sets want to be free. And this is from David Patterson, who was the co-creator of the original risk back in the early 80s. And then you'll see this on Wednesday, the kind of state of the union risk five. A couple of times a year. So you can always check out the latest one on YouTube. Kind of gives it over what risk five is in the ecosystem. Real quick, just kind of to go over it for people that aren't familiar with ISA. This is a talk from a new Patel at the Linux LCA back in 2020, which is probably one of the last conferences that happened. So the idea behind risk five is that it's a new ISA, clean slate and extensible. So everything that was learned over the years from doing computer architecture research at Berkeley, they put that into making this ISA. An idea here is it goes from 32 bits, small microcontrollers all the way up to supercomputers here. So it's one instruction set that can span all those different use cases. And also the idea here of different privilege levels. So we have machine mode which is where the firmware runs bootloader and then operating system runs in supervisor mode. And then above that, there's user space. There's also an extension for hypervisor that's being worked on right now. So I mentioned it's extensible. And the one of the ways that works is it's not just one ISA, it's a set of ISAs. And the key thing here is the base one is a 32 bit integer ISA. And that's frozen that'll never change. So if you were to compile for that, but right now it would still work in 20 years on some fancy 128 bit risk five computer. So the idea here is there's extensions that then get ratified and frozen. And you'll kind of see like these, it's kind of a soup of letters and numbers. So each of these different extensions has a different letter. For purposes of Linux, we're generally talking about RV 64 GC, which means they can do integer, multiply, atomics, and float. I think that's it. But so you'll find out more of that if you check out the keynote on Wednesday. And this was from Tisha's slide from LCA 2020. And to kind of give you an overview here of what is the ecosystem for software on risk five. So we have support now in a lot of things. And we're going to go through that real quick here. Has anyone raised their hand or said anything yet? Still fine. So final questions? So this is another slide from Tisha's presentation. Hopefully a few of the people will be able to jump in here and speak up. So the basic idea here is we have our normal SOC ROM, and then that goes into M mode, which could be U boot. And then we have open SBI, which is this supervisory interface, and then go into U boot and then finally boot up into Linux. So kind of a normal boot flow. But one of the terms you might not be familiar with, especially if you're coming from ARM, is SBI. So SBI is the supervisor binary interface. So there's this privilege spec. So one of the extensions for risk five is a privilege spec, and that defines basically you're going to have an operating system like we're familiar with, like Linux. And SBI is the kind of way you go between the machine mode and the supervisor mode, S mode. So it kind of sits there between the OS and the hardware. And this came out of the Unix platform specification working group. So you can, as an individual, join the risk five international organization, and then you can join these email lists that talk about the Unix platform specification. So this has kind of come out of work that they're doing. And in particular, so SBI is a specification, and then there's open SBI, which is an implementation, which you'll see is very common in most of the different platforms that we're going to talk about. And one of the things that just happened was UEFI support. There's a patch series now on the Linux risk five mailing list. So it's coming along to have that kind of generic UEFI support in UBoot and an open SBI, and then in the Linux kernel as well. So Linux distributions. And I hope he's going to be on here. David works on the Fedora port and has a lot of knowledge. So if he is on here, hopefully he can give us some insights. But basically both Fedora and Debian have ports. Suse is working on it as well now. And then Yachto and Open Embedded support it. And I think Ken will probably talk some more about that on Wednesday in his talk. And there's also support in Buildroot as well. So we're a little short on the hardware side right now, but the software support is really coming together. And because risk fives are relatively new thing, we don't have a lot of hardware out there that we can run, especially operating systems on. So QEMU is a great way that development has been done with the Linux kernel support and getting the distros running. So if you don't have any hardware, you can on your PC try this stuff out with QEMU. So I think it was maybe three ELCs ago, 2017 maybe, that Sci-Fi was one of the sponsors. We were in Portland and they had a bunch of these boards there. So this is a really exciting board. It has four 64-bit risk five cores. This board was pretty expensive. It was $1,000. It was available in limited quantities because Sci-Fi is not a company that's making chips. They design cores that then other companies might use. So this is probably the best board that's out there, though it's pretty hard to get inexpensive. But when you have this with the whole setup here with some additional FPGA expansion cards, you can actually have a full Linux desktop running here. And if David's able to join, he can maybe talk about it. He has one of these setups where he's working on the Fedora port. So the lower end version is this board here, which has a processor called the Kendrite K210. And this is something that's been in the works for a while. Back in last year at Linux Plumbers, Demi and Lamal from Western Digital talked about experiments they were doing to get Linux running on this. So this is a dual core 64-bit risk five processor at 400 megahertz, which is actually pretty nice. The downside here is it only has eight megabytes of memory, which is pretty limiting. It also does have an MMU. They implemented a spec, which was too old for it to be supported in Linux. So work was done to essentially allow it to be supported with no MMU and with M mode, which is machine mode instead of supervisor mode on risk five. And with Linux 5.8 kernel, the full support is going to be there. So pretty much all you can do, the only thing you can do right now with it is you can, Damian has build root with busybox, you can run on it. But in order to do anything more, we need something called FDpick support or an analog in risk five. This is what ARM does on those no MMU systems where you can run Linux. Basically allows you to use shared libraries. So without shared libraries, we run out of space very quickly. So that work is still ongoing. So I asked on the list recently, it doesn't look like there's anything new right now. The other cool thing is Uboot. There's a patch series that adds support for that that was just posted for one of those sidepeed boards with the Kendra K210 chip. Now, one of the things I'm quite excited about that was not quite here yet. So there's an organization called the open hardware group that's working with different companies like NXP. And I think there's a couple other silicon labs maybe. So the really interesting thing here is they basically took one of the IMX processors like an IMX6 or something like that. And they took out the ARM core and they're dropping in a 64 bit risk five core. But we have the rest of sort of peripherals that everyone is used to in likes on the IMX series, including the Vivante GPU. So it should be supported with open source driver. So this is really exciting. However, it's not going to tape out until the end of this year. And it's just a test project. So maybe in 2021, we'll see a product come out from NXP or someone else that you could actually buy and build the board around. Now, I have one glaring thing missing here, which since it's live, I'll just go to there. So microchip has a similar to like a xylene sink. They have an FPGA with a hard risk five core called the Polar Fire SOC. And that should have been in there. So this just launched or this just showed up yet last week on crowd supply, which is a site that you can essentially crowdfund new boards on. So this is pretty exciting. This is a think quad core risk five processor. But this board is going to be probably at least half the price of the side five board. And this chip here, the Polar Fire SOC, you'll be able to buy in distribution. So we'll probably see later this year or next year, series of different boards that were using this SOC. So there is an FPGA, but the key thing to focus on here is it has four hards, E6 silicon risk five cores. So we did have one question just about how we're coming along in terms of consumer uptake. So the Polar Fire is a good example of, you know, some of the folks that are certainly currently starting to spin chips with risk five, but really just head over to our member site and look at the folks that are joining specifically at the at the premier level. The premier level members are really the ones you're going to look to in terms of when I see a new board coming out, who's it going to be coming from? So that's a good indicator. But also in general, I think we're seeing a lot more and we hope to see a few sub $500 boards in the next year. Yeah. And just a quick reminder for everyone, if you go to risk five dot or you can find all that information. Let me flip back to the slides here. So one of the other options that we have because it's been taking a while for companies to make hard SOCs chips that we can we can use in boards. So one of the other options is to use FPGAs. So Megan Wachs from Sci-Fi gave an interesting talk about this last year, last November. And I'll talk a little bit more about this in my talk tomorrow. But one of the neat things that's happened with FPGAs recently is there's now open source tool chains for them, which is great. Because their proprietary tools were massive. And this is a really nice thing that's happening in the FPGA world. And the cool thing we can do is we now have a open source tool chain that can run on a part called the lattice ECP five, which is capable capable enough for us to be able to run Linux on it. So we can have Linux running on a soft core inside the FPGA using only free software tools. One of the boards that you can get if you want to play around with this is called the ULX 3S. That's out of a hacker space in Croatia on crowd supply. And then another really nice board that I'm quite excited about is this little tiny board called the orange crab. And this has the ECP five that you can put a soft core in and has 128 megabytes of DDR RAM. So it's enough for us to do some interesting things with Linux on the board. One thing to note. Yeah, another quick question just about regarding risk five and things like the Beagle board project. So I think what you're getting at is a much cheaper than $500 board. I can't speak to what Texas Instruments may or may not be doing. But I can say that we're hoping to see some sub $100 boards that are capable of running Linux come out next year. Yes, yeah. So one of my hopes is to get a $100 board out there, sub $100 board. And for one road and route to do that is both of these boards here with these FPGAs, they're about $100. Though the one downside to that is with the soft cores only going to run maybe 50 megahertz, 100 megahertz on a really nice FPGA. So above that you're really limited with the soft cores. What we really need is SoCs. So the Polar Fire SoC for microchips can be exciting because it has an FPGA in it. I think it's going to probably not be cheap enough necessarily to get sort of a Beagle Boner Raspberry Pi price. I'm also hopeful that a company like Kendrite might come out with a more capable SoC with external memory because that Kendrite chip would be really nice if it has external memory interface. So I think 2021, we'll probably see some nice options out there. And then the Open Harbor Groups test chip, you know, if that goes according to plan, I think we could see an NXP product that would be available in distribution. But if you don't have any hardware at all and you don't want to run QEMU, another thing you try out is Renode. This is from AntMicro. It's open source, essentially emulator. It allows you to choose from a list of different boards and essentially run them, emulate it on your computer. So this is me running Renode to emulate the sci-fi on Leashboard. So that board that was $1,000, you can emulate it on your computer. And because your computer is, you know, if as long as your computer is relatively powerful, it actually feels interactive, you know, it's not like chugging along at really slow speed. So it's a nice way to do things if you don't have hardware. One of the last things I wanted to talk about here, unless anyone else has spoken up yet, is kind of what's going on with the Linux kernel with the RIS 5 support. So the best resource I would say is if you hop on the Linux kernel mailing list for the RIS 5 architecture, you can go through the archives there on lore. But some of the things that have been added recently are EVPF, which is exciting because everyone loves EVPF. Also KGDB, Kexec and KDump, which help with debugging, VDSO support, which helps with optimizing, being able to check the time, system time. Syscaller, which is basically a security fuzzer. And then one of the other things was being able to build with clang instead of GCC. And then there's other things that are upcoming like the UFI support. There's been some work on the interrupt controllers. This one is a core level interruptor support that's on the sci-fi board. There's also a hypervisor spec that's in the works for RIS 5. And there is work being done to have it integrated with KVM. There's also support being worked on to basically improve the performance measurement PMU and in-perf so we can start getting that performance data that we're used to on other architectures. And then also CPU frequency driver support and the sci-fi board. And a great thing to check out was last week at the Munich RIS 5 meetup, Bjorn Topol gave a really great talk about what's missing in the RIS 5 Linux kernel. And he goes through here. Let me just show you real quick here. He goes through here and lists a bunch of things that are marked as to-do and things that you could work on if you were interested in jumping in and helping out with stuff. And as he says, that'll keep you busy during the summer. So highly recommend checking out the slides from this talk. And the video should be posted this week, so in the next day or two. And I think that is the end of the slides. Have we had anyone else jump on here? Just a quick question about the Google doc. Yeah, so we'll share the slides after the presentation. Actually, I can paste that into the, here we go. RIS 5 GPOs. Oh, yeah. So Alistair there in the chat, he is a person from Western's usual that does the QMU RIS 5 support. I'm not sure what that means by GPIOs, maybe emulating them. But there is a GPIO mockup driver that I think would be able to work. I'm not sure. Though there should be a way for people to jump in here and talk if they want to. I don't know who else is joining. Oh, Ateesh is in here. Yeah. So Ateesh is in here. He's one of the main Linux kernel developers. He's at Western Digital. Alistair is the first person working on QMU. So are we able to let people talk? Did have a quick, we had a question about, is there a RIS 5 equivalent to Arms Trust Zone? And the answer is yes. There is actually a working group currently called the Trusted Execution Group, TEE Group. And they're working on, I believe, I'm trying to remember the version of the spec they're on. So yeah, this short answer that is yes, there is a group that's currently working on that. I know that I've been trying to get a FPGA based demo of Trusted Execution Environment capable core running with the group for the IETF that does hackathons on a protocol called TEEP. So now I'll put those links in here. And I think my, I did get pushed real quick to try and get this up there, which if it did, I'll drop this link in the chat as well. Oh, I guess I did something wrong. Oh, anyways. So anyone want to ask a question with voice? I think we can do that. Yeah, if anyone wants to make a comment or question, I believe you can raise your hand and we can give you audio capabilities or just post the question up and we'll ask it here. Maybe, there we go. Yeah, well, Karim mentioned there about the open source implementation. So yeah, one of the things I guess maybe I should have clarified is so RISC-5 itself is just an open source instructions that architecture ISA and the implementations of that can be both proprietary and open source. So just because you see RISC-5 doesn't mean that it's an open source design, but there are a lot. So some of the original ones for out of Berkeley are Rocket and Boom with 2.0s. So those, those are being used for the basis of commercial designs. I think the CY-5 stuff is based on Rocket or Boom, I think. And the open Harbor group stuff, the open HW group stuff, the core V that one I showed you that looked kind of like an NXPIMX. That one is based on core out of ETH Zurich called Pulp. It's from the Pulp team there and that one's called Ariane. So a lot of the SSEs that we're seeing be commercialized both in the microcontrollers and in the like the application processors are based on some of these open source implementations. I know for people that are into hardware design, the Berkeley ones I think are based on the Stetskala language chisel, which I, some people may or may not like. All of the ETH Zurich stuff is system verilog and that's what open Harbor group is doing, system verilog, because they believe it'll be easier to get the SSEs built on and verified that way. Oh, what do we have here? Some other questions? Drew, do you happen to, when you click on raise hand, can you give Alejandro access to the mic? Let me see here. Oh, yes. Yes. Oh, there we are. Hi, hello. Well, thank you, Drew and Stefano for the session. So I have a question. I was aware of the changes in the Linux kernel for support to Rigs 5 but it's a surprise for me to know about this no MMU support for Rigs 5 in Linux kernel. So I don't know if I got it right and this is maybe a desire or if something that is happening and if that is the case, I think this is related to the unification project that was active some years ago and I think it's not active anymore or at least I'm not, I don't have any news about it. So what if you can comment about it? Thank you. Yeah, so the support's actually there now in 5.8. So when 5.8's released, the first part of the Kendrye K210 support was in 5.7. So now after 5.8, it'll be fully supported. Maybe if one of the other, someone from Western Digital wants to jump in, but I believe the issue with the Kendrye K210 part is they do have an MMU but the implemented aspect that was a little bit older than what Linux supports. So we basically have to treat it as not having an MMU. So there's no MMU and then there's also machinevote versus s-mode. So given that the Kendrye part doesn't have much memory, it's just running Linux kernel in machine mode, which means that we just have one address space. We don't have virtual memory or any that sort of stuff. And then the downside there is essentially you can only really run like one busy box session and then you don't really have much RAM to do anything else, which is why the idea of no MMU support coming up for user space. So the idea is that with ARM, there's a way called the FB pick of being able to have on a user space without any MMU in the system, they can share memory better. So that's something that that may happen there to make it more useful. But for right now for, you know, it's $13 and you can actually have a real RISC-5 system that's running Linux at 400 MHz. So it's an interesting thing to play around with until we get better SOCs. So we're actually running out of time here, but we did have a quick question about Renode. I'm not sure, Drew, if you happen to know anything about Renode emulators and if they include things like the host machines, Nick, I haven't played around with Renode enough. Yeah, it's quite sophisticated. You can, you should be able to do most things with it. The Antmicro people put a lot of work into it and also the idea of being able to do co-development where you're both, some of the parts are actually in hardware and some of the parts are being emulated in software. So it's quite, it's quite like going on there. So Android, hello, John in Korean. So I don't believe Android is anywhere near being supported. The main reason is I don't think the Java support's very good right now. I could be corrected and Ken might have more interest to that, but I've not heard of anyone working on Android yet. And about the open implementations, of course, SWIR from Western Digital is one of the big ones for the microcontroller class. And that's all open. That's part of the, let's see, other non-profit, the other open hardware group. They steward the SWIR. Anyways, the LogiBone. Yeah, I think that Java's going to be a big issue to that needs to get running well before we can have Android. The LogiBone was a cape for the BeagleBone. Someone just made kind of a new version of that with the ECB-5, which is kind of interesting. Oh, you were thinking about Chip's Alliance. Chip's Alliance, yes. So Chip's Alliance, if you check out Chip's Alliance, they have SWIRV and several other cores. So like the three main things you should look at is RIS 5 International, open hardware group, and Chip's Alliance. A lot of the projects are falling under those umbrellas. I think we have to wrap it up. I'm getting a message that we're near the end of our time. We're already gone over. I'll put the mailing lists for Google groups in the chat for folks. Those are open mailing lists to everybody, so feel free to post on there if you have additional questions or always welcome to reach out to me directly as well. So thanks everybody and thank you very much, Drew, for all your work here with the slides. Thanks.