 So, we have had one session on non-silicon based device that is germanium based device. So, in this module 4, we continue on the germanium based device MOSFET and take a pipe into compound semiconductor materials and devices. So, we had seen what problems are involved in using germanium for MOS devices. The most important thing that was required there was the surface preparation and what dielectric you will use. Originally it was believed that the germanium oxide should be completely removed from the surface and then you have to do some passivation techniques like ammonia passivation and possibly deposit high k dielectric. But later on it was clear that it was not the germanium oxide which is giving problem. The germanium oxide indeed would help if you do proper stoichiometric oxide growth, good quality germanium oxide and then do some passivation and deposit high k dielectric materials to make a MOS devices. In fact, I will show you in today's presentation 3 case studies or 3 approaches which have been tried out fairly successfully to realize P channel MOS devices using germanium. P channel is used because in germanium the effort is to realize P channel MOSFET because the whole mobility in germanium is the best as compared to silicon or gallium arsenide or indiaposfide. So, we will take a look at these 3 cases. First one is the one that was done in the Stanford with the process of such group, germanium MOSCAP using ozone oxidation which I have discussed last time just I will point out today. All that is ensured there is complete oxidation of germanium oxide using O3 there is ozone. Then use hofnium dioxide, hofnium oxide as high k dielectric, platinum lead flow. Second approach is again thermal oxidation this was reported in 2009 will finish the first one and go to second one germanium MOSFET that was from Singapore in 2009. This involved thermal oxidation of germanium oxide, hofnium oxide use of fluorine for passivation and tantalum nitride to get retro and forming gas and ealing. We will see that it is. Third one is the germanium MOSFET with the Al2O3 germanium oxide and germanium gate. We will see them one by one. This one what we have seen last time itself. Here what we showed was what is shown by Stanford group was that use ozone oxidized germanium freshly cleaned surface oxidize it at different temperatures 200, 350, 400 and 450. In each case first what they did was 200, 350 and 400 they did oxidization and deposited low temperature oxide that is LPCVT SiO2 at 300 degree centigrade. So, they formed this gave MOS capacitors with the DIT which went on reducing as we increase the temperature of oxidation 200 that is the DIT across the band gap. So, the balance band of right up to mid gap went up to 350 still they went down 400 it went down further the thread circles. Now when they went to 450 that became worse. Telling you that you can do the oxidation of germanium at higher temperature with ozone it gives better results with the hofnium oxide as the high k dielectric, but the results gets the interface state density becomes worse. You can see it goes on reducing then above 450 it increases. Telling you that germanium oxide begins to decompose at higher temperatures. So, your restricted 400 degree centigrade. Now what they did was choose 400 degree centigrade for germanium oxidation with ozone instead of second dioxide use half mium oxide by atomic layer deposition at 130 degree centigrade. That gave them the best interface state density as low as 3 into 10 to 11 centimeter square per electron volt per centimeter square per electron volt. So, these are by various techniques measured and the lowest interface state density reported in that. There is no MOSFET device itself reported in that report subsequently they have reported something, but we will take on some other approach instead of using ozone the approach done by Singapore that is using germanium MOSFET device with G O 2 and high k dielectric half mium oxide that also atomic layer deposition, but what they used is they use regular thermal oxidation at 400 degree centigrade because it does not decompose at that temperature. So, 2 nanometer of thermally grown germanium oxide was grown and then using atomic layer deposition at 300 degree centigrade half mium oxide layer of 4.5 nanometer was deposited on the germanium oxide. Now, once you have this double layer of half mium oxide and germanium oxide on germanium ok incorporate fluorine into some samples because they did various experiments in some of them they incorporated fluorine by C F 4 plasma treatment in inductively coupled plasma chamber I C I C P with pressure of 100 millitour and a mixed flow of freon and oxygen. That means you have fluorine passivation taking place at the same time some amount of oxygen is supplemented to keep the oxidation on and for various duration they did that C F 4 plasma treatment. Followed with this they did the post deposition anneal PDA at 500 degree centigrade for 30 second for all the samples. So, in some sample they did not do this fluorine treatment, but in some of them they did that followed by the PDA was then all this on all the samples. Then tantalum nitride metal electrode formation for the gate finally they did forming gas anneal FGA at 350 degree centigrade. For one hour on some of them so forming gas is hydrogen plus nitrogen combination. So, you can see that there are double passivation that have been done one is native germanium oxide is present half mium oxide as the gate dielectric. Then you have got the fluorine passivation and then you have got the hydrogen and passivation in forming gas different combinations have been tried out here all the results. These are the capacitance would take characteristics taken on these devices. For example, just only the germanium thermal oxide and half mium oxide and tantalum nitride and with only PDA no forming gas annealing no fluorine passivation when they did that this black squares. So, the frequency C V characteristics at 1 megahertz and the this upper curve shows the frequency responses 1 kilohertz. So, telling you that there is frequency dispersion of the C V characteristics and you go to higher frequency the capacitance falls indicating that there is and when you go to lower frequency capacitance is higher indicating that there is response of the interface takes taking place to these frequencies. So, the presence of high frequency is indicated by the frequency dispersion as you already know. Now, the red curves two of them one at 1 megahertz lower curve the upper curve is at 10 kilohertz this is a 10 kilohertz this is at 1 megahertz. So, here again you can see only the fluorine passivation was not done only the forming gas annealing was done that means hydrogen passivation was used using the forming gas. The capacitance were higher it showed better results, but still there are frequency response frequency dispersion there is some stretch out if it is still you can see you can see when there is no F GA or fluorine the stretch out is more when you use the forming gas annealing stretch out is reduced now with both fluorine plasma annealing and forming gas anneal you see the stretch out is steep stretch out has disappeared indicating that the interface density is drastically reduced and very little frequency dispersion is seen. So, combined effect of fluorine passivation with the CF4 plasma and hydrogen passivation with the forming gas anneal did the trick for them real reducing the interface test densities and to get excellent CV on the p type substrate I am sorry on the n type substrate because n type substrate when you apply minus voltage just one minute this was actually the starting material was if I have n type substrate and I apply plus voltage it is accumulation and I apply negative voltage it is depletion. So, this is the inversion this is n type substrate p channel device inverted with p channel. So, I am sorry I am again making mistake n type substrate inverted p channel negative voltage holes are attracted to surface. So, the inversion layer is p. So, you have got p channel device using n type substrate there may be the MOSFET process steps there may be m p MOSFET were fabricated using n type there may be as it is again re state that if you want make p channel device n type substrate must be used. So, that was the MOSFET or the MOSFET were fabricated by using 1 0 0 oriented n type germinium vapors gate electric germinium oxide 1 nanometer half nium oxide 3.5 nanometers layers implanted with boron 10 to power 15 nanometers. So, these are the source range. So, gate oxide is grown by germinium oxide and of course, plasma passivation etcetera and half nium oxide 3.5 nanometers source range was formed by for making a MOSFET by implantation of boron because the p channel MOSFET source is p and range is p. Then plasma passivation was done forming gas and healing was done at 350 degree centigrade. Deposit contact material aluminum and pattern. So, now a high drain current of 37.8 micro ampere per micrometer at V G minus V threshold equal to minus 1.2 volts. You can see that the gate voltage is negative and you have positive holes in the channel minus 1.2 volts. It give quite high drain current 37.8 micro ampere micrometer and the interface density of 2 into 10 to power 11 per centimeter square per electron volt. I do not say that it is negligible, but it is very small that is reported and the mobility of 3 to 96 centimeter square per volt second have been reported for n channel length equal to 10 micrometer. Now, you may ask how good is this mobility? This mobility was at that time it was the best that is reported on germanium. Earlier they got even worse mobility because of the high interface density, but the ideal mobility that can be achieved for p channel germanium MOSFET is expected to be 1900 centimeter square per volt second. We are far off still. So, all these are the characteristics for germanium MOSFET from NUS, National University of Singapore, June 2009. Transactions on turn devices, the picture is taken from there 2009. Germanium high K MOSFETs using CF4 plasma treatment, germanium oxide plus half name oxide dielectric incorporated for fluorine and finally, any forming gas at 350 degree centigrade for 1 hour after the tantalum nitride metallization. The DIT of 2 into 10 to power 11 per centimeter square per electron volt was observed after hydrogenation. You can see the characteristic here. Without the forming gas annealing, without the fluorine, without the fluorine passivation plasma, the dotted line gives a current for V G minus V threshold equal to minus 1.2 volts. And for the same condition, but with fluorine, if you have done the fluorine passivation, you get much higher current. What was about 30, 32 microampere per micrometer? Went up to about 37, 38 microampere per micrometer gate width. And the same microampere per micrometer implication is microampere per micrometer of channel width. So, this tells us that this indeed gives us the impact of fluorine passivation to enhance the current, to enhance the mobility. We will see that subsequently for some time not much improvement has been done. But in the latest one, February 2012, there was a report in the transactions of the electron devices. February 2012, a group from Japan they reported the use of instead of haplium oxide, use 8, 2, 3 layer as the dielectric. They did not use straight away thermal oxidation, but they showed that you can grow germanium oxide in between the L 2 O 3 and the germanium by annealing at 300 degree centigrade in a plasma after depositing L 2 O 3. So, the way they did was deposited, but cleaned the surface of course that is important. Deposited after cleaning the layer L 2 O 3 aluminum oxide by atomic layer deposition at 300 degree centigrade using trimethyl aluminum and H 2 O precursor TMA, trimethyl aluminum that is common thing that used. And then come the wafer at 300 degree centigrade, subjected the wafer to post plasma oxidation by exposing the L 2 O 3 germanium stack to oxygen state plasma at substrate temperature of 300 degree centigrade. So, what it does is the oxygen from the plasma diffuses into the interface and oxidizes the germanium that means you are getting that germanium growing as a intermediate layer and always protected by the L 2 O 3 layer. So, after this deposition they did the post deposition annealing at 400 degree centigrade titanium nitride electrode formation and patterning that makes a monostructure. First then also that is the structure there where there is oxide at the field oxide source drain was implanted by P plus ion implantation activation is 400 degree centigrade for very short duration. We can see the transistor structure here, this is the top view gate source drain that is the nickel gate source and drain, nickel gate source and drain contact formation and the back contact aluminum. So, the source gate and drain gate stack is L 2 O 3 germanium oxide dielectric. So, let us see how it worked out what they saw was they are able to control the thickness of germanium oxide vary it from 0 to 1.5 nanometers either by fixing the aluminum oxide for a particular thickness say here fix it at 1 nanometer L 2 O 3 then subject it to that oxygen plasma at 300 watts you get about 0.5 0.6 nanometer germanium oxide 500 you get more oxide 650 they get about 1.3 or 1.4 nanometer. So, if it 1 nanometer fixed more power you get more oxygen atoms diffuse through the L 2 O 3 layer. Alternately for a given power 300 watts you have to make each for each run you have to make different samples have a thinner aluminum layer. So, thinner aluminum layer the 1 nanometer for the 300 watts if I have 1 nanometer aluminum layer you get about 0.5 nanometer germanium oxide intermediate layer, but if I reduce if I increase the L 2 O 3 thickness to 1.6 or 1.5 nanometer you can see the germanium oxide thickness is very small much smaller than about 0.1 nanometer. So, you can have a perfect control of the germanium oxide thickness either by changing the power or a power of the plasma oxygen plasma or by choosing a different aluminum thickness thinner thickness of aluminum L 2 O 3 more is the thickness of the germanium oxide. So, you can get good control now what they did they measure mean they made mass cap here they have got the mass cap they made measurements on that and in the D I T for different germanium oxide thicknesses by using the approach. They made gold L 2 O 3 germanium oxide germanium mass caps and measured the interface state in 3 at 0.2 electron volts below the band gap because you can it gives an idea that is the minimum that you get at that location at that point how much is the D I T they got 10 to the power of 12 when the germanium oxide was 0 only L 2 O 3 was present, but it went down to well below about 10 to the power of 11 or so by the time you went to 0.5 nanometers 0.1 nanometers etcetera you went got even below 10 to the power of 11 20 meter square per electron volt this were done by limit L 2 O 3 of about 1.3 nanometers and 500 watts. So, that tells you that you can get best interface state density by introducing interlayer germanium oxide through the oxidation of the germanium by the oxidation of germanium using plasma oxidation through the L 2 O 3 layer which is deposited already. So, that was it also said that there is 1 to 1 correspondence between the germanium oxide thickness and D I T and germanium oxide thickness controls the D I T very much. You should not have you should not have if you have very thin layer of germanium oxide you will get or 0 you will get high D I T as you keep on increase in germanium oxide say about 1 nanometer you get very small D I T. So, about 1 nanometer of the of germanium oxide is optimum. They are not studied the for the effect on this, but they saw the output characteristics of the pH and MOSFET with L 2 O 3 germanium oxide gate electric with the with the gold and the copper electrode they got very good I V characteristics. You can see that V G minus V 3 we read some 0 to minus 0.6 volts very low voltage. They got current of 0.4 micro ampere micro meter and the range voltage was 0.5 volts current is saturating because it is saturating here and steps of 0.1 volts 0.1, 0.2, 0.3, 0.4, 0.5, 0.6 minus of course current from 0 right up to about 0.4 micro ampere per micro meter. So, this was E O T effective oxide equivalent oxide thickness of 0.98 nanometer W by L equal to 150 micro meter and 50 micro meter channel lengths. And they also measured the mobility from this I V characteristics estimated the mobility. And they showed that the germanium P MOSFETs exhibit the peak hole mobility values of 515 centimeter square per volt second when the E O T of 1.18 is used there E O T 1.18 that give about 515 that is highest ever reported for germanium P channel MOSFET. And you can see they used E O T of 466 that was about 1.0 I am sorry when the E O T was 1.06 that was about 466 mobility and when reduced to 0.98 that turned out to be 400. So, as predicted here thicker the germanium E O T you get smaller the E O T and thicker the E O T higher the mobility. So, the mobility enhancement is correlated with the interfaced density that is the implication of that. Obviously, the moment you have the interfaced density when you try to invert it and with change the gate voltage the channel charge would change if the interfaced density is 0 channel charge would change correspondingly. But if the interfaced density is present that will respond to the change in gate voltage. Therefore, the channel charge would not change correspondingly as a result the drain current change will not be that much. So, transconductance will be smaller. So, it is important to have the interfaced density reduced statically. So, this tells you that there is still some interfaced density present there there is still lot of scope to go ahead with that. Now, you can see that in all these cases it has been this this is summary of the references that you have chosen before a close count on the discussions germanium 2012, 2009, 2008 starting from the entire millenium lot of effort has gone on on the germanium transistors. There is still long way to go and people have not been looking into n channel MOSFET because that is not an issue because you can get we can somehow you know you are concerned about realizing p channel MOSFETs with the high hole mobility. So, one can think of combination of silicon and germanium silicon germanium devices or silicon n channel MOSFET p channel germanium MOSFET combination of those thing to make maximum all sorts of combination can be are foreseen are looked into vigorously by various industry people. So, one can move from here on not only silicon, but not only silicon or germanium which are the same which are the elemental semiconductors. One can take a look at look at compound semiconductors like silicon germanium for example, it is a compound semiconductor. You can look at that is a silicon is fourth group germanium is fourth group. So, silicon germanium is 4444 group both elements are from fourth group, but it is a compound. You can mix silicon and germanium in any composition to you can change the band gap from germanium to silicon. Germanium is 0.66 silicon is 1.1 electron volt at room temperature. Now, you can make an alloy of silicon germanium have a band gap of your choice have a mobility of your choice. When you mix no doubt you get the benefit of better band gap with when you add silicon to germanium, but you lose the benefit of higher mobility. So, you may have to hit a compromise there if you are using silicon germanium. On the other hand you can think of germanium which is strained. So, that a thin layer of germanium. So, that you can improve the band gap still have high mobility. These are some of the issues which you can look into. So, if you are thinking of looking into compound semiconductor. Now, you can see already in silicon you are looking at high k. So, in compound semiconductor in germanium in all these devices you are looking to high k dielectric. More and more high k dielectric like apmium oxide or a l 2 O 3 by atomically at a position are being vigorously tried out in all approaches. Now, let us switch gears. Therefore, take a look at into the move on into the world of compound semiconductors and the heterostructure FETs. So, what you see here will be today quickly take a look at compound. What are the materials and what are their properties? Then take a look at MESFET very briefly. Then go to high electro mobility transistors and compound semiconductor FETs in the context of general quantization. If possible, I can also look into we can also look into hydro junction by power transistor. Heterostructure MOSFETs exploiting novel material strain quantization. Now, as I already mentioned compounds semiconductors can be binary. Binary means there are two compounds, ternary means three compounds, quaternary means four compounds. So, you can have combinations. So, binary you can have elements from second group and sixth group. They are called two, six compounds elements on third group and fifth group. They are called three, five compounds. Here, for example, cadmium sulfide second group and sixth group. Here, gallium and arsenic gallium arsenide first group, third group and fifth group, four, four silicon and germanium that is four, four compounds or silicon and carbon silicon carbide. These are binary compounds. Let us take a look at the two, six what are they? Compounds formed by second group and sixth group, second group zinc and cadmium. These are the materials which have been tried out. Zinc, these numbers are inside I have given you atomic number just for some guideline because general it has some implications. I will come back to that later. Zinc and cadmium can form compounds with sulfur, selenium or tellurium from the sixth group. You can have zinc sulfide, zinc selenide, zinc telluride. So, you can see three compounds, cadmium sulfide, cadmium selenide, cadmium telluride. These are all high atomic number materials. Mostly when they are high atomic materials, they turn out to be direct band gap semiconductors. What are the implications? We will see later. They are direct band gap. Means the momentum of electrons at the conduction bandage and at the valence bandage are same, are equal. There can be transition from conduction band to the valence band, electron transition from conduction band to valence band. Similarly, transition from valence bandage to conduction bandage with the help of photons. That is only energy conservation required for transition. So, directly it can transfer, transition can take place with exchange of energy with photons. They are called direct band gap semiconductors. Now, two fixed compounds as I already mentioned zinc sulfide, zinc selenide, zinc telluride, cadmium sulfide, cadmium selenide, cadmium telluride. All of them exhibit direct band gap because of their nature of heavy atoms without getting into the fix of that. The high atomic number elements when they form compounds usually they turn out to be direct band gap. That is an observation that is all. All of them have E g higher than E g of silicon, all these compounds. But, all of them have mobility lower than that of silicon, electron mobility. So, normally you would not like to take a look at them for micro electronics or nano electronics because of this problem. Still it can be useful for optoelectronic applications. 3-5 compounds as I pointed out elements from the third group are these compounds are formed by third group and fifth group elements. They are compounds. Some people call it as alloys also, but correct term used for quality is compound. Third group what are the elements? Valence electrons are 3 in them, aluminum, gallium, indium. Atomic number 13, 31, 49. Fifth group elements, phosphorus, arsenic, antimony, nitrogen. You can see that these are all fairly high atomic number. Phosphorus is lower atomic number. So, gallium phosphide forms in indirect band gap. Gallium arsenide direct band gap. Gallium antimony direct, gallium nitride direct band gap. These are direct. This is indirect. Indium higher atomic number, it forms direct band gap on all of them. Aluminum forms direct band gap, indirect band gap in most of them because it is low atomic number or light material, light atom. That is an observation. So, sum up. Aluminum, phosphide, aluminum, arsenide, antimony, all the indirect band gap because of low atomic number associated with the aluminum. Gallium phosphide is indirect because phosphorus is lighter. Gallium arsenide, gallium antimony, gallium nitride are all direct. Indium phosphide, indium is heavy element. All of them are direct. Indium phosphide, indium arsenide, indium antimony, indium nitride, all are direct. I have circled these three materials. Gallium arsenide, gallium nitride, indium phosphide. They all have mobility and band gap greater than that of silicon, electron mobility. We are not talking about whole mobility because none of them have whole mobility better than that of silicon. That only germinium can save us. So, in case when I have to really have high whole mobility, one has to look into ways of introducing germinium also into the galaxy of the semiconductors. So, I is indirect here, D is direct band gap. Now, these are binary compounds 2, 6, 3, 5 binary giving a pointer towards gallium arsenide and indium phosphide. Lot of effort has gone into gallium arsenide and indium phosphide material and devices in the 1990s and 1980s and 90s. Still there is work going on in that. They are being used in the acetro junctions rather than MOSCAP. The compound semiconductor people have found a way out to sort out the problem of the high interface density using hetero structure. So, this is the thermos graph, which gives you electron mobility at 300 kelvin and on the y axis 100,000, 10,000 etcetera and on the x axis the band gap. Minimum band gap meaning actually energy band gap actually because there are different band gaps, but the minimum band gap is the actual band gap. So, band gap is given on the x axis because we are looking at an alternate for silicon. So, material that we look forward to must have if possible better band gap than silicon. That means to the right hand side of this graph that is better band gap and to the upper half of above this line horizontal line that is higher mobility. Take a look at indium antimonide. What a mobility it has got 100,000 centimeter square per volt second, but you can see the band gap something like about 0.1 or 0.11 electron volts absolutely no way of using it more micro electronics. What about indium arsenide? 20,000 centimeter square per volt second, but you can see the band gap is very, very small. Something like 0.3 or 0.4 electron volts no way you can use it but take a look at gallium antimonide that has got better mobility, but the band gap is also lower than that of silicon. One can think of doing that we provided the whole mobility there is better, but actually the whole mobility there is not good enough. I do not have the plot here right now. I can bring it to some other time. There may be you see band gap is lower compared to silicon we already know, but mobility is better. In fact it has got better whole mobility. I just circled those two. Take gallium arsenide higher mobility higher band gap, indium phosphate higher mobility higher band gap compared to silicon. Those are the materials look forward to. Now you can think of making there is one more material gallium nitride which has come up in the past decade. It has cut off like anything everywhere there is effort to push gallium nitride. The best mobility that is predicted is about 2000 centimeter square per volt side fine, but look at the band gap something 3.3 electron volts. It can be used for high power high frequency etcetera. In fact when you go around you will see that the saturation velocities of electrons are very very high here. If I am looking into high field operations that will be the material one can look into compared to any other material, but it is a very difficult material to work on, very costly material right now. I am sure this is problem that will be sorted out. There is lot of effort going in this direction. So, now let us take a look at this particular thing again once again here. I can have combination of gallium arsenide and indium arsenide. See gallium arsenide has got higher band gap than that of silicon. Indium arsenide has got much higher electron mobility. I mix them together. I can that is I can I can replace some of the gallium atoms with the indium atoms. I get gallium indium arsenide that is ternary three elements forming in the compound gallium indium arsenide. That will have band gap varying linearly from here to there. That will be low band gap here, but you can still have band gap with closed silicon and you can still have much higher mobility compared to that of silicon. So, one can think of or one is thinking of combinations of binary compounds to realize ternaries. Let us see further four, four compounds we are looking into three, five etcetera. What are the four, four compounds silicon, carbon germanium, silicon germanium, silicon carbide. Silicon is indirect band gap, germanium is indirect band gap. So, silicon carbide, silicon germanium both are indirect band gap semiconductors and your band gap will be somewhere in between the two. Silicon carbide of course has got much higher band gap about 3.32 volts. So, this silicon carbide is a material which has drawn attention of people working on high power devices because of wide band gap. Similarly, gallium nitride has drawn the attention of people who work on high power, high frequency devices, micro devices. Now, silicon carbide 3.26 electron volt is a band gap higher than that of silicon. Fine, mobility is very poor. Even half of that of silicon less than that of silicon, electron mobility is silicon, but it will have high field velocity of electron will be high at high fields that we will see later. Properties of elemental and 3, 5, 7 electron suitable for micro electron. So, therefore, summing up some of the properties. Silicon, gallium arsenide, indium phosphate, germanium, these are the three potential candidates. Band gap, I have already mentioned, they have better band gap. Electromobility best in gallium arsenide and indium phosphate, but germanium is nowhere inferior. So, higher than silicon. Whole mobility, silicon 450, gallium arsenide 400, indium phosphate 150, both are poor. No hope for seamoth there. Germanium 1900, efforts are being tried to improve this mobility in germanium. Saturated electron velocity, you may recall that as you keep on increase in electric field and keep on measuring the velocity of carriers. It keeps on increasing linearly initially. Then finally, saturates at a particular value of about 10 to power of 7 centimeter per second. That is called saturated electron velocity. That is 1, 1.3 into 10 to power of 7, almost same. Nothing much to boast of in any case. Breakdown strength, silicon about 0.2 to 0.3 mega volts per centimeter, that is 20 volts per micrometer to 30 volts per micrometer depending upon the doping level, chain junctions. Gallium arsenide is slightly better, 40 volts per micron, indium phosphate about 0.5 volts per micron. Germanium is poor. So, if you are thinking of 5 voltage devices, germanium is not the device. Then you may have to go back to silicon or some of these materials or some combinations. But for nano devices, when you talk of low voltage, that is not a constraint. Semiconductor, other property, one looks forward to thermal conductivity, watts per centimeter degree Kelvin. You can see among all of them, silicon has the best thermal conductivity. You would be concerned about this when you want back more and more devices, where the device temperature goes up. The chip temperature goes up. If the thermal conductivity is high, the heat can be taken away by the thermal conduction into the package outside. So, silicon is that way it is better. Thermal resistance will be smaller, like electrical resistance you can talk of thermal resistance. Electrical resistance is lower if the electrical conductivity is higher. Thermal resistance is lower if thermal conductivity is higher. So, that is best in silicon. See other material, they are all not as good. Relativity of electrical resistance is not of great importance, but almost all of them are there. There may be one having higher. Is just now what I mentioned, ternary compounds, gallium, indium arsenide. You are denoted by the symbol, gallium X, indium 1 minus X, arsenic 1. Usually, as you say stoichiometric gallium arsenide, there X is equal to 0. I am sorry, X is equal to 1. X is equal to 1 indicates indium is 0 and gallium is 1. So, gallium 1, arsenic 1 that is stoichiometric gallium arsenide. In the crystal for each one gallium atom, there is one arsenic atom. Now, if X is equal to 0.5, gallium is 0.5, indium is 1 minus 0.5, there is 0.5, arsenic is 1. That means for if there are 10 arsenic atoms, there are 5 indium atoms and 5 gallium atoms. If X is equal to 0.3 or 10 arsenic atoms, there are 3 gallium atoms, there are 7 indium atoms. The meaning of that, that is ternary compound. Pound by allowing indium, gallium and arsenic, X is the gallium mole rip mole fraction. I have what I explained just now. X is equal to 1 gives gallium arsenide, X is equal to 0 gives indium arsenide, indium arsenide. Ternary compound, other example is very popular material, l gas. So, gallium arsenide, if you do not have time to say gallium arsenide, you can say gas. Aluminum gallium arsenide, if you are tired, l gas. X is equal to 1 gives aluminum arsenide, X is equal to 0 gives gallium arsenide. So, as X is varied from 0 to 1, there is you get gallium arsenide to aluminum arsenide. You can get this compound, ternary compounds. There are specific reasons for taking a look at specifically these two ternary compounds. Because, after all, if I want to make a heterostructure, what is the meaning of heterostructure? Go different type of materials, one over the other. Make devices using, for example, gallium arsenide on the top of that, put another material like aluminum gallium arsenide. Indium phosphate on the top of that, deposit another material like gallium indium arsenide. So, these are, that is why these are looked into. Why? This graph plot is a famous plot. Right from 1980s, people have been flashing this. Let me also flash it to you. When I want to grow or when I want to realize a heterostructure, I must be able to grow one material over the other material if possible without any strain. That means, the next layer that I deposit on the top must have similar lattice arrangement or similar lattice constant. So, what this gives is the energy pan gap of different materials on the y axis and on the x axis the lattice constant. For example, germanium has got lattice constant of 5.65 angstroms. That is 0.565 nanometers. Take a look at gallium arsenide. The germanium pan gap is 0.66. Lattice constant is 0.65, 5.65. Gallium arsenide, look at the arrow here, 1.43 pan gap. See the lattice constant. See that is the same as that of germanium. I can draw a vertical line here, 5.65. So, that means, one can grow gallium arsenide on germanium without having any lattice dislocations without having any defects introduced. We can grow gallium arsenide on germanium. In fact, this had prompted to people to grow thin film gallium arsenide on germanium to make solar cells. Now, you can see I want to make gallium arsenide and germanium heterostructure I can make. If I want to make gallium arsenide or if I want to grow aluminum arsenide on gallium arsenide, I can grow because you can see lattice constant of aluminum arsenide, gallium arsenide, germanium are almost same. They are not exactly matching, but close. So, aluminum arsenide is a band gap which is more about 2.2 electron volts. Now, if I have in between I mix gallium arsenide and aluminum arsenide, I get L gas. So, I can vary the band gap from 1.43 to 2.2. But, remember that aluminum arsenide is a indirect band gas we can determine. The dotted lines tell you that they are the indirect band and gallium arsenide is direct. If I go from gallium arsenide to aluminum arsenide, what you get will be direct band gap, aluminum gallium arsenide. Ultimately, it will be indirect band gap. So, you can grow L gas on gallium arsenide to realize hetero structures. So, this is shown, this is the possibility of realizing hetero structure devices, L gas on gas, gallium arsenide on germanium. Or why did they talk of gallium indium arsenide? This is indium arsenide that is constantly something like 6.1 close to 6.1 and the band gap is very small. I mix gallium arsenide and indium arsenide. Take about 0.53 of indium. I get indium gallium arsenide here. Band gap is something like 0.7 electron volts and that is constantly matched to that of indium phosphate that is 5.5678 about that, 5.85 or so, you get that. So, you can grow indium gallium arsenide and indium phosphate. So, I just want to point out that. I will come back to this particular slide. Again, there are varieties of possibilities. Sky is limit for choosing the compound material when you use compound semiconductors. Binary, ternary, paternary, pore force semiconductor, everything you can do that. Thank you very much. We will see next lecture on these things.